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Intel To Ship Xeon Phi For "Exascale" Computing This Year
MojoKid writes "At the International Supercomputing Conference today, Intel announced that Knights corner, the company's first commercial Many Integrated Core product will ship commercially in 2012. The descendent of the processor formerly known as Larrabee also gets a new brand name — Xeon Phi. The idea behind Intel's new push is that the highly efficient Xeon E5 architecture (eight-core, 32nm Sandy Bridge) fuels the basic x86 cluster, while the Many Integrated Core CPUs that grew out of the failed Larrabee GPU offer unparalleled performance scaling and break new ground. The challenges Intel is trying to surmount are considerable. We've successfully pushed from teraflops to petaflops, but exaflops (or exascale computing) currently demands more processors and power than it's feasible to provide in the next 5-7 years. Intel's MIC is targeted at hammering away at that barrier and create new opportunities for supercomputing deployments."
It was, sort of.
Modern GPUs are essentially thousands of very simple, low-speed cores. Think of a thousand 486s. They use driver software to make it do the graphics calculations, because that means they can be more flexible. There are no fixed-function pipelines anymore - it's all software, either in the drivers, or in the customizable shaders.
Intel's plan was to make a GPU that has a few dozen (32 or so) more complex cores, that were x86 compatible. They added some specialized extra-wide SIMD stuff and some fast-blitting texture units, but it was still x86 compatible. And they had some very impressive drivers to make it function as a "graphics card" - they even demonstrated real-time raytracing in 2009, something nVidia only demonstrated their cards doing this year (and Intel did it in an actual game, not a tech demo).
However, that flexibility made it a bit underwhelming at the things most games actually do, so it really couldn't compete in that marketplace, at least not at the prices they expected to need to be profitable. But that highly-flexible but also highly-parallel architecture seems perfectly suited to supercomputing.