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IBM Mainframe Running World's Fastest Commercial Processor

dcblogs writes "IBM's new mainframe includes a 5.5-GHz processor, which may be the world's fastest commercial processor, say analysts. This new system, the zEnterprise EC12, can also support more than 6-TB of flash memory to help speed data processing. The latest chip has six cores, up from four in the prior generation two years ago. But Jeff Frey, the CTO of the System Z platform, says they aren't trading off single-thread performance in the mainframe with the additional cores. There are still many customers who have applications that execute processes serially, such as batch applications, he said. This latest chip was produced at 32 nanometers, versus 45 nanometers in the earlier system. This smaller size allows more cache on the chip, in this case 33% more Level-2 cache. The system has doubled the L3 and L4 cache over the prior generation."

158 comments

  1. CPU by Lord+Lode · · Score: 0

    Why does the article not mention the name of the CPU? Is only its clock speed faster, or also its execution? Can we also use this CPU in consumer computers or is this for IBM Mainframes?

    1. Re:CPU by vlm · · Score: 1

      Why does the article not mention the name of the CPU?

      You're probably not buying one at tigerdirect anytime soon, so it doesn't really matter.

      It does run linux, which is kinda cool.

      http://www.debian.org/ports/s390/

      --
      "Science flies us to the moon. Religion flies us into buildings." - Victor Stenger
    2. Re:CPU by Anonymous Coward · · Score: 0

      While IBM doesn't disclose prices (you have to talk to their sales), I found a source that said the predecessor (the z196) ran around hundreds of thousands of dollars. I would suspect this processor would cost in the same ballpark (200-300k per unit).

      I'm certain IBM would be happy to sell you one, however...

    3. Re:CPU by Pf0tzenpfritz · · Score: 1

      Why does the article not mention the name of the CPU? Is only its clock speed faster, or also its execution? Can we also use this CPU in consumer computers or is this for IBM Mainframes?

      No. They obviously want to profit from high speed trading.

      --
      Oh, the beautiful gloss of greality!
    4. Re:CPU by jthill · · Score: 3, Informative

      They make very few thousands of the really high-end stuff like this. You can bet every dollar you have that these will execute faster. Multinational corporations don't shell out $20M for a mainframe upgrade without knowing exactly what they're getting. L3 cache is 48GB. <== not a typo. There's an outboard L4 cache that's much larger. They've got bandwidth that can feed that beast: they were built to handle TB/s of just I/O bandwidth, not including CPU access to the data, something like a decade ago.

      --
      As always, all IMO. Insert "I think" everywhere grammatically possible.
    5. Re:CPU by Anonymous Coward · · Score: 0

      L3 cache is 48GB. <== not a typo.

      This is insane : you could run a full OS install just from the L3 cache !!!
      After ramdisk, welcome to cachedisk...

    6. Re:CPU by Anonymous Coward · · Score: 1

      "L3 cache is 48GB. == not a typo"
      Not a typo, still wrong. Those L3 caches tend to be in the 12-24MB range and even that is usually shared by the cores. The off-chip L4 cache is in the dozens to hundreds of MB.

    7. Re:CPU by BBCWatcher · · Score: 4, Interesting

      Yes, you could do that. Multiple images, actually. And that's basically what these servers do automatically. There are 4 levels of cache, main memory (which is RAID-protected actually, called RAIM -- only IBM does that), and there's another optional level of directly processor-addressable memory called Flash Express which is nonvolatile -- that's new, too. It works particularly well for fast paging, in-memory databases, memory dumps, etc. Then you go into fiber-attached and heavily cached solid state disk, fast disk, nearline disk, tape libraries. There are a lot of storage layers, and they're all very big.

    8. Re:CPU by Anonymous Coward · · Score: 0

      Yes, it is indeed a typo. The L3 cache is on the die, and the die has a few billion transistors, so there's no way you could have 48GB of L3 cache. It's actually 48MB of L3 cache, with 192MB of off-chip shared L4 cache.

      dom

    9. Re:CPU by BBCWatcher · · Score: 1

      No, your correction is partially incorrect. It's 384MB of L4 cache minimum up to 1.5GB maximum per zEC12.

    10. Re:CPU by jthill · · Score: 5, Informative

      L3 is 48MB, (see p. 43), not GB as The Register had it, thanks for noticing that.

      --
      As always, all IMO. Insert "I think" everywhere grammatically possible.
    11. Re:CPU by Guy+Harris · · Score: 1

      https://en.wikipedia.org/wiki/IBM_z196_(microprocessor)

      Actually, the z196 is the microprocessor in the previous generation. An IBM paper on the zEC12 refers to the new microprocessor as the "zEC12 processor chip" or just "the zEC12 chip". As they're not selling it on the open market, there's not much reason to give the processor chip its own name, independent from the name of the systems in which it's being used.

    12. Re:CPU by gl4ss · · Score: 1

      Multinational corporations don't shell out $20M for a mainframe upgrade without knowing exactly what they're getting.

      uh, they tend to exactly shell out the money without knowing exactly what they're getting since they're contracting the decision out anyhow.

      sure, it would be nice if the whole db fitted on the cache on the cpu.. but uh, you're not getting 48gb of on-die cache of course. you're not going to get that for 20 mil.

      --
      world was created 5 seconds before this post as it is.
    13. Re:CPU by Relayman · · Score: 1

      selling it on the open market...

      I'll bet they will sell them to you, but if you have to ask the cost, you can't afford one.

      --
      If I used a sig over again, would anyone notice?
  2. bogus claims by Anonymous Coward · · Score: 0

    They seem to be claiming "faster" solely on the basis of clock frequency. In actuality, your normal-ass laptop chips probably have higher performance, except on the specific server-type workloads this was made for.

    1. Re:bogus claims by Tx · · Score: 3, Informative

      They claimed "faster", not "more powerful"; clock frequency is the only thing they need to reference for that claim.

      --
      Oh no... it's the future.
    2. Re:bogus claims by BBCWatcher · · Score: 5, Informative

      No, they aren't claiming that. Clock speed is still extremely important, though, and nobody else except IBM has figured out how to hit these high gigahertz numbers, much less within power and cooling constraints. What's all the more impressive is that IBM does it at mainframe service qualities, i.e. this machine runs continuously at 5.5 GHz without shutting off cores, without "burst" mode, and without weird/exotic stuff like cryogenics that might keep a chip running long enough for a screenshot. It's just balls out performance on every thread -- and there's a definitely a market for that. Nobody else is left doing this computer engineering, bless them. Also check their cache sizes (obscenely huge), out-of-order execution, pipelining, crypto and decimal floating point in every core, extremely complex instructions like transactional execution.... This z CPU is a gorgeous piece of engineering in every way. And no, you can't run an entire large bank (for example) on your laptop.

    3. Re:bogus claims by Anonymous Coward · · Score: 4, Interesting

      There are some engineering tricks I've seen IBM use which are pretty cool. Take the POWER7 CPU line for example. You can disable every other core, allowing the cores that are operational use the cache of the cores that are not on. This gives not just cache, but allows a higher clock speed. Of course, this feature is mainly used to deal with applications which are licensed by the hardware cores present.

      Mainframes are probably one of the most underutilized tools out there. However, for performance per square foot in the data center, they are hard to beat these days.

      Of course, the biggest advantage: It isn't x86. With virtually everything running on the x86 or amd64 platform, all it would take is an undocumented instruction similar to the F0 0F bug that happens to give ring 0 access, and virtually the whole world is vulnerable with absolutely zero way of protecting against it except reaching for the network cable or power switch.

    4. Re:bogus claims by Jeremy+Erwin · · Score: 2

      Laptop chips? Please. We're moving away from that. The tradition these days is to compare everything to your cell phone-- Your cell phone beats the pants of a Cray, and so on.

    5. Re:bogus claims by Anonymous Coward · · Score: 1

      Finally someone who gets it, the x86 monoculture is the single most dangerous thing in the computing landscape today.
      Monoculture is bad (remember potatoes in Ireland), it has always been bad and will always be bad.
      And no, it won't be better if x86 monoculture is replaced by ARM monoculture. Well, there will more choice of foundries, not just Intel and AMD (that Intel could kill but does not for fear of being scrutinized even more by antitrust authorities).

    6. Re:bogus claims by Anonymous Coward · · Score: 1

      You make it seem like IBM is unique. Yes they are, but not in the way you implied. Mainframes are expensive beasts with essentially no limits in cooling running (in many cases) legacy code stacks that can't be (or at least will not be) updated. They are using expensive techniques like ceramic MCM or Multi Chip Modules each ceramic substrate likely costing more than even an Intel top of the line processor. They are using a huge amount of connector on the order of 5x more than the before mentioned top of the line Intel processor in order to feed the processors with power and data.
      The closest relative to this level of effort is the supercomputers of yesterday. Todays supercomputers doesn't even compare...

      Intel could very well have their 8-10GHz Pentium 4(5?) now if they had continued on that path. I for one like their current processor line better.

    7. Re:bogus claims by Anonymous Coward · · Score: 0

      Impressive numbers, but a Xeon 2.4 Ghz still owns a z196 5.2Ghz CPU in UnixBench :)

    8. Re:bogus claims by BBCWatcher · · Score: 1

      Well, if so -- no idea, really -- then run UnixBench on an Intel Xeon. I see that IBM sells those, too, as it happens. Now how does UnixBench help me run my business better, more securely, more reliably, etc? I've never worked for a business (or government) that runs UnixBench to solve any real business problem(s).

    9. Re:bogus claims by BBCWatcher · · Score: 1

      What if Intel had continued boosting clock speed (within power and cooling constraints) and employed other improvements? IBM has done both, and I applaud that. It's important to them (and to many of their customers) that they keep working hard to improve the performance of each thread, and, golly, they keep pulling rabbits out of the hat.

    10. Re:bogus claims by uncqual · · Score: 1

      I've never worked for a business (or government) that runs UnixBench to solve any real business problem(s)

      But such businesses likely exist -- those business whose real business problem is selling processors and whose processors run UnixBench very well.

      --
      Why is there an "insightful" mod and why isn't it "-1"? If I wanted insight, I wouldn't be reading /.
    11. Re:bogus claims by amorsen · · Score: 2

      Mainframes are probably one of the most underutilized tools out there. However, for performance per square foot in the data center, they are hard to beat these days.

      I really don't believe you are right about that. The core density of mainframes is rather sad compared to Google-style densely packed rack mounts. You can only fit about 100 user accessible processors in one mainframe, which gives you around 600 cores. You can easily fit 800 x86 cores in a standard 42U rack, even with bog-standard 1U servers while leaving room for switches and cooling, and you can more than double that if footprint is your main concern. In contrast, that mainframe won't fit in a standard 19" rack footprint AND it requires separate space for the management console.

      If you are mainly running batch jobs, the lack of CPU performance of the mainframe likely won't matter and the enormous I/O capacity is very difficult to achieve in the x86 space. In that case you may well be right that the mainframe wins on performance per square foot.

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      Finally! A year of moderation! Ready for 2019?
    12. Re:bogus claims by LWATCDR · · Score: 4, Informative

      IBM gets the speed because cost is no option. Here is how they do it.
      1. Low yield. These chips have a very large die size so the yield is going to be lower but the price is high so the trade off works.
      2. Binning. The slower chips will go into the lower end machines that use the Z114.
      3. Multi chip modules again to allow careful selection and improved yields.
      4. Crazy levels of cooling. These have the very best cooling they can fit.
      5. Professional operators, maintenance, and construction. The entire machine will be built like an expensive watch from the cooling to the memory system. The operators will follow all the procedures and if something is not perfect they will call IBM to send out a tech if the computer didn't do it.
      Other companies know how IBM does this they just do not have the resources in place to compete with IBM in this market. Instead they go for the easier lower hanging fruit.
      Too bad IBM blew it with the PC. If they had not been under extreme anti-trust pressure and had faith that PC where going to take off they could have used a 16 bit version of the System 360 ISA for the CPU maybe based on the 360/20 or maybe the 22.

      --
      See my blog http://ilovecookes.blogspot.com/ for light hearted technical information.
    13. Re:bogus claims by sjames · · Score: 1

      It's a matter of intended load. Yes, the mainframe looks bad when it is running a benchmark intended for a GP CPU. However, let the Xeon run a massive out of cache application and watch it spend most of it's time waiting on memory.

      Kinda like your typical passenger car easily leaves a dump truck in the dust when the light turns green until you try it with 20 tons of rocks in your trunk.

    14. Re:bogus claims by bored · · Score: 1

      Generally, the larger the memory system the longer the memory latency. Hence the need for larger caches. The one thing the z does bring to the table is extremely large caches. Which helps a lot if you are sitting in that range between fitting in cache or not. The problem is (at least with the previous generation CPU) is that the memory latency is not as good as you assume. You can't throw money at the latency problem, like you can with the bandwidth or capacity ones.

      From what I can tell from my z114 the memory latency isn't anything to write home about. Its ok, but its is _NOT_ better than my mid range DL380's. So your example sort of sucks. In fact with x86 servers the fewer sockets you have generally translates to better latency because the data has to be transferred over the QPI or HT links. So if you app is bound by memory latency you actually want a smaller machine (unless you get small enough your hitting disk...).

    15. Re:bogus claims by sjames · · Score: 1

      When you can find a Xeon with OVER 1 GIG of cache, my example will suck. That's a BIG window for apps that go out of cache on a Xeon but not on a z CPU.

      There's still plenty of reason to go with the Xeon, of course. If you have apps that stay reasonably in cache for a Xeon (and there are plenty) or you don't happen to have a few million burning a hole in your pocket (sadly, very common), the Xeon is a good choice.

    16. Re:bogus claims by davydagger · · Score: 2

      reliability too.

      mainframes generally run in high availability and high uptime enviroments.

      you want five nines, you want a mainframe.

      a cluster of x86s might reach the same performance specs for a fraction of the price, but it won't give you the same reliability.

    17. Re:bogus claims by davydagger · · Score: 2

      "Intel could very well have their 8-10GHz Pentium 4(5?) now if they had continued on that path. I for one like their current processor line better."

      with minimal performance gain, and increase in power.

    18. Re:bogus claims by amorsen · · Score: 1

      Absolutely, I am not saying that mainframes don't have a role or that people are stupid for buying them. Mainframes are great at what they do, and almost every time high-end Unix boxes "steal" a reliability or I/O-performance feature from mainframes, the mainframe people seem to invent a new one.

      I am only saying that if your primary need is a lot of CPU in a small amount of space, without requiring I/O or reliability or the other benefits of a mainframe, you should not buy a mainframe. However, the number of people who impulse buy a mainframe based on what they read in a Slashdot post is likely low.

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      Finally! A year of moderation! Ready for 2019?
    19. Re:bogus claims by Anonymous Coward · · Score: 0

      They may have. If I remember correctly the integer and addressing units in the P4 were running at twice the processor freq so that would be 7.6Ghz. That required huge pipelines.

      I may be wrong though as it was a long time ago.

    20. Re:bogus claims by bWareiWare.co.uk · · Score: 1

      It is fairly trivial for white-box clusters to reach five nines. When was Google's last downtime?

    21. Re:bogus claims by Tore+S+B · · Score: 1

      x86 is not a monoculture. That is an absurd claim.

      All problems with the x86 instruction set have lay in its implementation, which differs wildly from processor set to processor set. The implementations of the ISA may have security issues, but there is no inherent insecurity in the x86 instruction set.

      --
      toresbe
    22. Re:bogus claims by Relayman · · Score: 1

      The closest relative to this level of effort is the supercomputers of yesterday.

      The closest relative to these machines are the IBM Power Systems systems (think Watson). The smallest Power Systems system, with the right software, is suitable for a 10-employee business.

      --
      If I used a sig over again, would anyone notice?
    23. Re:bogus claims by davydagger · · Score: 1

      correct.

      If you want total compute power firefower supremecy, you want a "super computer" not a mainframe.

      Whats more powerful a race car or a semi truck?

      a race car would be a super computer, the semi would be mainframe.

      "However, the number of people who impulse buy a mainframe based on what they read in a Slashdot post is likely low."
      you can't exactly walk into microcenter and buy one.

  3. horray! by Anonymous Coward · · Score: 0

    for IBM Slash-vertizing!!!!!!!!!!

  4. Reading the words "new mainframe" by JCCyC · · Score: 1

    ...gives me a bit of a cognitive dissonance sensation. It shouldn't, really, but it does. Is it just me?

    1. Re:Reading the words "new mainframe" by Anonymous Coward · · Score: 4, Informative

      Mainframes run a surprising amount of critical workloads in the real world. They're vastly different than open systems, but they can be kept running through almost anything, if you're willing to spend enough money.

    2. Re:Reading the words "new mainframe" by Anonymous Coward · · Score: 1

      its just you

    3. Re:Reading the words "new mainframe" by davester666 · · Score: 1

      Well, pretty much anything can be kept running through almost anything, if you're willing to spend enough money...

      --
      Sleep your way to a whiter smile...date a dentist!
    4. Re:Reading the words "new mainframe" by gstoddart · · Score: 3, Informative

      ...gives me a bit of a cognitive dissonance sensation. It shouldn't, really, but it does. Is it just me?

      It may not be just you. But I think a lot of people really have no idea of just how many mainframes are still chugging away doing what they've always done.

      My wife does outsourced SAN storage, and they still have a couple of clients with big iron running.

      Every couple of years when everybody has forgotten about the machines, an IBM tech will call up and say that the machine has phoned home and has a part that needs to be swapped out and that he needs to go onsite. Which usually leads to several hours of people trying to remember what it is and where it is (except the guys who work in the data center, who can't miss it).

      I've worked in several places that have had mainframes for literally decades. And I've even worked on a project or two which tried to replace ancient, purpose built software with some shiny new stuff. In the cases I've seen, after spending a few years a a few million dollars ... they still can't replace the mainframe and scrap the project.

      I knew someone in the early 2000's who had retired from his job with a full pension, and was back as a consultant making at least 3x his old salary because they no longer could find someone who knew the machines and the software like he did.

      Mainframes haven't gone away. Not by any stretch. And I bet this one still runs the stuff from the IBM 360 days quite nicely.

      --
      Lost at C:>. Found at C.
    5. Re:Reading the words "new mainframe" by BBCWatcher · · Score: 3, Insightful

      Well, no. Right tool for the right job and all. You can buy the world's most expensive Olympic racing bicycle, but it won't haul an Airbus fuselage to its factory. There are many problems that cannot be solved with infinite amounts of money wrongly applied.

    6. Re:Reading the words "new mainframe" by mlts · · Score: 1

      Mainframes do a bunch of tasks extremely well. The problem is that there is a "cheapest at any cost" mentality in IT, which is why this type of technology seems to be outmoded.

      If businesses looked at the TCO of a mainframe, oftentimes, they would be better off, especially because of the CPU power per square foot of server room space, which a mainframe excels at. This is also true to a lesser extent with the higher end Oracle SPARC and IBM POWER7 machines.

      The one advantage of mainframes is that once set up and configured, they pretty much sit there and other than phoning home to the IBM guy if some hardware breaks, it essentially can be forgotten about. No reboots every two weeks, or other stuff required unless there is a major security issue, and those tend to be very rare.

      Mainframes are also good if one wants to do reliability from the bottom of the stack up, so having to do custom code for fault tolerance is minimized.

    7. Re:Reading the words "new mainframe" by Anonymous Coward · · Score: 1

      Single largest use for new mainframe installations?

      Consolidating someone's ridiculous sprawl of Linux servers into one easily manageable footprint. Cost savings? Approximately 80% over continuing to use those outdated dinosaurs of "distributed servers".

  5. L4 cache by afidel · · Score: 2

    How does the L4 cache in these processors work? Generally going to anything off die is going to induce a major latency penalty due to the need to go through a driver stage which can handle outside interference. How can they make the L4 cache fast enough that its small size doesn't make it basically pointless versus just going to main memory?

    --
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    1. Re:L4 cache by MozeeToby · · Score: 1

      Small is a relative term. The L4 cache is almost 200 Mb on these. Of course, it all depends on the how the math works out. As long as it's faster than going to RAM there will be plenty of situations where it pays off.

    2. Re:L4 cache by Anonymous Coward · · Score: 0

      Without reading the article at all, there is some easy ways in which they could implement cache off-die and it still be faster than system RAM, firstly... much faster ram GDDR5 vs DDR3, etc would help, also have the cache logically part of the CPU, with the CPU being the only thing that can talk to the ram at all. Kinda breaking our concepts of northbridge/south bridge... but ehh, that isn't necessarily a _bad_ thing

      PLUS... perhaps they have a better caching scheme this way.... having built a cache simulator in undergrad... small changes in a single variable (row width, # rows, # of rows to grab at once, etc) can make a huge impact on even simple application execution. So i'm going to make a non-far fetched assumption that they used simulators and optimized their caching scheme (or hell it might even be variable in some respects based on past processes ) to use the L4 Cache available.

      Plus i'm sure there is other ways... I got out of the comp. arch field after undergrad...

    3. Re:L4 cache by BBCWatcher · · Score: 4, Informative

      Actually, L4 cache on this new IBM zEC12 is a minimum of 384MB up to 1.5GB per server in increments of 384MB. As you add cores the L4 is bumped up. IBM doubled the cache in only a 25 month product cycle. Bravo.

    4. Re:L4 cache by inode_buddha · · Score: 1

      FWIW they have a 2 gig page frame now. IBM shrank the process size and crammed cache like crazy on these. Along with some interconnects that make normal computers look lame...

      --
      C|N>K
    5. Re:L4 cache by Anonymous Coward · · Score: 0

      All you need to do is to cover the latency of the next level of storage hierarchy. There are apparently 30 cores in a single MCM, so the L4 cache is likely very necessary.

    6. Re:L4 cache by sjames · · Score: 1

      The outboard cache is off the die, but within the same ceramic module. That means no sockets in the way and very short connecting wires. The cvache chips themselves can also be faster than the chips you'd find on a DIMM.

  6. Ming Mecca by unixhero · · Score: 5, Funny

    That's a Ming Mecca chip. Those aren't even declassified yet!

    1. Re:Ming Mecca by Sponge+Bath · · Score: 1

      I'm not sure the mainframe crowd will know this pop culture reference, and may end up thinking of the guy with a pointy beard from Flash Gordon.

    2. Re:Ming Mecca by Jeng · · Score: 1

      Or they will be like me, be interested, look it up, and then laugh.

      I've since added the movie to the queue.

      Then again I'm not part of the mainframe crowd. Damn cool kids with their expensive toys.

      --
      Don't know something? Look it up. Still don't know? Then ask.
    3. Re:Ming Mecca by Anonymous Coward · · Score: 0

      Either that, or once the Muslim crowd knows that Islamic reference, they'll issue a Fatwa on IBM, until the latter changes that name.

  7. Memory performance? by Urza9814 · · Score: 1

    So it was my understanding that part of the reason consumer CPUs didn't tend to go above 3-4GHz was that, at those speeds, the electrons can't actually move through the wires fast enough. Specifically for doing memory reads -- at 5.5GHz, I'm calculating about 4cm per clock cycle -- which may be further than the memory is physically located on a normal desktop PC. Meaning it would take not just two, but possibly three or four clock cycles to read a value from main memory.

    Granted, on a server, main memory may be closer to the CPU, and the added cache will help as well. But I'm also mostly a software guy -- anyone with some more computer engineering knowledge have any information about this? Is the memory closer? Are they just taking longer to read? And if so is that likely to impact performance significantly (such that this wouldn't be as significant of a gain from 3GHz-5.5GHz as, say, 1GHz-2GHz?)

    1. Re:Memory performance? by Anonymous Coward · · Score: 5, Informative

      CPUs have not accessed main memory synchronously in decades. There are many hundreds of cycles lost if the processor stalls on a RAM access, not just from the length of the wiring but the addressing logic too. In fact, modern CPUs don't do word-level access to RAM, but rather pull in whole cache lines in a more packetized memory access protocol. Even in a multi-CPU SMP system, they don't actually communicate through system RAM anymore, but rather communicate CPU-to-CPU with a cache coherency protocol that provides the illusion of a shared system RAM. Each CPU really has its own set of local RAM behind its own cache and on-chip memory controller.

      Even the L2 or L3 caches are unable to keep up with the CPU, but they are still significantly faster than system RAM, so they still help when the working set can fit there.

    2. Re:Memory performance? by Anonymous Coward · · Score: 0

      Wow.... I don't mean any offense to you personally, because I know most programmers are in a similar boat these days, but it astonishes me that so many people claim to be "software guys" these days with so little understanding of how computers work. Again, don't take this as a personal attack, because I know it's the most common case for almost all programmers in the last few decades who have never really learned how computers work. I've seen it most often in people cut from the Java programmer mold: they (most often) use the machine in tragically inefficient ways, sometimes leaving orders of magnitude on the table.

      There is a significant penalty in both latency and throughput to access memory, and this has been true for a long time (meaning, for many, many generations of CPUs). Covering these latency and throughput limitations is a major design goal of a modern CPU. Of course you hope to hit some level of cache, but if you miss every level of cache and much fetch from memory, the latency can be in the range of many dozens up through many hundreds of cycles, depending on the architecture in question, so there is no issue with having to see the result in a single cycle - it's bound by other factors. Even L2 cache accesses have a latency penalty, although not that severe - it can be several up through a dozen or two cycles, again depending on the machine architecture. This latency can be covered by various techniques such as out of order execution, or hardware threads which use the same execution units during the latency period.

    3. Re:Memory performance? by Rockoon · · Score: 3, Informative

      To add to this, the Sandy Bridge has an L1 latency of 4 or 5 cycles (depending on access mode), the L2's latency is 12 cycles, and the L3's latency is 46 cycles plus the response time of the memory chips (typically between 60ns to 70ns)

      These chips make up for the high latencies by having many instructions being executed simultaneously, so if one dependency chain completely stalls out on a cache miss any other dependency chains can still fill up the execution units keeping the processor just as busy as if there were no stall at all until everything left in the pipeline is dependent on the result of the stalled out operation.

      --
      "His name was James Damore."
    4. Re:Memory performance? by Anonymous Coward · · Score: 0

      Wow.... I don't mean any offense to you personally, because I know most programmers are in a similar boat these days, but it astonishes me that so many people claim to be "software guys" these days with so little understanding of how computers work.

      These are the same people that believe the claims that C is a low level language.

    5. Re:Memory performance? by BBCWatcher · · Score: 1

      Yes, everybody does that (out-of-order execution, pipelining, etc., etc.) And then...you still need to keep the CPU well fed to boost performance. Enormous 4-level caches help do that. Having a continuous 5.5 GHz clock speed is also quite helpful. So is having 101+ cores that can access the same cache rather than, say, 8 such cores. And at least a couple hundred (at least) other IBM performance tricks, many of which cost money to deliver and thus probably won't find their way into save-a-nickel parts of the market any time soon. It also very, very seriously helps when you design both hardware and software together, as the late great Steve Jobs (among others) reminded us all.

    6. Re:Memory performance? by INowRegretThesePosts · · Score: 1

      To add to this, the Sandy Bridge has an L1 latency of 4 or 5 cycles

      Wow, I thought L1 cache was much faster. Thank God there are 16 registers.
      But it looks that passing arguments in the stack is moderately expensive for a small function. Am I right?

  8. Re:Article says 'may be', i.e. no by ciderbrew · · Score: 1

    But their chip isn't overclocked to near death and using a nitrogen cooler. So I've no idea how your comparison works. The headline may as well read "Ford make fastest road car" so you can say but it isn't as fast as a car you've have converted to use a jet engine and drag racing tires.

  9. Re:Article says 'may be', i.e. no by bws111 · · Score: 3, Insightful

    So, you're comparing a ridiculous configuration of a nitrogen-cooled, over-clocked processor that will maybe run long enough to get a screen shot of it running, to a commercial processor that is designed to run at that speed non-stop for years and years? Yeah, that makes sense.

  10. This is great news, however... by Anonymous Coward · · Score: 0

    ...those speeds are only achieved with the Turbo button depressed,
    otherwise it's 8Mhz for compatibility with legacy software.

  11. His name. by Anonymous Coward · · Score: 0

    [...] But Jeff Frey

    That's when I stopped reading and a train of thought departed the station.

  12. Except.... by Ancient_Hacker · · Score: 1, Informative

    Except the 5.5GHz may not be all that fast, as the Z-line of CPUs are the old IBM 360 instruction set, which is is so large, complex, and baroque that it is mostly usually implemented through a thick layer of microcode.

    So 5.5GHz may be the speed of the microcode level, the actual "machine instructions" may be a considerable sub-multiple of that.

    1. Re:Except.... by Anonymous Coward · · Score: 0

      Actually, they are supersets of the original S/360s. There are now over 1,000 different instructions (I don't remember the exact count). Many of these have some "RISC" like flavors. I like the new "compare and branch". A single instruction which does a compare of two register, or a register and immediate value, and branches if they match the comparison mask (which can be >, >=, ==, =, , and != ). Unlike previous generations which did a compare, setting the condition code register, followed by a branch. Also, these instructions do not set the condition register.

      Also, some of the instructions are "hard wired". Basically the "simple" one. The "complicated" ones are not microcoded. IBM calls them "millicoded" because the implementation is actually kept in main memory and is written in a superset of the "hardwired" instructions and some other "special" instructions which are not accessable except when the processor is in "millicode" mode. I.e. the "complicated" instructions are more like subroutine calls to special hardware subroutines.

    2. Re:Except.... by BBCWatcher · · Score: 3, Interesting

      No, that's not a correct supposition -- quite the opposite, actually. All processors, including Intel X86, use microcode (or what IBM calls millicode) to a degree. IBM knows it well. After all, they invented microcode/millicode in the System/360 in 1965. But IBM uses microcode comparatively less nowadays than other processor architectures. The vast majority of zEC12 instructions are implemented entirely in hardware, including IEEE-754-2008 decimal floating point as an example. There's some really, really interesting new stuff in the instruction set, like the first transactional memory ("transaction execution facility") instructions in a commercial server, and some "feedback" instructions that can tell Java applications/the JVM how to dynamically tune itself in a live running environment. Very cutting edge -- so cutting edge I've got to crack open some engineering manuals to try to figure out what they've done, although they probably need to write those manuals.

    3. Re:Except.... by Anonymous Coward · · Score: 0

      Excuse me but that's bull. The base instruction set is relatively clean and most code doesn't use microcode execution.

      http://www.realworldtech.com/z196-mainframe/

    4. Re:Except.... by Anonymous Coward · · Score: 0

      You said so many wrong things it's hard to know where to begin.

      z/Arch is an evolution of S/360. S/360 had very few instructions, probably less than an Intel 8080. Today's z is documented in about 1,300 pages, today's Intel x86_64 takes over 4,000 and has more instructions than z.

      The instruction set now is large in comparison with S/360 but it is not large compared to Intel, and it is certainly not complex nor baroque compared to Intel.

      IBM's hardware and OS can run mixed 24, 31, and 64 bit code in one load module (executable) and 64 bit doesn't automatically take 2x the footprint unlike Intel, who still can't get it right.

      Intel's stuff is also microcoded and implemented as RISC under the covers. You're as ignorant as you are stupid and biased. Have a nice day, luser!

    5. Re:Except.... by Guy+Harris · · Score: 4, Informative

      No, that's not a correct supposition -- quite the opposite, actually. All processors, including Intel X86, use microcode (or what IBM calls millicode) to a degree.

      At least from what I've read about the past few generations of S/3x0 chips, millicode is more like PALcode on the Alpha processor than like traditional microcode, i.e. it's a combination of regular machine code and processor-specific instructions that access specialized registers etc., running in a special processor mode with (presumably) fast entry and exit, support for said processor-specific instructions (which presumably trap in either both "problem state", i.e. user mode, and "supervisor state", i.e. kernel mode), and its own bank of general-purpose registers (part of the "fast entry and exit"). Instructions implemented in millicode trap to millicode routines that implement them.

      What IBM called "microcode" rather than "millicode" was implemented using processor-specific instructions completely different from the machine's instruction set (instructions often having fields that directly controlled gates).

      (And then there's System/38 and the pre-PowerPC AS/400, where the processor instruction set was a CISC instruction set implemented using microcode, and where the compilers available to customers generated code in an extremely CISCy instruction set that the low levels of the OS translated into machine code and ran. For legal reasons - they didn't want to have to be required to make the low-level OS code available to "plug-compatible manufacturers", i.e. cloners - they not only called the microcode that implemented the processor instruction set "microcode" ("horizontal microcode", as it probably was "fields directly control gates"-style horizontal microcode), they also called the aforementioned low level OS code "microcode" as well, even though it ran from main memory and its instruction set was the instruction set that was actually executed in application code ("vertical microcode"), and had the group working on that code report to a manager in the hardware group. See Frank Soltis's Inside the AS/400.)

      IBM knows it well. After all, they invented microcode/millicode in the System/360 in 1965.

      "Invented", no; the paper generally considered to have introduced the concept was "Microprogramming and the Design of the Control Circuits in an Electronic Digital Computer", by Maurice Wilkes and J. B. Stringer, from 1953. S/360 may have been the first line of computers to use microcode in most of the processors (S/360 Model 75 was, I think, implemented completely in hardwired logic).

      Very cutting edge -- so cutting edge I've got to crack open some engineering manuals to try to figure out what they've done, although they probably need to write those manuals.

      Well, for the previous generation, there's Volume 56, Issue 1.2 of the IBM Journal of Research and Development has some papers on the z196, but, alas, not for free online. They may publish an issue on the zEC12 at some point.

    6. Re:Except.... by Guy+Harris · · Score: 1

      and 64 bit doesn't automatically take 2x the footprint

      Are you referring to instruction density, or to data structure density with 64-bit pointers?

      unlike Intel, who still can't get it right.

      Actually, that's actually AMD's fault, if you're complaining about the x86-64 architecture (unless you blame Intel for not having done a better job than AMD).

      Intel's stuff is also microcoded and implemented as RISC under the covers.

      Yup, the whole "translate the "complicated" instructions to microops and schedule and run the microops independently" stuff is also being done in the z196 and, presumably, its zEC12 successors. As IBM zEnterprise 196 microprocessor and cache subsystem (not available for free) says:

      In the z196 microprocessor, the traditional System z CISC (RX) pipelines are split into multiple shorter latency reduced-instruction-set computing (RISC)-like execution units, and the complex z/Architecture* instructions are cracked into RISC-like microoperations.

      ("RX" means "memory-to-register or register-to-memory instructions" - they include loads and stores, but also include memory-to-register arithmetic instructions).

      In modern x86 processors (dating back at least as far as the Pentium Pro), most instructions are, as far as I know, directly implemented in hardwired logic (or translated into microops that are directly implemented in hardwired logic).

      So, at the fetch/decode/execute level, a Shiny New Core i{3,5,7} and a Shiny New zEC12 are rather similar - directly executing register-to-register ops in one clock tick, carving register-to-memory/memory-to-register instructions into microops and directly executing each microop in, I suspect, one clock tick (modulo waiting for memory in the load or store microops), and executing multiple microops in parallel, out of order, register renaming, blah blah blah. The more complicated instructions might be implemented in Shiny New x86 processors by jumping to microcode (which I suspect is made out of microops in Pentium Pro and later) and in Shiny New z/Architecture processors by a fast trap to millicode (which is z/Architecture code + some special millcode-mode-only instructions - think "PALcode"), but even that's not a huge difference.

      I.e., yes, the person to whom you're replying is very mistaken. Current z/Architecture machines (and at least the CMOS S/390's) don't interpret the instruction set in microcode, with the clock rate being the speed at which microinstructions are run, with several microinstructions being required for every instruction; I'd say "the clock rate is the instruction rate", except that the processors are superscalar, so more than one instruction could be processed in a single clock tick.

  13. Damn marketdroids by Anomalyst · · Score: 1

    How about a price list in TFS for budget planning?

    --
    There is no right to feel safe thru security vaudeville at the expense of everyone's freedom, privacy and tax money.
    1. Re:Damn marketdroids by idontgno · · Score: 1

      If you have to ask, you're not the target market.

      --
      Welcome to the Panopticon. Used to be a prison, now it's your home.
  14. No the basic Core i& extreme will smoke it too by Anonymous Coward · · Score: 0

    No the basic Core i7 Extreme will smoke it too running at normal clocks speeds. However if you're foolish enough to judge the processor by its clock speed, the Core i7 can also win that race too, simply by turning up the cooling and the clock multipler to its maximum supported (which would do 5.7ghz on my older i7). IBM's chip is water cooled BTW.

    IBM avoids benchmarking its mainframes for good reason.

  15. Overpriced crap by bored · · Score: 1, Interesting

    5.5Ghz probably makes it about as fast as a 2 year old intel machine. I should know, I have a z114 (previous generation at 3.8Ghz) that i've done extensive benchmarks on. The fact that IBM refuses to publish standard benchmark numbers (specCPU, specVM, etc) should be sufficient proof that they are not pretty.

    I can say that the people buying these things are pretty much smoking some fine IBM drugs. Sure, they are actually fairly competitive (but still not class leading) on the high end, but on the low end, which starts at ~200k, after disks and licenses, for 26 MIPS are abysmal. At that price/performance hercules on a midrange desktop PC doing software emulation (and its not even JIT'ed) runs somewhere between 5-15x as fast.

    A 26 MIP mainframe is roughly equal to a Pentium 90. A full blown 3.8 Ghz z114 is roughly equal to a 5 year old x86 server.

    Worse yet, is FICON, which generally is just a giant layer of inefficiency sitting in front of standard SCSI/SAS disks. So, the IO numbers are pretty abysmal too.

    Basically, you have to spend >$400k before the mainframe catches up to what you can do on your desktop with a free emulator.

    If your running linux on z, then your really deluded. In fact, your probably better off taking the HMCs, SEs, and CUs that it comes with and running linux on them directly. The only minor saving grace is that IBM doesn't rape people for unlocked processors to run linux (IFL's).

    Further, IBM's claims of easier manageability are a joke. I can install ESXi and a half dozen linux machines, in the time it takes an expert system programmer to setup the HCD, install z/vm, and start configuring a linux machine. Oh, and I can migrate the image with a couple mouse clicks. Plus, I don't have to manage my data stores as a bunch of tiny disk images because zOS still prefers to deal with mod3 (~3GB) and mod9 (~9GB) disk partitions. I literally have a few hundred partitions on a machine with just a couple TB of storage. If you think managing a few dozen vmware disks is a problem, multiply it by 3-8x on z to run linux.

    Frankly, if you have cobol, JCL, whatever running on these things and your not desperately trying to migrate to another platform, then your must either be extremely rich, or really stupid. The maintenance costs alone over ten years is going to save 7 figure sums, which should more more than enough to hire a couple programmers and a system administrator to port and maintain the apps on a machine that costs $20k every 5 years.

    1. Re:Overpriced crap by Wovel · · Score: 4, Insightful

      You have a point, but you missed it. At least talk in terms of modern workloads. These machines are running over 1,500 MIPS. Your talk of systems running 25-30 MIPS is silly. If your 114 is running at 25 MIPS it is broken. Really, really broken.

      No single processor desktop CPU can handle that. Even dual processors. Hercules is no where near the performance of a modern Z series mainframe.

      Can you build a server complex with more MIPS for less money? Absolutely. The question becomes what is the cost and risk of migrating that legacy application.

    2. Re:Overpriced crap by Anonymous Coward · · Score: 1

      I'm a Linux admin working on two z196 machines, everyday I want to make my job obsolete, since these overpriced hunks of IBM crap are making no sense at all. They fail against mid-range x86 Xeon rackmount server in every non-I/O benchmark. Additionally not a single business application or middleware (including pretty much everything IBM, including Tivoli* and DB2) is optimized for s390 or the z/VM virtualisation.

    3. Re:Overpriced crap by Anonymous Coward · · Score: 0

      Maybe a z196 is in the 1500-15k MIPS performance region, but the z114 really is a 25 MIPS machine at the low end. If you want a mainframe for under $1M, though, the z114 is probably what you'd get. The z196 is more like $1M-$30M! Heck, your monthly maintenance fee is probably going to be more than an entry-level z114

      dom.

    4. Re:Overpriced crap by gstoddart · · Score: 3, Interesting

      5.5Ghz probably makes it about as fast as a 2 year old intel machine. I should know, I have a z114 (previous generation at 3.8Ghz) that i've done extensive benchmarks on. The fact that IBM refuses to publish standard benchmark numbers (specCPU, specVM, etc) should be sufficient proof that they are not pretty.

      I can say that the people buying these things are pretty much smoking some fine IBM drugs

      I'm quite sure that for the applications people actually use mainframes for, you're utterly wrong.

      Not only do they scale massively higher in terms of throughput, they also manage to do it with obscene uptimes (measured in years) and reliability nothing can compare to.

      For certain kinds of applications, what you say is largely true. But at the huge end for things like banking, financial transactions, and airline reservations ... there's really no comparison.

      The maintenance costs alone over ten years is going to save 7 figure sums, which should more more than enough to hire a couple programmers and a system administrator to port and maintain the apps on a machine that costs $20k every 5 years.

      I've worked on projects trying to do exactly this. And I've seen a couple of them fail.

      Trying to map out all of the use cases for software which is mission critical and has been around since the 60's can actually prove to be exceedingly challenging if not impossible.

      I'm just not convinced that for the kinds of applications and environments where people will run mainframes that what you suggest would give the same performance or scalability as a big giant mainframe. There just seems to be something missing from that picture, and to me it's the sheer volume of stuff these things handle. Certainly not even in the same category as what you call a midrange desktop.

      --
      Lost at C:>. Found at C.
    5. Re:Overpriced crap by Lawrence_Bird · · Score: 1

      You shouldn't be using a mainframe if you are making these types of arguments. Mainframes were never meant to be the fastest at single tasks where a mips rating might be relevant. They are meant for processing enormous amounts of data/transactions with high throughput and reliability (including fault tolerance). People aren't spending this kind of dough on something they don't need or think they could get for cheaper/better elsewhere. Wasn't the mainframe declared dead in the 80s? 90s? 2000? Where are the competitive systems you seem to think are possible? Quit your job and go make some. Just don't collect unemployment when you fail.

    6. Re:Overpriced crap by Jeremy+Erwin · · Score: 2

      They fail against mid-range x86 Xeon rackmount server in every non-I/O benchmark.

      But what if you need I/O?

    7. Re:Overpriced crap by bored · · Score: 1

      I'm quite sure that for the applications people actually use mainframes for, you're utterly wrong. Not only do they scale massively higher in terms of throughput, they also manage to do it with obscene uptimes (measured in years) and reliability nothing can compare to.

      No, this is where you are wrong, open system are far more advanced in both processing and IO capabilities. In fact with the latest x86's the RAS features are equivalent or better. If you had actually maintained a mainframe for any length of time you wouldn't be spewing this. They get IPL'ed (rebooted) regularly just like any other compute device in the data center. Sure you may only be IPL'ing an LPAR, but that isn't any different than what I do with vmware when I reboot or migrate an image. In fact vmware vmotion is actually is more robust than anything i've seen on z.

      Modern SSD, FC, ethernet and inifiniband connections on x86 are light years beyond the mainframe. The idea of off loading IO operations to channel processors, has been on x86 hardware for years now. Modern x86 disk IO is little more than queue the request with a DMA pointer, and wait for the hardware to notify you its in memory. Any given x86 server probably has a half dozen embedded ARM's or whatnot sitting the the ASICs from broadcom/qlogic/etc. Companies like FusionIO, make PCIe SSD's that by themselves allow entry level x86 servers to compete on IOP benchmarks with 8 figure mainframes.

      Besides there is more than x86, IBM's own POWER is better, at significantly less cost.

      I've worked on projects trying to do exactly this. And I've seen a couple of them fail.

      Trying to map out all of the use cases for software which is mission critical and has been around since the 60's can actually prove to be exceedingly challenging if not impossible.

      This is actually, where your sorta right. Like any other software project migrations of proprietary apps can be extremely painful. That said, lots of times, the migrations are failing not because of the migration itself, but that people are trying to fix all the problems with the mainframe software at the same time. Rarely do this failures have anything to do with the technology of the mainframe vs anything else. Instead they fail for all the same reasons any other large software project fails. The return on doing it though is almost easy to justify, which is why there are hundreds of companies doing exactly this. One of my previous jobs was similar, we would walk in with a pair of x86 servers and replace a 7-8 figure mainframe. Our whole solution cost less than a month of maintenance, not counting the army of support personnel, maintenance, licensing, etc.

    8. Re:Overpriced crap by bored · · Score: 1

      here are the competitive systems you seem to think are possible? Quit your job and go make some. Just don't collect unemployment when you fail.

      BTW: My day job in the early 90's was working for a very successful company selling a niche application to county/city governments. In nearly every case, we were replacing mainframes. Good luck finding a mainframe in that particular space. We had a couple competitors doing exactly the same thing. By the late 1990's finding a mainframe in that space was hard. They are gone, replaced by unix servers. Outside of some really rich companies in the banking/insurance industries its difficult to find a mainframe today. For every company you name running a mainframe in their core business I can probably name two running an AS400, or an AIX machine. The companies still running mainframes aren't doing it because zos is better, or the machine is more powerful, or it can handle more TPM.

    9. Re:Overpriced crap by Guy+Harris · · Score: 1

      Modern SSD, FC, ethernet and inifiniband connections on x86 are light years beyond the mainframe.

      Are they behind the Fibre Channel, Ethernet, and Infiniband connectors in the zEC12 mainframe? (Presumably by "SSD" you mean something other than "solid state drive", given that a "solid state drive" is a type of secondary storage, not a connector.)

    10. Re:Overpriced crap by gstoddart · · Score: 1

      In fact vmware vmotion is actually is more robust than anything i've seen on z.

      Well, I'd certainly believe that vmware has gotten a lot right. I haven't worked in a place that doesn't have a large vmware infrastructure in quite some time.

      This is actually, where your sorta right. Like any other software project migrations of proprietary apps can be extremely painful. That said, lots of times, the migrations are failing not because of the migration itself, but that people are trying to fix all the problems with the mainframe software at the same time.

      Well, the ones I worked on had been written in the 60s. Yes, we were trying to give them modern GUIs and the like, but the longer we worked with it, the more we kept coming back to things that they swore up front would never ever happen, and that happened all over the place. So even just trying to get all of the little undocumented bits and corner cases was proving to be an impossible task. The software was also used for keeping track of some very large and complicated bits of machinery (all I can really say about that), some of which literally had 40 years worth of data associated with them, some newer. None of the assumptions they told us to build the system on proved to be true as we got deeper, which made attempts to adjust our system impossible (we had built lots of stuff to preclude what was subsequently shown to be normal data).

      One of my previous jobs was similar, we would walk in with a pair of x86 servers and replace a 7-8 figure mainframe. Our whole solution cost less than a month of maintenance, not counting the army of support personnel, maintenance, licensing, etc.

      I will have to take you at your word for that. The people I've known who still have contact with mainframes are quite insistent that you could never get anywhere close to the performance of a mainframe with a couple of x86 boxes. Maybe for some apps, but certainly not across the spectrum of what they use them for.

      It just seems implausible to me that people would still be buying these things if they could replace it that easily ... it actually boggles the mind to think that. Otherwise everyone would have done that by now.

      These are actual enterprise apps like you'd see in a fortune 500? Or departmental solutions? Like I said, the last thing I'd expect is that you can truly replace those beasties with a couple of PCs -- if for nothing else, the reliability and uptime you can get.

      The only industries I've ever been involved in that use them treat the 7-figure maintenance on them to be cost of doing business, because they have more zeroes in their daily stuff. Hell, the machines alone cost 9-figures, and over their lifetime affected at least one or two more digits.

      --
      Lost at C:>. Found at C.
    11. Re:Overpriced crap by bored · · Score: 1

      But what if you need I/O?

      Then you buy a high end Fiber channel or infiniband disk array for your x86. Or for that matter you go cheap and buy a fusionIO, and beat an 8 figure mainframe. IO on a modern x86 is usually limited by the peripheral, not by the bus or memory bandwidth. Its fairly easy to drive 10's of GB (bytes!)/sec of IO bandwidth on an x86. The problem is finding a network link to support it, or a disk farm to source it from.

    12. Re:Overpriced crap by DavidHumus · · Score: 2

      You have no idea what you're talking about.

      How many (hundreds) of simultaneous users will your cheap configuration support? What (fraction of a percent) is your unplanned downtime under load?

      Comparing mainframe MIPs to PC MIPs makes no sense - PCs have nowhere near the throughput or reliability. I used to work on a mainframe when PCs first came out. Even then, it was clear that the two or three or four MIPs on the PC were in no way superior to the 1 MIP on a 4341 mainframe - the mainframe supported about a dozen users doing moderately compute-intensive tasks. At that time, there was no configuration to allow the PC to handle more than one user, but even if that had been possible, it would have choked on the throughput for two or three.

    13. Re:Overpriced crap by bored · · Score: 1

      Yes, they tend to lag about a generation.

      You can buy 16Gbit FC from IBM for x series. The z only has 8G. Ethernet is 10G on OSA, 40G Ethernet is available.

      Basically, the open systems peripheral market is where all the cutting edge stuff is. No one who has a great idea for how to make a faster/better IO adapter limits themselves to selling 100 of them into the mainframe space. Especially when they can get purchased for billions of dollars by the likes of Dell, EMC and HP.

      When it comes to SSD's I was talking solid state, which can be attached via FC on the z, but the performance is nowhere near what can be achieved with something like the fusionIO PCIe based adapters. FICON really limits the per pipe IOP rates, so you end up throwing dozens and dozens of ports into the mix to get the IO rates up, especially if there is any IO latency.

    14. Re:Overpriced crap by Guy+Harris · · Score: 1

      When it comes to SSD's I was talking solid state, which can be attached via FC on the z, but the performance is nowhere near what can be achieved with something like the fusionIO PCIe based adapters.

      So how about attaching them to the z with a fusionIO PCIe-based adapter? "Overview of IBM zEnterprise 196 I/O subsystem with focus on new PCI Express infrastructure" says that PCIe adapters can be directly attached. Perhaps there are no z/OS drivers for them, but Linux drivers might exist. You can't directly memory-map PCI devices - special instructions are required - but, at least as I remember from my NetApp days, on Alpha you couldn't necessarily make the same sort of direct references to PCI space that you could on x86, so Linux might provide kernel APIs for accessing PCI space rather than having drivers directly make memory-mapped accesses to registers, so those instructions could be put behind those APIs on the z/Architecture port.

      (I.e., in that particular case, it's probably a software issue, not a hardware issue.)

    15. Re:Overpriced crap by bored · · Score: 1

      Perhaps there are no z/OS drivers for them, but Linux drivers might exist.

      The only PCIe adapters you can plug in are ones sold by IBM for the z. Getting them working under zos is pretty much a non starter, zos is _STUPID_ it can't even talk to normal FC attached disks even though the adapter can do it under linux.

      If you want to have a lot of fun hacking a z PCIe layer into linux you might get it working. That is after you hack up zvm to allow passthough, or the LPAR code... Linux is only sort of running on the hardware, think vmware without pci passthrough. Basically, you need to be able to modify the equivalent of vmware before linux even gets a view of the device.

      This is what lspci says when I run it under sles on a z114 stuffed with pcie adapters.

      pcilib: Cannot open /proc/bus/pci
      lspci: Cannot find any working access method.

      This is /sys/bus
      drwxr-xr-x 4 root root 0 Jun 12 15:10 ccw/
      drwxr-xr-x 4 root root 0 Jun 12 15:10 ccwgroup/
      drwxr-xr-x 4 root root 0 Jun 12 15:10 css/
      drwxr-xr-x 4 root root 0 Jun 12 15:10 event_source/
      drwxr-xr-x 4 root root 0 Jun 12 15:10 platform/
      drwxr-xr-x 4 root root 0 Jun 12 15:10 scsi/
      drwxr-xr-x 4 root root 0 Jun 12 15:10 virtio/

      Never underestimate how stupid this machine is.

    16. Re:Overpriced crap by linatux · · Score: 2

      I've seen a couple of 'get off the Mainframe' projects "succeed".

      They got systems off the mainframe, but it took years, was a very expensive process & the resulting heap of servers didn't save any money. Reliability goes downhill, manageability goes downhill, bang-for-buck goes downhill. Oh, and they still have a mainframe! (some things get moved 'out of scope')

      I still get paid though :-)

  16. Too bad TurboHercules collapsed by Jeremy+Erwin · · Score: 1

    We could have gotten some meaningful benchmarks. According tho this Register arcticle

    When you add it all up, the single-engine performance of a z12 chip is about 25 per cent higher than on the z11 that preceded it. IBM has not released official MIPS ratings (a throwback to the days when IBM actually counted the millions of instructions per second that a machine could process) for the z12 engines, but given that the top-end core in a z11 processor delivered 1,200 MIPS, that puts the z12 core at around 1,600 MIPS.

    Back when TurboHercules was still around, in 2009, Tom Lehmann claimed

    By the by, we can run a reasonably sized load (800MIPS with our standard package). If the machine in question is larger than that, we can scale to 1600MIPS with our quad Nehalem based package and we have been promised an 8 way Nehalem EX based machine early next year that should take us to the 3200MIPS mark. Anything bigger than that is replicated by a collection of systems.

    On the other hand, if your old and creaky code can't be divvied up among a multiplicity of cores, the existence of a far cheaper 64 core, 8 way Nehelem EX machine (or its current equivalent) that's almost as fast as a single zEC12 core doesn't much matter.

    1. Re:Too bad TurboHercules collapsed by Jeremy+Erwin · · Score: 1

      Arrgh
        That last sentence should be "On the other hand, if your old and creaky code can't be divvied up among a multiplicity of cores, the existence of a far cheaper 64 core, 8 way Nehelem EX machine (or its current equivalent) that's only twice as fast as a single zEC12 core shouldn't much matter."

    2. Re:Too bad TurboHercules collapsed by BBCWatcher · · Score: 1

      OK, now go license 64 cores of Oracle DB (for example) and get less performance than one core on a zEC12, as you say. I'll help you out: you'd probably pay about $1.5M in database software licensing plus $300K+ in annual maintenance for your 64 X86 cores versus $47K and $9.4K on a zEC12 core. And that's one cost factor among many, not the only one. So which server is "cheaper"? Is a bicycle cheaper than a truck? (Not an Olympic racing bicycle, probably.) It depends on what you're trying to do. Though I've noticed that the average Slashdot poster hasn't a freakin' clue about IT economics, sadly.

    3. Re:Too bad TurboHercules collapsed by bored · · Score: 1

      Those are emulated cores under hercules. If you were running oracle you would run them natively on the cores, and in that case its closer to 1:1 with the mainframe.

    4. Re:Too bad TurboHercules collapsed by Wovel · · Score: 1

      Huh? I think his Orale example misses the point, but your statement is a bit off. In any case. I doubt you see a lot of people going the Orale on Z route.

    5. Re:Too bad TurboHercules collapsed by bws111 · · Score: 1

      The numbers provided by TurboHercules are most certainly complete bullshit. Actual MIPS are determined by running standard benchmarks against simulated workload. A 1200 MIPS machine is going to be driving a whole lot of I/O in those benchmarks, and there is no way that Hercules emulated processor and emulated I/O is going to be able to pull that off.

      If they didn't test with IBMs standard LSPR tests, their numbers are useless.

  17. Re:No the basic Core i& extreme will smoke it by BBCWatcher · · Score: 4, Informative

    OK, here's a benchmark. You're welcome to try running an entire large bank (for example) on one server -- your choice. OK, two servers: I'll allow you one additional for off-site disaster recovery of all development, test, and production workloads, including concurrent batch and online, for all the bank's security zones. Choose wisely, Grasshopper.

  18. Benchmarks? by noname444 · · Score: 2

    I'll believe their claims when I see some test results they can back it up with.

    1. Re:Benchmarks? by BBCWatcher · · Score: 1

      Only test results? (Yes, 5.5 GHz is fast. A test -- or even a spec sheet -- will tell you that.) But aren't real world results more useful? Go visit any large bank's (for example) data center if they'll let you. How many transactions, how much batch, etc. (and concurrently) do they push through their (one or two) IBM mainframe(s)? And has it ever quit? Is it secure? Does it...work?

    2. Re:Benchmarks? by Anonymous Coward · · Score: 0

      I have actual benchmarks at work, and a Xeon 2.4 Ghz beats a z196 5.2Ghz cpu by far in pretty much every non-I/O benchmark.
      And from my experience I would say the mainframe isn't more secure than a x86 box.

    3. Re:Benchmarks? by bws111 · · Score: 1

      And non-I/O workloads are ever so common in enterprise computing.

  19. z114, 26 MIPS, Corei7 177730 MIPS by Anonymous Coward · · Score: 1

    Entry level z114 is indeed 26 mips for $75000.

    http://www.tech-news.com/publib/pl2818.html

    Which is a joke surely? $400,000 will get you 330 mips, which is erm, surely a mistake???!! It's way way too low:

    http://en.wikipedia.org/wiki/Instructions_per_second

    Core i7 is 177,730 MIPS at 3.3 Ghz.

    1. Re:z114, 26 MIPS, Corei7 177730 MIPS by Guy+Harris · · Score: 1

      Entry level z114 is indeed 26 mips for $75000.

      http://www.tech-news.com/publib/pl2818.html

      Which is a joke surely? $400,000 will get you 330 mips, which is erm, surely a mistake???!! It's way way too low:

      http://en.wikipedia.org/wiki/Instructions_per_second

      Core i7 is 177,730 MIPS at 3.3 Ghz.

      I suspect that the "MIPS" figures for IBM mainframes do not, in fact, represent a count of the number of instructions executed per second, in units of one million instructions. I don't know how the "MIPS" figures are generated, but I suspect they're intended solely to be treated as a relative CPU performance figure for comparing two machines. As such, they probably can't be validly compared to other "MIPS" figures measured in some way different from the way IBM mainframe "MIPS" figures are measured.

      The 177,730 MIPS figure is a "Dhrystone MIPS" number; as the Wikipedia article says, "Another common representation of the Dhrystone benchmark is the DMIPS (Dhrystone MIPS) obtained when the Dhrystone score is divided by 1757 (the number of Dhrystones per second obtained on the VAX 11/780, nominally a 1 MIPS machine)." There is no guarantee that Dhrystone "MIPS" numbers correspond at all to IBM "MIPS" numbers.

    2. Re:z114, 26 MIPS, Corei7 177730 MIPS by bored · · Score: 1

      There is no guarantee that Dhrystone "MIPS" numbers correspond at all to IBM "MIPS" numbers.

      Correct, a MI (million instructions) on the z, isn't equal to a MI on any other platform. That said IBM rates their machines in "MIPS", for comparison purposes. A P90 is rated at roughly 70 Dhrystone MIPS per (http://www.alternatewars.com/BBOW/Computing/Computing_Power.htm). When I stated they there are roughly the same performance I meant it. So, you can use that as a conversion factor. Given the inaccuracies of the benchmarks/etc, you could just multiply a mainframe MIP by 3 to get a rough approximation to a x86 dhrystone MI. Of course any given benchmark is going to be a little higher or lower than this depending on what its doing.

    3. Re:z114, 26 MIPS, Corei7 177730 MIPS by Anonymous Coward · · Score: 0

      You forgot to quote: "Equipment price and maintenance estimates are those of Technology News."

      Might as well go to Samsung for pricing on Apple equipment...

    4. Re:z114, 26 MIPS, Corei7 177730 MIPS by Guy+Harris · · Score: 1

      Correct, a MI (million instructions) on the z, isn't equal to a MI on any other platform.

      A million instructions on instruction set architecture A isn't equal to a million instructions on instruction set architecture B, for all values of A and B (modulo "A" being "32-bit X" and "B" being "64-bit X", perhaps, or other cases where A and B are variants of the same ISA). There's nothing unique here about S/360 and its descendants.

      That said IBM rates their machines in "MIPS", for comparison purposes.

      Unless they actually count instructions, they should perhaps call them "zUPS" or something such as that, along the lines of DEC publishing VUPs (VAX Units of Performance) for VAXes.

      A P90 is rated at roughly 70 Dhrystone MIPS per (http://www.alternatewars.com/BBOW/Computing/Computing_Power.htm). When I stated they there are roughly the same performance I meant it.

      So what benchmark did you run to determine that a Pentium P90 had the same performance as a base z114?

    5. Re:z114, 26 MIPS, Corei7 177730 MIPS by bws111 · · Score: 1

      Where does IBM rate their machine in MIPS?

    6. Re:z114, 26 MIPS, Corei7 177730 MIPS by bored · · Score: 1

      So what benchmark did you run to determine that a Pentium P90 had the same performance as a base z114?

      A bunch of in house stuff, as well as some standalone open source benchmarks I could get my hands on, and would compile under OMVS. I use the P90 example because that is what nbench scored the single core performance as (single threaded, fairly small working set), and the variation in its results were fairly consistent with a number of other benchmarks I was running. Obviously changing the weighting could shift the benchmarks significantly in either direction as there was a couple x variation in the results. The IO benchmarks were a different beast, but in many cases there was sufficient CPU load that they were CPU bound, enough that the aggregate raw IO and throughput rates were what I would call appropriate in the 1990s. If you want to donate a SPEC license....

      I also tested basically the same things under a SLES install running on some IFL's to get a feeling for the raw system performance. It was significantly better (duh!), but not enough that I would consider it a valid machine to host actual workloads even without the price tag. If a fully licensed 3k MIPS machine were priced in line with a lower midrange x86 then it might be a contender, but I can buy a whole rack of high end x86s, and a decent disk subsystem for the prices IBM wants for even a midrange z114. My seat of the pants estimates put the z at about 10-20x the cost for similar performance.

      Basically, if your a big bank who cares what it costs. But for most companies outside of the fortune 100 throwing that kind of money away on a fairly small problem is probably hard to justify. You want to see what real high transaction rate systems look like today, just look at google, facebook and amazon.

    7. Re:z114, 26 MIPS, Corei7 177730 MIPS by Guy+Harris · · Score: 1

      Where does IBM rate their machine in MIPS?

      In the IBM zEnterprise z196 server overview:

      The zEnterprise 196 (z196) is a workload optimized system, that can scale up (over 52,000 MIPS in a single footprint), scale out (80 configurable cores) and scale within (specialty engines, cryptographic processors, hypervisors) executing in an environmentally friendly footprint. ...

      and in the IBM zEnterprise EC12 Technical Guide:

      The zEC12 is designed with improved scalability, performance, security, resiliency, availability, and virtualization. The superscalar design allows the zEC12 to deliver a record level of capacity over the prior System z servers. It is powered by 120 of the world’s most powerful microprocessors running at 5.5 GHz and is capable of executing more than 75,000 millions of instructions per second (MIPS). The zEC12 Model HA1 is estimated to provide up to 50% more total system capacity than the z196 Model M80.

      for example.

    8. Re:z114, 26 MIPS, Corei7 177730 MIPS by BBCWatcher · · Score: 1

      IBM no longer rates their servers in MIPS, actually. They rate them in PCIs and rPerfs and CPWs.

    9. Re:z114, 26 MIPS, Corei7 177730 MIPS by Anonymous Coward · · Score: 0

      Actually, IBM documents what they use to measure and rate performance per machine here:

      https://www-304.ibm.com/servers/resourcelink/lib03060.nsf/pages/lsprindex

      and publish a quick overview of the metrics and an explanation what MIPS means here:

      https://www-304.ibm.com/servers/resourcelink/lib03060.nsf/pages/lsprindex/$file/SC28118716.pdf

      Quote: "While MIPS tables may be useful for rough processor positioning, they should not be used for capacity planning purposes. Single-number processor capacity tables are inherently prone to error because they are not sensitive to the type of work being processed or to the LPAR configuration of the processor."

      MIPS is just a single number to show that system A with 500 MIPS is 10x fast than System B with 50 MIPS. It has absolutely no scientific value to it. If you really want to know how "fast" a machine is you need to run your target application on it.

  20. Re:No the basic Core i& extreme will smoke it by bws111 · · Score: 2

    What exactly are you basing your claims on? Just pulling things out of thin air?

    Here are some things that IBMs customers care about, where are the Core i7 Extreme numbers for these?

    How many CICS transactions can I process per second? How many IMS updates? How about DB2 transactions? How many SSL transactions? What differences are there in performance for on-line vs batch processing? Can I tune the system to maximize performance for my particular workload?

  21. Re:Do you believe in fairies too? by BBCWatcher · · Score: 2

    So you don't like my benchmark then and want another benchmark? OK. I chose a perfectly reasonable benchmark: number of servers (X) to deliver a particular real-world business outcome, where smaller X is better. A benchmark is simply a measurement to assess particular criteria (such as X) against a particular outcome (such as running a bank). I can agree that that an IBM zEnterprise EC12 server is not the answer to every IT problem. It is, however, the answer to many. And if you can't agree to that, then you simply have more to learn. (How exciting!)

  22. cat TFA | sed -e 's/Flash Express/Cache Express/g' by hAckz0r · · Score: 1
    The article seems to have typo-ed in the editing phase. The technology is "Cache Express" not Flash Express. Flash memory is SLOOOOOwwww memory. Do a Google for "IBM L2 Cache Express" if you are interested.

    With flash memory you read a block, flip some bits, and write it back to modify that block. Not only that, but Flash memory will wear out after so many reads and writes. That would be devistating to a CPU.

  23. Re:Do you believe in fairies too? by Anonymous Coward · · Score: 0

    If you are trying to claim that you do telecoms billing on a single x86 server, I am going to claim that you are either at a very small telecom, or are lying.

    You claim that mainframes 'can't handle the load', then you claim 'there are no benchmarks'. Well, which is it?

    Anyone who decides what machines to use for a major installation such as a telecom based on 'benchmarks' is a complete moron. Unless the benchmark happens to match your workload exactly (and they never do) the benchmark is worthless. The only proper way to benchmark is to try YOUR workload on multiple machines, then make a decision. I am guessing that you are not even aware that you can take your workload to IBM to benchmark it, are you?

  24. Thanks, I've already found some Benchmarks by Anonymous Coward · · Score: 0

    It seems the Z114 class at least is benchmarked, their entry level $75k server is 26 mips, which would buy you a big rack of Core i7 servers (each with 177,730 MIP, i.e. 4500 times faster)

    http://www.tech-news.com/publib/pl2818.html

    So as my own experience of IBM mainframes tells me, they're just too slow. You can claim some magic security gain, but the reality is they don't have enough processing power to do any extra security checks. You can claim extra reliability, but then for the same money I can buy 10 servers and have 10 mirrors running. You can make some vague 'particular real-world business outcome' claim, but I have to prepare real world bills in real world time, and sales talk doesn't crunch numbers.

    1. Re:Thanks, I've already found some Benchmarks by bws111 · · Score: 4, Informative

      OK, let's put some of this stupidity to rest.

      First, nobody who knows anything uses MIPS to compare perfomance between two different architectures. MIPS is only marginally useful in the best of conditions, and even then is only useful as a relative measure between two machines of the same architecture running the same workload.

      Second, Core i7 servers execute 178 BILLION instructions every second, on average? Seriously? 80 instructions per clock cycle, sustained? Bullshit.

      Third, your nice shiny rack of Core i7 servers doesn't mean anything if it can't run your software.

      Fourth, the actual performance of a Z114 processor is around 780 MIPS, not 26. So why do they have that 26 MIPS 'dialed down' model? Because some customer asked for it. Why would a customer pay $800K for a 780 MIPS machine when he only has 26 MIPS of workload? Why would the customer pay software licensing fees for a 780 MIPS machine when he only has 26 MIPS of workload?

      Fifth, 'your experience' with IBM mainframes is non-existant, or you wouldn't be making these stupid mistakes and claims.

    2. Re:Thanks, I've already found some Benchmarks by Jeremy+Erwin · · Score: 1

      Your 177730 MIPS figure is mirrored by this wikipedia page. Using the same criteria, 30 MIPS is around a 33 MHz 80486,or perhaps even a 68040.

      Unless you have an irrational suspicion of IBM, it's fairly reasonable to assume that a mainframe MIP is not a Dhrystone MIP.

    3. Re:Thanks, I've already found some Benchmarks by mlts · · Score: 3, Informative

      CPU isn't the single item with mainframes. Mainframes tend to have large I/O buses, and that is something that tends to be forgotten about when people talk about CPU power.

      Mainframes are designed to do business tasks, be it CICS operations, DB2 transactions, or other integer based operations that require tons of data going in and tons of data going out at a time. This is why IBM has such a good caching design. Having the ability to get the numbers into and out of the CPUs is what mainframes are designed to do.

      If someone expects top notch floating point operations, expect to be disappointed. MIPS and sheer bus bandwidth rule the roost when it comes to this section of computing.

    4. Re:Thanks, I've already found some Benchmarks by Guy+Harris · · Score: 1

      MIPS is only marginally useful in the best of conditions, and even then is only useful as a relative measure between two machines of the same architecture running the same workload.

      I rather suspect that "MIPS", these days, doesn't measure the how many millions of instructions a processor executes per second. I don't know what the "MIPS" figures for IBM mainframes count, but the figure everybody's quoting for the Core i7 processor is "Dhrystone MIPS", which, as the Wikipedia article says, is "obtained when the Dhrystone score is divided by 1757 (the number of Dhrystones per second obtained on the VAX 11/780, nominally a 1 MIPS machine". Unless the "MIPS" figure for IBM mainframes represents Dhrystone MIPS, and I rather suspect it doesn't, comparing the IBM mainframes "MIPS" figures with the Dhrystone "MIPS" figure is, as you note, bogus. Comparing zEC12 Dhrystone "MIPS" with Core i7 Dhrystone "MIPS" might be more meaningful, modulo the benchmarking limitations of Dhrystone.

      Second, Core i7 servers execute 178 BILLION instructions every second, on average? Seriously? 80 instructions per clock cycle, sustained?

      Nope. As per the above, what they do is run Dhrystone, as compiled with some compiler with some particular set of options, about 117,000 times faster than a VAX-11/780 ran Dhrystone, as compiled with some other compiler with some particular set of options. I don't know whether there's any information on how much faster than a VAX-11/780 a zEC12 can run Dhrystone; I would not be surprised to hear that it's somewhere in the 50,000 to 150,000 range.

    5. Re:Thanks, I've already found some Benchmarks by bored · · Score: 1

      Seriously? 80 instructions per clock cycle, sustained? Bullshit.

      Thats caused by people multiplying the single core numbers by the core/thread count. You can easily buy an 80 core x86's (HP DL980G7). Which leaves the IPC at only 1 (using your number of 80 IPC), which is probably actually really low for that machine considering the cores are super-scalar, and its hyperthreaded.

      That is in fact what IBM does with their zseries too, the single core numbers are only like 1.3k MIPS, times 64 or whatnot for the bigger configurations.

    6. Re:Thanks, I've already found some Benchmarks by BBCWatcher · · Score: 1

      Actually, it has that too now: IBM introduced hardware decimal floating point in 2008 to its mainframes (IEEE754-2008). Only IBM seems to have done that (on POWER7 as well). The zEC12 has that on every core; crypto too.

  25. Telecom Billing is a Miserable Failure by Anonymous Coward · · Score: 0

    Given the faults I've seen with telecom billing at every level (POTS, cell, trunk, global) I'm going to go with the "Your example is best used as a counter-example". By the way, how do you know they can't handle the load when you don't have any benchmarks? They're all bullshit, but there's a benchmark relevant to most business problems.

  26. Re:cat TFA | sed -e 's/Flash Express/Cache Express by BBCWatcher · · Score: 1

    No, no typo. There's indeed Flash Express -- and yes, IBM's engineers have figured out a way to add yet another memory tier using (very high quality) flash memory. The processor can directly address it -- it's all mapped within the 64-bit virtual address space from what I've read. Yes, it's slower than DRAM but it's faster than storage-attached SSD (which at least has a longer distance to travel). Flash Express is great for things like paging, memory dumps, gigantic in-memory databases, and certain things that Java wants, so that's how operating systems and databases will use it. IBM even encrypts everything that lands on this memory-addressable flash, just in case someone tries to physically rip it out of the server. (Yes, they thought of that.)

  27. Re:CPU 6 core and clock frequency by Guy+Harris · · Score: 2

    Hmmm, six cores with each running at 1 ghz equals 6 ghz with a 5% overhead makes it 5.7 ghz maximum... IBM Marketing!!!!

    And the published information supporting your assumption that the cores are only running at 1GHz, and the 5.7 GHz comes from multiplying the clock rate by the number of cores and subtracting 5% as overhead, rather than each core truly running at 5.7 GHz, is?

  28. Re:Do you believe in fairies too? by Nerdfest · · Score: 1

    This ius what I've seen woring in a mainframe shop as well. The performance is not great, and the OS and tools were horrid (this is z/OS, not Linux). The costs were astonomical for the performance as well. The only thing they can really clain is very good reliability, but in the end, it's human error that gets you every time. We had well administered Windows servers running database, etc, that were kicking the mainframe's ass in both performance and in uptime (systems, not hardware). If you never change *anything* that might cause problems, you'll have a great uptime, but so would a cluster of linux boxes, with better price and performance. There are very few workloads where a mainframe is a benefit, and the only thing keeping most peple there is the difficulty in leaving, requiring re-writing software and tools.

  29. CICS by big+dumb+dog · · Score: 1

    Long live CICS!

    --
    "Seven years of college down the drain. Might as well join the f-ing Peace Corps." - John 'Bluto' Blutarsky
  30. The Emperor has no clothes by Anonymous Coward · · Score: 1

    Points 1,2,3 apply to this chip too. At the end of the day,its a chip running Linux timeslices and Java. It can be benchmarked and it can be compared. Even if IBM runs away from comparisons.

    Point 4, The table lists an entry server of 26 MIPS for $75000 which will buy you a big rack of Corei7s. You mention 780 MIPS, the register article (mentioned in a comment lower down) estimates 1600 for the top of the range chip. i.e. 1% of the processing power of the i7.

    Presumably that's a top of the range price in millions, but lets ignore that for a second.

    If I switched computers to this IBM mainframe, from its current rack of 4 Corei7s I would have 0.25% of the processing power. I would firstly probably ditch the integrity checks, and security checks, they're expensive to calculate and I don't have the processing power. If the floating point is as bad as the MIPs then I would probably have to switch some of the calculations from float to integers or fixed point math, and round, again with lots of problems and contractual headaches. I would calculate the bill less often and not be able to update the live online bill, again a result of the lack of processing power. We would raise prices, this is due to the high cost of the mainframe.

    The consequence of vague claims, not backed up by hard reality would be devastating.

    After a lot of vague talk from you, when forced to you finally make a benchmark claim. 780MIPS and its pitiful, even if it was a $1000 computer it would be pitiful.

    I'm now wondering if my tablet PC (Asus tf700 quad core 1.6Ghz) is faster than your mainframe, because these numbers from you and others who've benchmarked IBM kit, are sooo low.

  31. it is..relatively speaking by Chirs · · Score: 1

    I would argue that the jump from machine code to assembly to C is much smaller than the jump from C to lisp/bash/perl/prolog

  32. BBCWatcher == IBM Employee by Anonymous Coward · · Score: 0

    Seems someone is astro-turfing quite a lot. Some of the cowards sound suspiciously like him as well. And the lingo is exactly hte one you hear from IBM sales people.

    While I do think that the Mainframe is underappreciated and am happy about the attention on Slashdot, I'm not very fond of such shady tactics... Either state that you're an IBM employee trying to market your product or don't pretend to just be a Slashdoter without an agenda and shut up. Thanks

  33. don't blame intel for size of 64-bit binaries by Chirs · · Score: 1

    The x86_64 cpus support a mode called x32 where they use the 64-bit CPU mode but with 32-bit pointers. The hardware supports it, but there is relatively little software support. A Linux port is currently in progress.

    1. Re:don't blame intel for size of 64-bit binaries by Anonymous Coward · · Score: 0

      No the hardware does not really support it: you have to make sure that your addresses don't go beyond 4GB. Hardware support would mean hardware clipping of addresses, as in Power or z (and I believe MIPS). Well, actually z has 24 (for paleolithic code), 31 (not 32) and 64 bit modes.

      It is trivial to generate a bad address on x86_64 in X32 mode with a negative value in an index register, even if you've only used 32 bit instructions to load the
      registers (which clear the upper 32 bits).

  34. MOD PARENT OVERRATED (it is factually wrong) by INowRegretThesePosts · · Score: 0

    L3 cache is 48GB

    This is insane : you could run a full OS install just from the L3 cache !!!

    Yes, you could do that. Multiple images, actually. And that's basically what these servers do automatically.

    Wrong. See http://hardware.slashdot.org/comments.pl?sid=3078075&cid=41151983

    MODS: mod it down until it is at score 1 (no need to go to -1 and burn the guy's Karma).

    And to BBC Watcher: nothing personal.

    1. Re:MOD PARENT OVERRATED (it is factually wrong) by Anonymous Coward · · Score: 0

      The part that is factually wrong is part of the AC's post that BBCWATCHER did not quote and it was not part of his post at all.

      Sorry, but you quite wrong and you should be modded down.

      And JOrgePeixoto, nothing personal, but you have shit for brains.

    2. Re:MOD PARENT OVERRATED (it is factually wrong) by INowRegretThesePosts · · Score: 0

      When BBCwatcher said "Yes, you could do that.", he was clearly agreeing with the AC.
      Besides, the AC was talking about running an OS install from L3 cache. BBCwatcher said you could run multiple images.
      And sure as Hell, multiple images of a typical enterprise OS install do not fit into 48MB.

    3. Re:MOD PARENT OVERRATED (it is factually wrong) by fm6 · · Score: 0

      Jeez, talk about overreaction. It's a simple mistake. We all make them.

  35. MOD PARENT OVERRATED (it is factually incorrect) by INowRegretThesePosts · · Score: 1

    L3 cache is 48GB

    Wrong. See http://hardware.slashdot.org/comments.pl?sid=3078075&cid=41151983

    MODS: mod it down until it is at score 1 (no need to go to -1 and burn the guy's Karma).

    And to jthill: nothing personal.

  36. Re:No the basic Core i& extreme will smoke it by Guy+Harris · · Score: 1

    Here are some things that IBMs customers care about, where are the Core i7 Extreme numbers for these?

    How many CICS transactions can I process per second? How many IMS updates?

    Well, you're unlikely to get numbers for the first of those, given that IBM apparently killed off CICS for Windows and I'm not sure which x86 UN*Xes, if any, got versions of CICS. I'm not sure to what extent TXSeries for Multiplatforms would let you, for example, run CICS on Windows Server or Linux.

    As for the second, as far as I know, IBM's never ported IMS to any non-mainframe OS.

    How about DB2 transactions?

    About 13,000 XML transactions per second in at least one benchmark - but those were Xeons, not Cores (server rather than desktop/laptop processors).

  37. Re:MOD PARENT OVERRATED (it is factually incorrect by Anonymous Coward · · Score: 0

    Looks like a little someone had all their karma go by by cause he is a fucking asshole and now is trying to burn just whomever.

    jOrgePeixoto, nothing personal, but you really should just kill yourself.

    Oh and MODS, just burn this asshole down.

  38. Re:No the basic Core i& extreme will smoke it by bws111 · · Score: 1

    Well, yes, that was my point. The workloads run on mainframes are different than the workloads run on other processors. Therefore, there are no benchmarks which can be accurately used to compare them.

    These people that keep harping on the 'IBM won't do benchmarks' theme are completely missing the point. It is like saying that because GE Locomotives does not publish 'MPG' or '0 to 60' figures that means that they are hiding something and that obviously a Toyota is a better vehicle. Well, where are the 'fuel consumed per 1000 ton/miles' measurements for Toyota?

  39. Re:No the basic Core i& extreme will smoke it by Guy+Harris · · Score: 1

    Well, yes, that was my point. The workloads run on mainframes are different than the workloads run on other processors.

    Some workloads run on mainframes are different from the workloads run on other systems. A workload using software that only runs on, say, z/OS would be such a workload, as per my comment on IMS.

    Other workloads are run on many different types of large systems, whether the processors happen to execute a descendant of the System/360 instruction set and the I/O subsystem happens to run S/3x0-style channel programs or not. DB2 workloads could be such a workload, as per my comment on DB2.

  40. Re:MOD PARENT OVERRATED (it is factually incorrect by INowRegretThesePosts · · Score: 1

    You don't even try to make sense.

    Please go troll somewhere else.

    And by the way, my Karma is good.

  41. Re:CPU 6 core and clock frequency by cheesybagel · · Score: 1

    POWER7 runs at 4.25 GHz under 45nm design rules so 5.2 GHz or 5.5 GHz in a more expensive machine using a better manufacturing process with better system cooling does not seem impossible. PCs use air cooling and are supposed to have lower power consumption so of course the clock rates are not so high. Still there are Intel Ivy Bridge desktop CPUs sold that hit 3.9 GHz on Turbo mode and server CPUs that hit 4.1 GHz on Turbo mode.

  42. Re:Article says 'may be', i.e. no by cheesybagel · · Score: 1

    The don't use nitrogen but they use water cooling.

  43. Re:cat TFA | sed -e 's/Flash Express/Cache Express by Anonymous Coward · · Score: 0

    From another person on another forum: He said that he has actually seen one of these. And that the "Flash Express" is actually an SSD of some sort.

  44. Re:Article says 'may be', i.e. no by unixisc · · Score: 1

    Aside from the Apples to Oranges comparison that others have pointed out, which current CPU do you think is the fastest CPU out there? Core i7? POWER7? Itanium? Some MIPS or Sparc? Which one? And just equalizing their frequencies is not valid - one of the CPUs has far more registers, pipelines and cache than the other, so how would you equalize those?