AMD Rumored To Announce Layoffs, New Hardware, ARM Servers On Monday
MojoKid writes "After its conference call last week, AMD is jonesing for some positive news to toss investors and is planning a major announcement on Monday to that effect. Rumor suggests that a number of statements may be coming down the pipe, including the scope of the company's layoffs, new CPUs based on Piledriver Opterons, and possibly an ARM server announcement. The latter would be courtesy of AMD's investment in SeaMicro. SeaMicro built its business on ultra-low power servers and their first 64-bit ARMv8 silicon is expected in the very near future. However, there's always a significant lag between chip announcements and actual shipping products. Even if AMD announces Monday, it'd be surprising to see a core debut before the middle of next year."
when AMD used to be the new kid on the block, super cheap processing power for all of us who wanted power without the money, I was a student back then. Amd could be overclocked out of this world, and Intel costing 3 times as much, and wasn't so overclockable.
It's always saddens me to see layoffs with the competitors because it only leads to more expensive products with the main stream, less innovations and everyone is going the safe way, saving, reducing costs, spending less on innovation and experimentation.
We need the confidence back.
What this world is coming to - is for you and me to decide.
WTF! This should be breaking news. When did Intel's 22nm processor exceed the performance of IBM's 45nm POWER7 or 32nm POWER7+.
Of course there is. The justification is that other options are not as good, in many cases.
Companies like Google and Facebook for example have no real compatibility issues, or any particular ties to x86, and they are certainly interested in the most price efficient option, taking into account cost of acquisition, cost of running. They have not significantly moved away from x86 architecture yet.
I'm not saying it won't happen, but as yet x86 devices still hold their own in low end and mid range servers.
I've worked for a few very large companies who have made huge redundancies amongst engineering staff just as soon as projects are completed and ready to ship.
The logic is pretty simple: there are great new products ready to go and the cost base can be instantly reduced by letting go thousands of staff making profits might higher as a proportion of the cost base in the very short term (next 1 to 4 quarters).
The trouble is, you have to skate to where the puck is going, i.e. you have to be constantly developing new and better stuff to come out in a year to 18 month's time. If you don't have the R&D staff, you are in a tricky situation.
I suppose the logic is that you can hire people back when you're out of the economic hole, but I've never seen that happen. What does happen is a continuation of the company's decline until it eventually gets bought out.
Many of the people can't be hired back anyway, because they've moved on with their lives (retired, retrained, got new jobs). Do CEOs think that us little people sit around on our backsides all day worshipping their corporations and doing nothing except waiting for them to offer us jobs?
When you let your institutional knowledge leave the building, it goes for good. MBAs don't understand this.
Stick Men
Wait for the newer products coming out from CalXeda, Marvell, etc. Their newest chips are strong contenders for the server market, featuring multi-cores with extra core for management, and fail-in-place capability. If they're any indicator on performance and capabilities, mean that they'll ultimately make their way into data centers and the emerging cloud. This is a good thing, since ARM is less power-hungry, and thermal output is a prime concern for data centers.
CHANGE is good - finally, we'll see the Intel x86 goliath defeated. Remember, if it hadn't been for AMD/Opteron putting the heat to Intel's feet at one point, then Intel wouldn't have taken the trouble to improve its chips soon after. Likewise, ARM is injecting new and intense competition into the marketplace, which the rest of us will all benefit from.
The SheevaPlug uses a CPU with no FPU, a feature that has been standard on most ARM chips aimed for anything except the ultra low end of the embedded market for quite a few years now. If you're doing image processing using software floating point and expecting even vaguely reasonable performance, then you are an idiot.
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Intel's 22nm transistors certainly do. The overall chips don't because the price differential between even a top-line 8 Core Sandy Bridge Xeon chip/system and the Power7 chips/systems that actually have the high-end performance you are talking about is similar to the price differential between the chip in my cellphone and the high-end Xeon chip.
I know guys that do CPU design for IBM and they will flat out tell you that Intel has a better process. The difference is that IBM is making chips for million dollar+ servers with huge legacy needs in markets where even Itanium isn't trying to compete. At that point, you can afford to design CPUs with 200+ watt TDPs and exotic liquid cooling systems that are made in tiny quantities compared to what Intel & AMD churn out.
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Your comment is on target given that ARM systems have a history being both lightweight and worse yet, inconsistently equipped with floating point hardware. The consequence has been that application and package developers face a choice between being able to run on lots of hardware by avoiding dependency on FP, or to provide good performance by limiting their applicability to systems with that hardware. I do not know whether ARM can overcome that history in a bid for a place in the server marketplace.
I expect that ARM architects recognize the need for consistency, with the result that the ARMv8 64-bit spec is way more specific about what developers can count on, so they can use high performance compiler settings consistently, while still being sure their applications can run on all servers.
This is a very important place where the Intel IA32 and AMD's x86-64, won. Beginning with the i486 (not SX), developers had a consistent set of compiler optimization choices providing "really good" performance. Anyone wanting really kick-ass, custom-optimized performance is welcome to go with tightly customized, processor-specific compilation, as one might be able to justify in HPC.
So the question is whether ARM's history of support for giving silicon implementers major freedom in selecting from among many options, will leave a legacy of inconsistency or whether they can get past that to enter the marketplace where consistency is required for success.
BTW, as an embedded developer, I've found the flexibility of choosing silicon that's well-tuned to my device-specific needs to be very important.
No it won't. Having done some serious looking in to ARM64 it is almost as much of a mess as X86, and in fact in many ways is worse.
ARM64 has almost nothing in common with ARM32. All of the things that make ARM "ARM" such as conditional execution, having the instruction pointer a general purpose register, etc. are gone in ARM64. The instruction encoding is a complete mess and is totally incompatible with ARM32.
Most RISC processors are fairly clean between 32 and 64-bit instructions. For example, MIPS and PPC just add new 64-bit instructions to the instruction set. ARM is not like this. With ARM, everything down to the most fundamental level changes in 64-bit mode. There is zero compatibility between the two.
As a developer I certainly am not looking forward to ARM64. The stuff I do I periodically need to look at hex output and figure out what instructions are being executed. On MIPS and PowerPC this is trivial. This is not the case on ARM, where the instruction encoding is a complete mess, far worse than X86. It is as if the ARM64 instruction encoding was designed to be obfuscated.
I think the big ARM64 push is the fact that it's not Intel and Microsoft wants to use it to pressure Intel. There are far cleaner 64-bit processors out there including MIPS, PowerPC.
For the record, I work on bootloaders for MIPS64 processors.
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