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AMD Licenses 64-bit Processor Design From ARM

angry tapir writes "AMD has announced it will sell ARM-based server processors in 2014, ending its exclusive commitment to the x86 architecture and adding a new dimension to its decades-old battle with Intel. AMD will license a 64-bit processor design from ARM and combine it with the Freedom Fabric interconnect technology it acquired when it bought SeaMicro earlier this year."

9 of 213 comments (clear)

  1. Re:The fat lady is singing by hairyfeet · · Score: 5, Informative

    What's sad is how bad the former CEO fucked AMD by doing a total slash and burn on their engineering and R&D and pushing for cheaper automated layouts that simply don't cut it. The Athlon64 guys? GONE. The Cryix guys? GONE. they pretty much have their backs against the wall because the former CEO burned the fucking company to get a short term bounce, which I'm sure he cashed out on.

    And anybody who thinks ARM will save them might be interested in some magic beans I have for sale, as ARM frankly doesn't scale very well and from the early looks ARM64 isn't gonna be really any better for power than the CULV Intel chips while having a HELL of a lot worse IPC. Frankly, and this is coming from someone who has been building AMD systems exclusively for awhile now and is still hanging onto AM3+ for all its worth, the only real selling point they had was "bang for the buck" but by burning R&D and killing Thuban the former CEO left them holding the bag without shit besides Bulldozer, which we all know blows too much power, is too damned hot, and frankly their octocores get stomped by Intel quads on IPC while using a third of the power.

    I have to agree with the engineer in that link, they should have done the same thing Intel did with Core, go back to their earlier K8 designs and start from there just as Intel did with P3 mobile but now they just don't have the money or the time. I truly hope the Athlon64/Apple A6 chip designer they hired back can come up with a design to save the company because right now? Right now they really got nothing. Hell the former CEO even pulled the plug on Krishna, which would have been a sub 20w quad core bobcat, which is why all we're seeing now is minor speedbumps on a 3+ year old design. I swear they got fucked raw by bad management and I only hope they pull through. Maybe if they would have done this 4 years ago they could have the niche Nvidia now holds, but now? Its just not enough.

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    ACs don't waste your time replying, your posts are never seen by me.
  2. Re:Welcome to the club by fm6 · · Score: 5, Insightful

    Your facts are off two ways. First, going up against one big monopolistic company is a lot harder than going up against a lot of small ones. (Do you think it's easier to fight an elephant or a bunch of guys who are also fighting each other,) Second, they've managed to survive in the x86 market for 30 years. I think that counts as competing.

  3. Re:AMD might stand a chance by TheEyes · · Score: 5, Interesting

    Maybe the new direction is going to be heterogeneous computing. We're already seeing AMD and Intel combine x86 and a GPU on one die; maybe AMD will try to combine everything and have a couple of ARM cores for low-power tasks, a couple of Bulldozer modules for more intensive tasks, all combined with their GPU.

  4. Originally designed for mobile phones??? by Anonymous Coward · · Score: 5, Informative

    ARM architectures are considered more energy-efficient for some workloads because they were originally designed for mobile phones and consume less power.

    Fuck no. The ARM1 was released in 1987 as a coprocessor for Acorn's BBC Micro. They were designed for low power operation because the engineers were impressed with the 6502's efficiency. There weren't any significant mobile phone deployments until 18 years later in 2005.

  5. Re:Welcome to the club by lightknight · · Score: 5, Insightful

    Indeed. I am trying to grasp, somewhat desperately, the events that must have taken place inside AMD headquarters when the CPU design team said they wanted to do hyper-threading. Having seen how badly Intel got knocked around when they did it, and the fact that for the price of duplicating a fair amount of the CPU, you are still only occasionally eking out a slight performance gain...and sometimes, a performance loss, their strategy doesn't make sense. What was so hard about welding two Phenom II X6's together, using the hyperlinks already present in the CPU design, and calling it a day? Knowing full well that Intel wouldn't be able to compete with that design (they've been core adverse compared to AMD), being happy that all of the cores were full cores (who'd complain?), and that they'd be a hot item for system builders everywhere. Sure, some of the gaming websites like to barf about how single-threaded performance still matters, on some games that no one cares about (the GPU, of course, mattering a lot more than the single-threaded performance of a CPU here), but to take the advantage of having 6 full cores, and trade it in for 8 half-cores...was this some idiotic attempt at market segmentation? Did some moron in a suit have a brain fart, and think "we can't have 12-core Phenom IIIs, it will cannibalize our Opteron server sales"? Fire his ass, and cut the strings on his golden parachute on the way out.

    For the life me, I just can't fathom how they turned a major market advantage, with the CPU design practically on the design table already, with a popular and critically acclaimed design, and decided that f*ck it, we're doing so well here, let's go for a lobotomy, and compete on Intel's turd with an unproven half-assed design. Let's go from a full-core design that everyone complements, to some terrible half-core design that nearly killed Intel at some point. Seriously, who is commanding AMD such that they were in their nappies when the whole Intel hyper-threading business was going down (which every half-decent tech knows about), and how did they get boardroom approval?

    The proper response, of course, was not the Business School of Failure's attempt at mandating some perverse product differentiation, which bears as much similarity to surgery as bludgeoning a person to death with a hammer, but through true, non-crippling differentiation. Phenom IIIs get 12-cores, and the latest SSE instructions + something that the boys down in the instruction lab cook up; Opterons get larger caches + more cores + special server instruction sets that mean something concrete, even if it means implementing hardware Apache threads; that's on top of the SSE3 stuff and so forth. Would companies buy Opterons over Phenoms if one had hardware accelerated support for web services over the other? I believe the survey would say hell yes.

    As for the GPU stuff, the low-cost, low-power stuff is nice for chump change, but it's a fierce market with many competitors. What you want, what large companies no doubt want, is the ability to slam in GPU-daughter boards, to add 10 or 20 7970 GPUs on a single board (preferably with sockets, which drives up the cost a few cents, but also taps into the smaller markets, where you may buy 4 GPUs now, and 6 later), so that they can drive those large super-computing projects that already make use of these GPUs, but do so more efficiently.

    As for gaming, the more stream processors, I imagine, the better. When in doubt, double them, as it will give Intel and Nvidia something to curse over.

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    I am John Hurt.
  6. Re:Welcome to the club by Let's+All+Be+Chinese · · Score: 5, Insightful

    Your argument doesn't stack up.

    First you say they're bringing an 8 core chip to compete with a 4 core chip. Fine. Then you complain the cores cannot keep up 1:1. So you're expecting AMD's chips to be twice as good as intel's to be able to compete.

    That, of course, is rigging the test, and so is dishonest.

    One could also say that with single cores not much worse than the competition, but double the number of cores, and a lower price to boot, you get better value. Moreso if you can make good use of the double number of cores.

    And that's before considering that single-core benchmarks are entirely unrepresentative for multi-core performance thanks to various tricks like turbo core and turbo boost — that aren't 1:1 comparable so you'd have to do full, sustained benchmarks on all cores simultaneously to find out which delivers the most sustained instructions per second.

    Meaning that AMD's offering takes more marketing footwork, but technically is not all bad. Not at all.

  7. Re:ARM64 + Hypertransport = Interesting Outlook by Spy+Handler · · Score: 5, Interesting

    I remember when AMD bought ATI many years ago... everybody (including us Slashdot posters) were saying what a bone-headed waste of money that was.

    Now everybody's saying AMD is really fucked except for one bright spot which is its graphics division....

  8. Re:Welcome to the club by TheRaven64 · · Score: 5, Informative

    Also, there is nothing about ARM that inherently makes it more powersaving @ the same performance level than other RISC CPUs, be it SPARC, POWER, MIPS and so on.

    I can think of several things. For Thumb-2, there is instruction density. MIPS16 does about as well as Thumb-1, but it is massive pain to work with. AArch64 doesn't (yet) have a Thumb-3 encoding, but one will almost certainly appear after ARM has done a lot of profiling of the kinds of instruction that CPUs like to generate. Even in ARM mode, the big win over the other RISC architectures is the it has fairly complex addressing modes, so you can do things like structure and array offset calculations in one instruction on ARM or 3-4 on MIPS. For AArch32, you also have predicated instructions. These make a big difference on a very low power chip, because you don't need to have any branches for small conditionals. For AArch64, most of these are gone, but there is still a predicated move, which is a very powerful version of a select instruction and lets you do mostly the same things. With AArch32 you have store and load multiple instructions, which basically let you do all of your register spills and reloads in a single instruction (the instruction takes a mask of the registers to save, the register to use as the base, and whether to post- or pre- increment or decrement it as two flags). With AArch64, they replaced this with a store-pair instruction, which can store two registers, and has the advantage of being simpler to implement (fixed number of cycles to execute).

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    I am TheRaven on Soylent News
  9. Re:Welcome to the club by Anonymous Coward · · Score: 5, Interesting

    I guess you take the words of Intel fanboys literally. No, the Bulldozer architecture is not hyper-threading. No, it does not mean only a slight performance gain and especially not a performance loss. I recently made 3 microbenchmarks on an Opteron 6234 (Bulldozer too). I measured the negative effect of sharing some circuits in a Bulldozer core. This negative effect varies from insignificant to small (3%, 13%, 25%). I run the same two threads on the two cores of a single bulldozer unit vs two cores on separate units. Intel hyper-threading brings 30% more performance - in the best case. The bulldozer core pair brings 75% more performance - in the worst case. How can you compare them? They are not in the same league.

    The funniest benchmark was the floating point. The most frequent complaint against the Bulldozer architecture is that two cores share a single floating point unit. AMD should tell one million times that yes, they share a single floating point unit, but that is a 256 bit wide unit, which can be split into two 128 bit parts. And what is the size of the usual floating point number? Not 256 bit, not 128 bit, but only 64. In reality I measured that the two cores in a single unit processes floating point instructions almost at full speed. The negative effect of circuit sharing was only 3%, barely measurable. How ironic.