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Adapteva Parallella Supercomputing Boards Start Shipping
hypnosec writes "Adapteva has started shipping its $99 Parallella parallel processing single-board supercomputer to initial Kickstarter backers. Parallella is powered by Adapteva's 16-core and 64-core Epiphany multicore processors that are meant for parallel computing unlike other commercial off-the-shelf (COTS) devices like Raspberry Pi that don't support parallel computing natively. The first model to be shipped has the following specifications: a Zynq-7020 dual-core ARM A9 CPU complemented with Epiphany Multicore Accelerator (16 or 64 cores), 1GB RAM, MicroSD Card, two USB 2.0 ports, optional four expansion connectors, Ethernet, and an HDMI port."
They are also releasing documentation, examples, and an SDK (brief overview, it's Free Software too). And the device runs GNU/Linux for the non-parallel parts (Ubuntu is the suggested distribution).
The first comment to mention MAME or BitCoin wins.
A lot of things are "open" and "free" but... creating FPGA bitstreams requires proprietary software from Xilinx, and it's arguably one of the worst ever piece of crappy bloatware ever...
Good luck guys.
If all you are gonna do is advertise, at least do it right!
There is no micro SD included by default and the connectors are micro USB and micro HDMI. Big fail!
So how fast is this cluster compare to an Intel I7 ?
and what can you run on it ?
Very well:
Imagine a Beuowulf Cluster of these!
I could buy enough of these to cover the underside of the floor of my house and mine Bitcoins during the winter. Then I get radiant heat and useless fake money (which is probably just NSA's password cracker anyways).
sudo make me a sandwich
So it's interesting, a light weight ARM processor, without anything better than micro USB and micro HDMI. Neat yes, but really? Useful? Maybe as a wireless router, or some other PoE like device but as a useful processing system? Um...
Even linking many of these together - neat, but again, the world of MPI is based on completely different processor designs and interconnects, you're talking huge amount of time and effort to replicate something on a unique platform which may or may not ever see wide spread acceptance by the developer base.
Anyone out there in /.-land plan on getting these for a real project?
Tell us about it! What language/OS/purpose?
Just curious...
I'm skeptical as to how useful this chip will be. High core counts are making supercomputing more and more difficult. Supercomputing isn't about getting massively parallel, but rather high compute performance, memory performance, and interconnect performance. If you can get the same performance out of fewer cores, then there will usually be less stress on interconnects. Parallel computing is a way to get around the limitations on building insanely fast non-parallel computers, not something that's particularly ideal. For things like graphics that are easily parallel, it's not much of a problem, but collective operations on supercomputers with hundreds of thousands to millions of cores are one of the largest bottlenecks in HPC code.
Supercomputers are usually just measured by their floating point performance, but that's not really what makes a supercomputer a supercomputer. You can get a cluster of computers with high end graphics cards, but that doesn't make it a supercomputer. Such clusters have a more limited scope than supercomputers due to limited interconnect bandwidth. There was even debate as to how useful GPUs would really be in supercomputers due to memory bandwidth being the most common bottleneck. Supercomputers tend to have things like Infiniband networking in multidimensional torus configurations. These fast interconnects give the ability to efficiently work on problems that depend on neighboring regions, and are even then a leading bottleneck. When you get to millions of processors, even things like FFT that have, in the past, been sufficiently parallel, start becoming problems.
Things like Parallella could be decent learning tools, but having tons of really weak cores isn't really desirable for most applications.
One of the popular comment on slashdot is now relevant.
It has about half the gigaflops of a Core i7, and costs 80% less to buy.
It uses 5-10 watts, whereas the Core i7 uses 100 - 200 watts, with the chipset.
So total cost of ownership is about 90% less than the Core i7. Ten of them would spank the heck out of a Core i7 and cost the same.
> and what can you run on it ?
16 or 64 cores is good for facial recognition, audio processing, video processing, some network stuff - things where you run the same function on many pixels / samples / rows. So for face recognition, for example, the image would be broken up into 64 blocks and all of the blocks analyzed simultaneously on the 64 cores.
A database designed for the many cores could work well. For example, say you need to sort a table with 100,000 rows. On a system like this with 64 cores,
each core could simultaneously sort a group of 1,500 rows, then you'd merge those 64 sorted groups together ala merge sort. As a firewall, it could handle a blacklist with a million entries, as each core would handle simultaneously apply 1/64 of that list.
With 64 cores, I'd say it's already a cluster. A dozen of these ($1200) would have 768 cores and fit in a microatx case. :)
where do people get their definition of supercomputer? a supercomputer is what you have when your compute needs are so large that they shape the hardware, network, building, power bill. this thing is just a smallish multicore chip, like many others (now and in the past!)
This thing is promised to do 90Gflops and costs 100$. A HD7870 can do 2500Gflops for 300$. Sure, you need to build a rig around it, but you'll still be way better off then soldering together a tower of 25 of these boards.
Yeah but compare it to a GPGPU and you start to realize how slow it is, a $200 660 GTX does 1880 GFLOPS in 140W.
1 GFLOPS/$ versus 9.4 GFLOPS/$
10 GFLOPS/Watt versus 13.4 GFLOPS/Watt
There are 4 boxes to use in the defense of liberty: soap, ballot, jury, ammo. Use in that order. Starting now.
16 or 64 cores is good for facial recognition, audio processing, video processing, some network stuff
Low end ARM cores do that already in a low cost, low power package. I really can't see how this device would be economic for any of those things - even if you need to do facial recognition on multiple image streams at once low cost ARM cores will be cheaper. You also have the difficulty of interfacing so many video streams to a single parallel processing device; it would be easier to have lots of smaller devices.
As a firewall, it could handle a blacklist with a million entries
Again, current ARM based routers can handle such lists. IP address lists or simple URL lists with a few wildcards are no problem. I suppose if you wanted a million complex regex rules then having 64 cores would help, but if you do have such a list you need to write better regular expressions.
Low end servers are about the only application where this makes sense, and even then the added cost of having to write software specifically for these cores probably outweighs any power/performance gains over ARM and you still have the I/O issues I mentioned earlier.
const int one = 65536; (Silvermoon, Texture.cs)
SJW, n: "Someone I don't like, and by the way I'm a fuckwit" - AC
A super computer is a system that has multiple processors functioning in parallel. be it many individual machines networked together, a single processor with a several processors etc.
The term supercomputer is a very old one back before you could even fathom purchasing a machine capable of housing multiple CPUs, well unless you were a university or very well funded trust fund geek
by the original definition most of our phones are super computers
It has about half the gigaflops of a Core i7, and costs 80% less to buy.
It uses 5-10 watts, whereas the Core i7 uses 100 - 200 watts, with the chipset.
And about 1/100th as useful.
"It uses 5-10 watts, whereas the Core i7 uses 100 - 200 watts, with the chipset."
Wrong. Just so wrong. An i7-3770k, with a Radeon or Nvidia GPU drawing the desktop, running disks etc, while running a CPU heavy load, will draw 124 Watts, measured at the wall socket... Let's just say that if you subtract the GPU etc, you're down a significant chunk.
To take this one example suppose the ARM processor can do face recognition of a certain quality on a photo. Suppose it takes 1/4 of a second to process the image with some level reliability. Since this device can process 64 frames simultaneously, it can do the same recognition on video that the ARM could do on a photo.
"With 64 cores, I'd say it's already a cluster. A dozen of these ($1200) would have 768 cores and fit in a microatx case. :)"
But what about performance? For example, how does it perform at parallel integer math (arguably the most common use for these things), as compared to a top-line, price-comparable GPU card?
That's what I want to know. I didn't search for a long time, but I didn't find info on that.
The only problem is you cant run GPU standalone.
There was one project by someone who reverse engineered old Radeon HD2400
http://www.edaboard.com/thread236934.html
http://www.flickr.com/photos/73923873@N05/sets/72157631771354007/
but that guy deleted his git repo before publishing the news blurp and some photos and they quickly shut up about it.
I would love to be able to use GPU cards standalone for Vision projects, or just as a openCL accelerators for embedded systems.
Who logs in to gdm? Not I, said the duck.
That, and GPU computing really only gives that kind of performance for a few types of problems. Namely, if you are able to structure your data arrays in memory in such a way that a GPU can operate on it efficiently. If you are solving nasty PDEs on an unstructured mesh, it's very difficult to do this. In that case, a GPU is pretty worthless. I don't know how these parallella boards work, but hopefully they would be a bit more versatile.
I don't know how these parallella boards work, but hopefully they would be a bit more versatile.
There is almost no chance that a $100 board can be designed to have a memory interface that can keep 64 cores well fed at this point in time. They have almost certainly chosen low latency cache model over high bandwidth cache model due to this, so this product will probably only perform well on highly computational problems that dont require much memory - in other words none of the problems that GPU's struggle with will likely be any better on it.
"His name was James Damore."
"There is almost no chance that a $100 board can be designed to have a memory interface that can keep 64 cores well fed at this point in time. "
I agree with you 100% on that. If the cache isn't terrible, it might be okay if you have a problem amenable to openMP. But mainly I view these low-end things as kind of fun toys.
That said, there is a market for something reasonably compact and affordable in between a 4-8 core desktop and a large scale cluster. I occasionally test and debug problems on my desktop that seem to work fine, but when I scale it to 200 processors and put it on the cluster, all hell breaks loose and it can be hard to debug. A cheapo 64 core board, even if slow, could help bridge that gap, assuming I can use mpich/openMP on this thing.
Otherwise it is for hobbyists or as a learning tool.
These boards are only half the solution to a parallel problem. I used to write satellite imaging software that was parallelized on a 12-CPU server. A lot of work went into the code necessary to parallelize the mapping and DTM algorithms. It wasn't trivial either. I'm failing to see the usefulness of these boards for anything other than intensive scientific computation. Because if the code being run isn't written for parallel processors, you're getting no advantage to running it on a multicore/multiprocessor computer.
Or am I missing something here?
GPUs are SIMD, while this board is MIMD.
Rethinking email
I was curious too and found this (older but I think the basic idea is the same):
http://www.adapteva.com/wp-content/uploads/2011/06/adapteva_mpr.pdf
"To optimize its CPU for power, Adapteva started with a clean slate instead of a standard instruction set. Epiphany uses a simple RISC instruction set which focuses on floating point operations and load/store operations, so it omits complex integer operations such as multiply and divide. Each 32 bit entry in the 64 entry register file can hold an integer or a single precision floating point value.
As Figure 1 shows, the CPU itself is a simple two issue design capable of executing one integer operation and one FP operation per cycle. The CPU relies on
Adapteva’s compiler to optimally arrange the instructions rather than reordering instructions in hardware. To minimize power and area, the design has no dynamic branch prediction, although its short (six stage) integer pipeline keeps the misprediction penalty small. As a scalar integer design, the CPU achieves an EEMBC CoreMark score of about 1.3/MHz — a little less than that of an ARM9 CPU. By comparison, a modern high performance CPU such as Cortex A9 can achieve 2.9/MHz."
PDEs on an unstructured mesh? That's what I'm doing! And I'm doing it on the GPU in a very parallel way. It's a little trickier than the serial version, but not so tricky that it took more than an afternoon to parallelise - and it is vastly faster than the serial version. It did require rethinking some methods, and it requires more memory now, but the results are the same, and it's still deterministic, and it scales well. I'm not in the business of publishing methods for this sort of thing, but it only takes one person to publish such a method...
So anyway, I don't really see the value in these new devices for desktop number-crunching, as they're just too slow to compete with even a cheap GPU. For use in a robot, though - or a vehicle, or any other environment where every Watt matters? Pretty cool.
GPUs hit a wall with applications that need significantly more memory than you can fit on the device with the GPU cores. You spend so much time feeding them via the bus from main memory that after a point you'd be much better running the stuff on a far lower number of CPU cores.
So for some stuff they are very good, but for other stuff they are just not suitable at this time.
Faster than serial ?! Of course! I only meant to compare it to a traditional parallel procssing environment. And you can definitely write a simple parallel algorithm for any O/PDE that will work on GPUs. What I meant was that there are an awful lot of claims about how wicked fast GPU processing can be. Some people tout it as much faster than traditional computing. This can be true, but to get a GPU to actually perform at that level, it requires particular structure to your data. Unstructured meshes are known to be particularly nasty. Doesn't mean you can't compute anyway. It just may or may not be any better than traditional methods.
I don't mean to poo-poo GPU computing in general. I admittedly haven't followed this field closely in a year or two, so it's possible there have been some newer agorithms for unstructured meshes that have improved the situation. And without knowing more about your particular problem, I won't speculate and tell you how it should or shouldn't work. Maybe you figured out a decent implementation on your own. In which case, publish it already!
It depends. If you can get them on a board that can address 32GB or more of memory directly then they'll be able to handle a lot of tasks that GPU cards just cannot touch without a lot of waiting around to be fed data or careful design of those tasks to get them to fit into the memory of the GPU card.
"Ten of them would spank the heck out of a Core i7 and cost the same."
Yea, if it were even a general-purpose usable piece of silicon. It's not.
"16 or 64 cores is good for facial recognition, audio processing, video processing, some network stuff "
We've had all of that in software since fucking Windows 98 on an Evergreen overdrive (180 MHz) chip. Please catch up with current technology or stop shilling, what you speak of is absolutely not new, and not even novel.
"A database designed for the many cores could work well."
As we've had for the past 30+ years I've been alive?
"For example, say you need to sort a table with 100,000 rows. On a system like this with 64 cores,
each core could simultaneously sort a group of 1,500 rows,"
*cackle* Most cores today can't even sort FIVE HUNDRED rows, let alone triple that amount.
Quit shilling and get with reality, please.
Still waiting on Serviscope_minor to wake up to fucking reality and realize that Jessica Price isn't going to fuck him.
How is this not any different then IBM's Cell Processor? You know the one in the PS3. Sure it didn't have as many cores but its the exact same thing and it didn't do well. A big part of the problem was the overhead caused in memory transfer from the host system to the individual cores. The other part was each core only had 512Kb of RAM, these only have 32Kb!
Wrong, it becomes at least 10 to 20 (based on 100watt i7 number) times more useful than a corei7 for any kind of remote robotics that rely on battery life and have limited room for solar cells. With that many cores it also makes it better for using sensors for object avoidance in autonomous robotics.
But you are an AC, so you probably won't read this to realize you are wrong either. Just like I probably won't see your reply to this if you do read it.
I think that was the desired goal - to get people to learn how to code for multiple cores at an affordable price. Being a programmer myself I know how debugging multithreading code can be a pain in the a$$. This is not meant as a kick ass workhorse but as a means to allow people to learn how to code better. Let face it, cores are not getting much faster, but we are getting more of them. If you are a programmer and are not threading your code you will shortly become extinct.
So total cost of ownership is about 90% less than the Core i7.
TCO is a meaningless measure and it's sad that it persists. I have a used halfbrick here. It costs 99% less to buy (excluding shipping) and uses 0% of the power. The TCO is vastly better than either of the two options you present.
Now, return on investment is a much better measure...
But yeah, your other points stand. As always by using more specialised hardware you can get vastly better flops, etc in a given hardware/power/financial budget. There are plenty of tasks that can be parallelized and it doesn't require the overhead of a powerful GPU (i.e. awhole PC attached).
SJW n. One who posts facts.
The Parallella doesn't run standalone, either. It's an accelerator chip attached to an ARM system.
I can fit over 9000 bottle caps in a medium sized rainwater barrel. Not sure what I'd do with it though.
const int one = 65536; (Silvermoon, Texture.cs)
SJW, n: "Someone I don't like, and by the way I'm a fuckwit" - AC
i work in genetics and most of the programs aren't parallel. this is an ideal tool that can be used to make people look at their programs before we commit them to the hpc
> We've had all of that in software since fucking Windows 98 on an Evergreen overdrive (180 MHz) chip.
So every processor since then is useless?
> "A database designed for the many cores could work well."
> As we've had for the past 30+ years I've been alive?
So noone will ever use another database, and there is no longer any use for hardware to run databases on?
I very much care what it costs me, so TCO is one of the most important measurements of all.
> I have a used halfbrick here. It costs 99% less to buy (excluding shipping) and uses 0% of the power. The TCO is vastly better than either of the two options you present.
So the scorecard reads:
Item Effective Fast TCO
hw1 yes yes 6
hw2 yes yes 2
brick no na 0
It looks to me like "brick" loses because it can't do the job. The other two options are the same, except hw1 costs three times as much.
They can both do the job, and both can do it fast. The only difference is that the TCO is a lot lower on hw2, so it's the best choice.
> TCO is a meaningless measure and it's sad that it persists.
What your brick example shows is that TCO is not the ONLY consideration. "Can it do the job?" is also a critical consideration.
Amazingly, when making decisions you can actually consider more than one factor. You can look at both effectiveness AND cost.
I wouldn't be so sure about your assertions. The Parallela chips will feature a systematic 3-cycle penalty for branches in many many cases (branches are always predicted not taken by default). Intel chips have a ~90% accuracy for branch prediction, so this is not something insignificant. Also, one core i7 (or multiple ones on the same board) is easy to program using a shared-memory framework (like OpenMP). I would like to know what a cluster of Parallela would use for communicating between the chips. That being said, I backed the project last year and can't wait to see my boards shipped to my place. :-)
Erm. I beg to differ. Nvidia GPUs are "SIMT" (Single Instruction, Multiple Threads). There are "tricks" to avoid threads in a warp from waiting for other threads (basically, don't use if (condition) ... else ..., but if(condition) ... and if(!condition) ...). AMD GPUs are based on VLIW processors, and are closer to your assertion of SIMD, but it's not quite the same thing either.
So no they're not going to address more than a modern high-end graphics card. (Some 7970's and a number of Tesla cards have 6 gigs or more now.)
That was actually this biggest hindrance in the design to me. 4096 cores (max) means each core will have 1 meg of off-board memory available. Additionally, due to current memory densities, you'll be limited to between 1 and 8 memory controllers off (since ideal placement for them would be edge to edge with a multilayer board and some ancillary parts on the backside (for non-mesh IO interfacing, etc.), since current memory densities are ~256-1024 meg, and rising.
This means despite the fact that you should be able to practically get hundreds of gigabytes/sec of external bandwidth by having multiple memory busses feeding into the edge nodes, practically you'll only have 1-4 due to the limitations of the address bus and probably (albeit less so in the 4096 core case) power envelope concerns of your board.
That STILL doesn't curtail interest in the current design however. The shared 32 bit address space makes it sound like an old VAX and with some work it could be fun to make a system with 256-512 cores that would retain adequate per-core memory to do useful tasks with. Combined with a few southbridges supporting gigabit or better ethernet and perhaps some SATA controllers, this could be the next big thing. Combined with an updated revision supporting 64 bit word addressing, it could be a game changer for a considerable number of applications. Given perhaps an integer, double, or string optimized model, I'm sure they could find even more demand among other market segments where maximum parallelism is more importantant than individual core performance (and given the individual core memory throughput, combined with multiple edge memory controllers, it could be a fearsome beast indeed.)
Just wanted to add that, since pretty much every *ARM* board for under 100 bucks is still limited to 10/100 ethernet.
Lack of something other than USB/micro-sd for local storage kinda sucks ass, but there's a lot you could do with a beowulf cluster of these, and their network ports certainly make them performant enough to do that with.