Samsung Begins Mass Production of Industry's First 3D NAND Flash

Lucas123 writes "Samsung has announced it is mass producing the industry's first three-dimensional (3D) Vertical NAND (V-NAND) flash memory that breaks through current planar NAND scaling limits, offering gains in both density and non-volatile memory performance. The first iteration of the V-NAND is a 24-layer, 128Gbit chip that will eventually be used in embedded flash and solid-state drive applications, Samsung said. It provides 2 to 10 times higher reliability and twice the write performance of conventional 10nm-class floating gate NAND flash memory. Initial device capacities will range from 128GB to 1TB, 'depending on customer demand.' 'In the future, they could go considerably higher than that,' said Steve Weinger, director of NAND Marketing for Samsung Semiconductor. Samsung's process uses cell structure based on 3D Charge Trap Flash (CTF) technology and vertical interconnect process technology to link the 3D cell array. By applying the latter technologies, Samsung's 3D V-NAND can provide over twice the scaling of current 20nm-class planar NAND flash."

Comments

Re:10D

[akh]

We have, they're called multi-level cells. They improve memory density but at a cost of increased complexity, lower speed, higher susceptibility to noise, higher power consumption, and decreased lifetime. Decimal arithmetic was used on at least one early computer (ENIAC) but binary circuits were found to be much simpler to design and implement. The only modern non-binary digital computer that I'm aware of is the Soviet Setun that used ternary (tri-state) logic.