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Stanford Bioengineers Develop 'Neurocore' Chips 9,000 Times Faster Than a PC

kelk1 sends this article from the Stanford News Service: "Stanford bioengineers have developed faster, more energy-efficient microchips based on the human brain – 9,000 times faster and using significantly less power than a typical PC (abstract). Kwabena Boahen and his team have developed Neurogrid, a circuit board consisting of 16 custom-designed 'Neurocore' chips. Together these 16 chips can simulate 1 million neurons and billions of synaptic connections. The team designed these chips with power efficiency in mind. Their strategy was to enable certain synapses to share hardware circuits. ... But much work lies ahead. Each of the current million-neuron Neurogrid circuit boards cost about $40,000. (...) Neurogrid is based on 16 Neurocores, each of which supports 65,536 neurons. Those chips were made using 15-year-old fabrication technologies. By switching to modern manufacturing processes and fabricating the chips in large volumes, he could cut a Neurocore's cost 100-fold – suggesting a million-neuron board for $400 a copy."

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  1. The interesting bits by Anonymous Coward · · Score: 5, Informative

    It isn't a typical ASIC; the chip is a custom fully asynchronous mixed digital+analog; the board uses 16 chips in a tree router for guaranteed deadlock prevention between the chips; and can simulate 1 million neurons powered only by one USB port.

    The neurons are implemented with analog circuits to match the dynamics of real neurons, moving beyond a simple hodgkin-huxley model to include components like ion channels, which is first of its kind in an analog chip. It has a neat hexahedral resistor network that distributes the spike impulse across a neighborhood of neurons, a phenomena seen in many cortical brain areas; essentially an analog phenomena implemented efficiently in analog design.

    Analog gives it fun biological-like properties, with things like temperature sensitivity that must be regulated with additional circuitry. Asynchronous design means outside of leakage from the chip, which is low with such a large fabrication process, very little energy is used at a neuron level if no stimuli is present. This is in contrast to a traditional CPU, which has a clock marching along lots of a chip to consume energy every clock cycle.

    Outside of wireless/signaling stuff, this is probably the biggest mixed analog digital asynchronous chip in existence.

    But otherwise yes, the editors sucked on this one.