Researchers Unveil Experimental 36-Core Chip

rtoz writes The more cores — or processing units — a computer chip has, the bigger the problem of communication between cores becomes. For years, Li-Shiuan Peh, the Singapore Research Professor of Electrical Engineering and Computer Science at MIT, has argued that the massively multicore chips of the future will need to resemble little Internets, where each core has an associated router, and data travels between cores in packets of fixed size. This week, at the International Symposium on Computer Architecture, Peh's group unveiled a 36-core chip that features just such a "network-on-chip." In addition to implementing many of the group's earlier ideas, it also solves one of the problems that has bedeviled previous attempts to design networks-on-chip: maintaining cache coherence, or ensuring that cores' locally stored copies of globally accessible data remain up to date.

Comments

im still a bit skeptical.

[nimbius]

All this performance in just one chip. I mean, sure, it has 36 cores but lets be rational here...does it seriously expect to run crysis?

Re:im still a bit skeptical.

[Anonymous Coward]

You'd need to imagine a beowulf cluster of 'em to accomplish that.

The two hardest problems in CS:

[magsol]

pointer arithmetic, cache invalidation, and off-by-one errors

Re:Moore's Law

[ColdWetDog]

You can give the most important worker on an assembly line all the crystal meth they can eat, but they can't work any faster than the conveyor belt in front of them.

Ah! The 21st Century version of the 'mythical man month' - so much more apropos for this audience than the pregnancy analogy.