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Errata Prompts Intel To Disable TSX In Haswell, Early Broadwell CPUs

Dr. Damage writes: The TSX instructions built into Intel's Haswell CPU cores haven't become widely used by everyday software just yet, but they promise to make certain types of multithreaded applications run much faster than they can today. Some of the savviest software developers are likely building TSX-enabled software right about now. Unfortunately, that work may have to come to a halt, thanks to a bug—or "errata," as Intel prefers to call them—in Haswell's TSX implementation that can cause critical software failures. To work around the problem, Intel will disable TSX via microcode in its current CPUs — and in early Broadwell processors, as well.

3 of 131 comments (clear)

  1. a bug != errata by Ecuador · · Score: 3, Insightful

    You either say "bugs - or errata" or "a bug - or erratum", since bug is singular and errata plural. At least the error - or "erratum" (see what I did here) in this case was in TFA and not introduced in the /. summary.

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  2. Re:Not all that surprising... by Anonymous Coward · · Score: 2, Insightful

    I for one , would love to know how your 'safe' language manages to avoid dead locks, priority inversion, race conditions or guarantee lock-free processes on anything more complex than a singly linked list. Please enlighten me, I'm clearly ignorant.

  3. Re:Not all that surprising... by CajunArson · · Score: 5, Insightful

    Nobody has been robbed.
    TSX today works exactly as well as TSX worked yesterday, and considering that Haswell has been on the market for over 1 year, I assure you that anybody who has been chomping at the bit to use TSX has been using TSX.

    If the TSX erratum were trivially easy to trigger, then this article would have been posted last spring before Haswell even launched.

    Intel has done the responsible thing by acknowledging the bug (trust me son, AMD & Nvidia often don't bother with that part of the process) and giving developers the OPTION to either use TSX as-is or disable it to ensure that it cannot cause instability no matter what weird operating conditions can occur.

    Tell ya what, why don't you take all your nerd-rage over to AMD or ARM where they won't rob you of all kinds of advanced features that they just don't bother to implement at all.

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