How Intel and Micron May Finally Kill the Hard Disk Drive
itwbennett writes: For too long, it looked like SSD capacity would always lag well behind hard disk drives, which were pushing into the 6TB and 8TB territory while SSDs were primarily 256GB to 512GB. That seems to be ending. In September, Samsung announced a 3.2TB SSD drive. And during an investor webcast last week, Intel announced it will begin offering 3D NAND drives in the second half of next year as part of its joint flash venture with Micron. Meanwhile, hard drive technology has hit the wall in many ways. They can't really spin the drives faster than 7,200 RPM without increasing heat and the rate of failure. All hard drives have now is the capacity argument; speed is all gone. Oh, and price. We'll have to wait and see on that.
I don't know why Intel and Micron get any special consideration given that right in the summary the fact that Samsung has already announced the same move.
Also incorrect assertion that drives don't go faster than 7200 (there are 15k drives, just they are pointless for most with SSD caching strategies available).
XML is like violence. If it doesn't solve the problem, use more.
Most current MLC (multi-level cell) implementations can sustain anywhere between 1000 and 3000 write/erase cycles per cell. This is better than TLC (triple-level cell, max 1000), but far worse than SLC (single-level cell, max 100k up to a million, depending on the technology).
The problem is the way how flash itself works, and how smart your controller is. Unlike a disk, flash must be erased before writing. And here is where the problem comes: flash data is stored in a page of cells, with typically 8 pages of data per "block". Erasing happens on the block level. So in order to erase a single page of data, you need to erase all 8 pages in a block. Since you need to keep the data of the other 7, you first need to copy that data into another block, erase the original one, write all data back and erase your "tmp" block. The churn on blocks happens a lot faster than what you'd think.
Having that said, for consumer products, MLC or TLC is perfectly fine. For enterprise, not so much.
You'll see that in the price, obviously. TLC is the cheapest, followed by MLC, and the most expensive technology is SLC.
I'm not a complete idiot... Some parts are missing.
That's actually what they do.
1) Select an empty block.
2) Copy the data into ram on the device
3) Write the new physical block
4) Update the virtual/physical block map
5) Mark the old block as empty
The actual wear leveling algorithms are proprietary, but rest assured that they do not use flash as temporary memory, and neither do they read an erase block, change one sector and write the erase block back. One thing flash controllers do is maintain a list of unused sectors. So, if you write to one sector, the data goes into an empty sector of a different erase block and the controller remembers that the sector's old location is now unused (and where the sector is now). That's where the TRIM command helps: It marks sectors as unused without using up a different sector somewhere else. When the drive needs more free erase blocks, it copies the remaining data from mostly "abandoned" erase blocks and flashes (erases) the old erase block. All that and more brings down the write amplification, which measures the average number of sectors actually written for each write to a sector. Intel claims a write amplification of just 1.1 for one of its controllers. Also, wear leveling makes sure that erase blocks are used evenly. Otherwise writing the same few sectors over and over again would burn out the drive in seconds. All in all you can expect to write at least a few hundred times the capacity of the drive, in any order and to any sectors you want, before you need to worry about flash cell wear.
Risky Array of Imminent Disaster.