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Intel Moving Forward With 10nm, Will Switch Away From Silicon For 7nm
An anonymous reader writes: Intel has begun talking about its plans for future CPU architectures. The company is already working on a 10nm manufacturing process, and expects the first such chips to be ready by early 2017. Beyond that, things are getting difficult. Intel says it will need to move away from silicon when it develops a 7nm process. "The most likely replacement for silicon is a III-V semiconductor such as indium gallium arsenide (InGaAs), though Intel hasn't provided any specific details yet." Even the current 14nm chips they're making ran into unexpected difficulties. "While Intel didn't provide any specifics, we strongly suspect that we're looking at the arrival of transistors based on III-V semiconductors. III-V semiconductors have higher electron mobility than silicon, which means that they can be fashioned into smaller and faster (as in higher switching speed) transistors."
Amazing that we're getting to 7nm, and rather than saying we can't do it, there's just casual talk about how they will have to switch away from silicone. Really incredible. Will they just keep marching forward to less than 7nm and into other exotic configs?
My God can beat up your God. Just kidding...don't take offense. I know there's no God.
GaAs was the future of super-fast transistors. The Cray 3 was made from GaAs.
GaAs has a much higher electron mobility than silicon, 8,5000 versus about 1,500 for silicon. This allows for much faster switching. InGaAs has an electron mobility of 10,000 allowing even faster switching.
But that's just electrons which are used in P channel MOSFETs. For CMOS, you also need N channel MOSFETS. The kicker is that GaAs and InGaAs have respectively lower and much lower hole mobility so the N channel FETs switch rather slower than silicon.
CMOS is by far the only architecture. Historically it is the most power efficient since it only spends energy switching. On high speed, small scale CMOS, however, lots of power goes into the switching itself, the switching is fast enough that the devices don't really act very ideally and there's a lot of leakage.
Perhaps at very extreme ends, other architectures can compete, power wise.
SJW n. One who posts facts.
Intel did license Transmeta's patents, if only to keep an iron in the fire. According to wikipedia, Transmeta at the time had code morphing working supposedly utilizing lower power but slower in terms of performance relative to clock speed. Now the balance has switched from the Mhz wars to all-day battery life on fanless machines. In competing with ARM, sacrificing a bit of performance for power consumption might be a winner.
I dunno much about Mill but if you read their whitepaper(s), it *sounds* revolutionary in venture capitalist speak.
And for the Russian chip, they have their own native ISA but emulate x86, which some have been saying is a millstone but required for binary compatibility.
I'm not having a go at the folks at Intel, clever blokes than me... They did try producing a revolutonary new platform as a successor to x86 - but the Itanic proved less than successful.
Those are the Tock's in Intel's Tick/Tock model.
Tick is smaller structures.
Tock is new architecture.
Each new architecture is optimized for the most common tasks at that time, together with a bazillion other changes. If they figure out a general optimization technique that still works with the x86 instruction set in the mean time, they'll go for it.
The problem with some optimizations is that they do not work with the x86 instruction set. Abandoning that instruction set is expensive, although we are doing it with the ARM chips in phones and tablets. Slowly it is working it's way to cloud based computing.
Well, I might have a way, but it only works on a semi spherical planet in a vacuum.
A buddy's brother works (or worked, who knows now) for Intel, and used to bring along demos of the latest and greatest lab technology when he came for visits. Some of the stuff he had was up to 10-15 years ahead of actual release cycles in terms of performance and capability. I'm sure some of the ideas got scrapped, but a lot of them probably made it into production in the chips we use today.
Wild stuff. Both brothers were major hardware geeks.
I'd love to see what kind of technology he's showing his brother from the labs over Christmas and Easter holidays nowadays. :D
I do not fail; I succeed at finding out what does not work.
You can, and people do. However, the issue is not translating one x86 instruction to one [insert ISA here] instruction. That has been done since x86 was invented, and was common with previous ISAs before that. The real requirement is to translate source code that maps to a bunch of x86 instructions into ONE [trendy ISA] instruction. This will obviously be easier if x86 is thrown out the window.
Historical note: x86 is a bastadised rip-off of the PDP11 instruction set. The PDP11 was built as a "hardware Fortran machine" ie one instruction represents one Fortan instruction as far as was achievable in 1970. C is (just one) PDP11 assembly language! The VAX instruction set was an attempt to achieve a higher level machine code, which worked quite well - most VAX assembly instructions are actually function calls to application specific microcode.
X86 was a poor ISA when the first 8086 chips were made (but good, given hardware capabilities at the time). That was about 40 years ago. MIPS and Sparc (and ARM) are all better than x86.
The moral of this story is that it is "first past the post" in this game, cos people hate it when their favorite app stops working. (See Great Western Railway, Brunel and 8' gauge).
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You can't just stack cpu chips on top of one another. They'd melt and vaporize. You either have to develop really good cooling tech or ways of reducing power consumption.
On-chip heat pipes will become a thing to carry heat away from the center of stacks. We found out that water actually goes faster through channels so small that it has to pass one molecule at a time.
"You're right," Fisheye says. "I should have set it on 'whip' or 'chop.'"
This was a lot of years ago. Things weren't as tightly controlled back then. '386 days...
The 386 debuted in 1985 (the beginning of the "'386 days").
The 486 debuted in 1989 (the end of the "'386 days").
You claimed that you were looking at hardware that was up to 10-15 years ahead in terms of performance and capability.
That means you saw the equivalent of 1995-2000 level hardware in 1985, 1999-2004 level hardware in 1989, or any corresponding range in the years between.
The Pentium 4 was released in 2000.
Care to revise your bullshit claim?