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New Network Design Exploits Cheap, Power-Efficient Flash Memory
jan_jes writes: The researchers at MIT were able to make a network of flash-based servers competitive with a network of RAM-based servers by moving a little computational power off of the servers and onto the chips that control the flash drives. Each server connected to a FPGA and each FPGA, in turn, was connected to flash chips and to the two FPGAs nearest it in the server rack. As it is connected to each other, they created a very fast network that allowed any server to retrieve data from any flash drive. Finally, the FPGAs executed the algorithms that preprocessed the data stored on the flash drives.
Go back and look at an AS/400, iSeries, i5 and now called IBM i,
Biggest machine I worked on, 32 cores and 3/4TB of ram. And that was still ovly 1/2 as big it could be. But that 3/4TB was not the total ram in the machine, it had IOPs and IOAs that oversaw the the disk drives. Those processors had large ram and were basically fast and faster cache. So our machine with 900 drives in multiple raid-6 groupings (IOPs) with multi-grouping in IOA, acted as a 900 drive raid-0 (stripe) to main core. So reading a file sequencially all the drives will start suppling data first data in 50ms... but then the rest was "just there". Processing 4 billion row history files was easy.