Intel Offers More Insight On Its 3D Memory (itworld.com)

itwbennett writes: When Intel and Micron Technology first announced the 3D XPoint memory in July, they promised about 1,000 times the performance of NAND flash, 1,000 times the endurance of NAND flash, and about 10 times the density of DRAM. At OpenWorld last week, Intel CEO Brian Krzanich disclosed a little more information on the new memory, which Intel will sell under the Optane brand, and did a demo on a pair of matching servers running two Oracle benchmarks. One server had Intel's P3700 NAND PCI Express SSD, which is no slouch of a drive. It can perform up to 250,000 IOPS per second. The other was a prototype Optane SSD. The Optane SSD outperformed the P3700 by 4.4 times in IOPS with 6.4 times less latency.

Comments

So which is it?

[fnj]

1,000 times the performance, or 6 times the performance? Somebody needs to get the story right with the hyperbole.

Re:So which is it?

[pushing-robot]

They claimed the technology had the potential to hit 1000 times faster than current flash memory... they didn't specify when or what flash they were comparing to.

In any case, this is an early prototype spanking the top of the line current technology. That's impressive in my book.

Re:So which is it?

[suutar]

I think they're figuring "a package with a gigabit can take one tenth of the space of a gigabit of dram, because stacking"

Re:So which is it?

[nojayuk]

There's a whole raft of other things to consider before this tech changes the IT world -- how much does it cost, how many separate fabs can produce it so there's no single-point-of-failure that could constrain supply, how much redesign of existing chipsets is required to integrate it into current server/workstation/mobile phone designs, what's the failure rate in service, power dissipation and cooling requirements etc.

Saying that the demo suggests it can be implemented into existing platforms with little difficulty. Of course as Napoleon once said, "There are lies, damned lies and rigged demos." Time will tell.

Re:So which is it?

[ShanghaiBill]

How is this possible? 1 bit DRAM is a single transistor.

No. A DRAM bit is a single transistor plus a capacitor. The capacitor has to be recharged every few milliseconds, which is what makes it "dynamic".

Re:So which is it?

[funwithBSD]

Even if it is truly 1000x faster, the rest of the architecture is not designed to make full use of it.
No way any any of the current bus technologies could handle even a 10X improvement to its full extent.

Re:So which is it?

[swb]

If this technology can be adapted to fit into SAS-compatible packaging at MLC/3D NAND pricing this will rock the enterprise storage world for sure.

Entire brands/products in enterprise storage are built around features like caching/tiering that charge you $30k for a little flash and way more than they should for spinning rust under the promise that they'll deliver flash performance for all your workloads, most of the time.

Doing so requires beefy controllers to run elaborate tiering schemes, and along with the sky-high prices for media makes them extremely expensive and extremely profitable.

If (and this is a big if) you can get SLC durability at MLC pricing and simultaneously cut the controller cost (need less compute because you're not bothering with tiering, far less software complexity), suddenly you could have someone selling entry level 24 drive shelves with millions of IOPS and sustained transfers that will melt SAS-12 cables.

Basically it will make sense to quit using rust at all without paying nosebleed pricing at pretty much any scale.

Re:So which is it?

[fyngyrz]

You're clearly trying to spin this to match your narrative. Well, I'm here to tell you it's a spindly argument; you can't just serve stuff like that up on a platter, step by step, and expect everyone to nod their heads. Are you tracking me solidly now? Or are you still in a state?

Re:So which is it?

[nojayuk]

If this tech makes it into the marketplace at reasonable prices it's not going to be hanging off SAS-12 cables or any other serial links at that rate, it will be more tightly integrated with the CPU bus to deliver on the R/W and access speed improvements. Even PCI is a possible bottleneck if this 3D flash can deliver what Intel are claiming for it. Comparing its performance to DRAM is a "tell" and shows what they're thinking; this may be the fabled "non-volatile RAM" solution that's been the Holy Grail researchers have been trying to develop pretty much ever since RAM was invented. (Yes, I know there are battery-backed-up RAM solutions that claim to be non-volatile but they're only non-volatile until the battery power runs out).

Re:So which is it?

[mr_mischief]

It really depends on what type of server we're talking about. Is it a front-end web server? Is it a middleware application server? Is it a database server for small to medium databases? Is it a big DB cluster? Is it a media or document storage system? Is it a hypervisor on a hardware node offering shards of its resources to VMs? These have different storage and processing needs.

In the short term, there are a few solutions for the OS and applications. Many applications will keep as much in memory as possible already. Most OSes support RAM disks, so you could put a very fast virtual disk into your main RAM if you have 4 or 6 TiB of RAM and an application absolutely needs to think it's writing to disk. Also, I doubt segmented storage is going away entirely. You'll still have disks, SSDs, or separate blocks of this stuff available for truly cold storage if you need it. You just won't use them very much compared to today.

Re:So which is it?

[KingMotley]

A server system really needs to be able to address hundreds or thousands of terabytes of storage, not just six.

Only in very niche markets is that true. Most servers don't need anything near 6TB of storage, let alone 6TB of (D)RAM.

I'm guessing both.

[DumbSwede]

Increasing Memory Speeds 1000x will not lead to a straight 1000x increase in operations. There are undoubtedly other bottles necks in processing. What for instance is the theoretical max throughput of the memory interface used (is it a modified SSD interface)? What CPU overhead is involved? Don't expect your computer to perform 1000x better across the board just because one component is 1000x faster.

Re:I'm guessing both.

[Anonymous Coward]

is it a modified SSD interface?

No. It'll show up using a modified DDR4 interface or an NVMe interface. You'd have to look at tech news sites (not Slashdot) to find that info.

6.4 Times Less Latency

[sexconker]

"6.4 times less latency" means that if the latency of the baseline thing you are comparing against is X, then the latency of the new thing has a latency of 6.4 times X less than X, which is X minus 6.4 times X, which is negative 5.4 X.

The latency we're discussing is a measurement of time (and up until Intel's amazing breakthrough it was always positive).
This means that Intel has discovered tachyons, invented a time machine, and violated causality in general. Either that, or "journalists" and marketers don't know what they're doing.

Re:6.4 Times Less Latency

[harrkev]

I think they mean that the old way takes 6.4 times as long as their newest toy.

Re:It doesn't matter

[Pseudonymous Powers]

Fix stupidity (and laziness) first.

Yeah, that's a realistic and practical precondition for any project.

The best is yet to come...

[TomGreenhaw]

Using XPoint as a successor to mass storage in my mind is short term thinking. Maybe its a quick way to sell the technology in the near term, but certainly not the best use case.

We should get away from mass storage altogether and use this as replacement for RAM. It will take a rethinking of operating system structure, but promises to provide instant on computers with all programs and data always loaded and ready for immediate access. Database systems would immediately be orders of magnitude faster because all data is always ready for access.

I for one will not miss virtual memory...

Hardware is rate limiting

[duckintheface]

This comparison says nothing at all about 3DXP except that it is much faster than NAND. With NAND, it is the NAND memory itself that limits the speed. With 3DXP memory, it is the PCIe connection hardware that is the slowest component and therefore rate limiting for the entire retrieval speed.

When Intel/Micron says that the 3DXP is 1000 times faster than NAND, they mean that it has only 1/1000th of the latency. You will never see that speed in an SSD drive. The speed of 3DXP will only be realized as a DIMM module in a custom designed server with all the software modifications optimized for it. 3DXP is revolutionary for in-memory applications running in server farms. And once Intel includes 3DXP on the die with the processor, nothing currently envisioned will be able to compete with it.

BTW, although Intel will have a great advantage using this technology, from what I can tell it was actually Micron that invented (or developed from an early purchased prototype) this memory. I'm still waiting for Micron to start telling us what materials were used and how this memory actually works. That will tell us what its ultimate limits are.