Slashdot Mirror
AMD Sued Over Allegedly Misleading Bulldozer Core Count
An anonymous reader writes: A class action suit accuses AMD of misleading buyers about the number of cores in its Bulldozer-based CPUs. The complaint claims that the chips effectively had only four cores, while AMD claims there are eight. According to Ars: "AMD's multi-core Bulldozer chips use a unique design that combines the functions of what would normally be two discrete cores into a single package, which the company calls a module. Each module is identified as two separate cores in Windows, but the cores share a single floating point unit and instruction and execution resources. This is different from Intel's cores, which feature independent FPUs. The suit claims that Bulldozer's design means its cores cannot work independently, and as a result, cannot perform eight instructions simultaneously and independently. This, the claim continues, results in performance degradation, and average consumers in the market for a CPU lack the technical expertise to understand the design of AMD's processors and trust the company to give accurate specifications regarding its CPUs."
http://www.extremetech.com/extreme/217672-analysis-amd-lawsuit-over-false-bulldozer-chip-marketing-is-without-merit
AMD's CPU architecture has a similar purpose as hyperthreading -- to share hardware resources between what looks to the OS like independent cores -- but the tradeoff is different. Intel's hyperthreading approach only works to cover memory latency, because the hyperthreads share so many physical resources (I think basically everything except register files and hyperthreading-related state). AMD's is somewhat different in that each "module" has two independent integer ALUs, register files, and L1 data caches. The module has one L1 instruction cache, one L2 data cache, one FPU, and one instruction fetch/decode unit.
But AMD has always been pretty up-front about this architecture. There is maybe a cause of action against resellers who package the AMD chips into systems and do gloss over which aspects each "core" shares with another core, but AMD publicly presented the core-vs-module distinction well before the chips were released.
i5 is just branding, it doesn't describe physical features. Broadwell desktop i5 has 4 cores no threads, mobile has 2 cores as 4 threads,
https://en.wikipedia.org/wiki/Broadwell_(microarchitecture)#Mobile_processors
AMD has always been behind Intel in the performance area for most of its life.
Well, there was the Athlon - era where they were sweeping the floors with Intel; the classic Athlons and Athlon XPs were phenomenal CPUs at the time and highly overclockable. It was glorious, but yeah, I think that was pretty much the only time they beat Intel.
Lets hope AMD gets their shit together. As I've said before. The fat lady hasn't sung yet on AMD but she is warming up in the bullpit. Lets hope that as she waddles up on stage AMD pulls a rabbit out of the hat and she falls off the stage into a tuba.
I really, *REALLY* hope they can manage to do it, but.. I just haven't heard any promising news in that regards anywhere. There's quite literally nothing to indicate that AMD has in any way or form stopped digging even further down the hole they are already in. I do dread the day when Intel becomes the sole x86 - vendor and can practically demand whatever they want, do whatever they want and laugh all the way to the bank.
Cant be, as the PS4 and Xbox One use Puma derived cores, a completely different Architecture than the Buldozer derived Desktop CPU.
The Puma Cores do NOT share the FPU. Puma CPU use a special low power Design that doesn`t scale up well above about 2 GHz
That's entirely wrong. Pentium 4 have much, much, much worse IPC than Core i7, and so get a lot more done per clock cycle. Have you *used* a 2003-era Pentium 4 lately? Sure, single-threaded performance hasn't improved as much in the last 10 years as it did in the previous 10, but it has still improved a lot.
Also, hyperthreading does not do anything like "cutting the processor speeds in half". If you are really running single-threaded code, the other thread is just in an idle loop, which uses no CPU resources and has next to no effect on performance. Even if you are running many-threaded code, it still helps a little since it hides memory latency and can make better use of resources if, for example, one thread is doing all floating-point math and the other all integer.
Sony or Microsoft might buy their chip facilities since they do use AMD chips as the CPU/GPU in their consoles
Given that AMD spun off its chip facilities a few years ago, I think we can probably ignore your market analysis.
I am TheRaven on Soylent News
They share *everything* except for an ALU. When 90% of the functionality of the core is not duplicated, it becomes pretty damn difficult to assert that it's actually 2 cores. Instead, it's 1 core with 2 ALUs.
There are only 4 instruction fetch units on the chip - that suggests 4 cores
There are only 4 instruction decode units on the chip - that suggests 4 cores
There are only 4 L1 caches on the chip - that suggests 4 cores
There are only 4 floating point units on the chip - that suggests 4 cores
The only thing there are 8 of, is ALUs, but an ALU is not in and of itself, a core.
The claim that it is 2 cores would be like intel claiming that their chips have twice as many cores, because they have multiple vector floating point units per core.
Intel doesn't want AMD to die off because that would subject its practices to monopoly scrutiny. It shares just enough patent information with AMD to allow it to trail a bit behind (in exchange for access to AMD patents, of course) and not completely collapse. The one time that AMD managed to move ahead of Intel (when the Athlon was the king of the hill), Intel pulled out all the stops to prevent it getting a solid foothold in the PC market until Intel's Core 2 Duo could come along and put Intel technologically back in the lead. AMD hasn't had the money to effectively compete since then in part because Intel ensured that its bank accounts couldn't build up too far.
You can never go home again... but I guess you can shop there.
I understand they're very popular on the embedded market due to their low cost, but i can't honestly tell why. Any half decent ARM platform will run circles around it.
i3, i5, and i7 represent "good", "better", and "best" respectively. That's it. A *particular* SKU with an i5 mark may have 4 physical cores, but 4 physical cores is not a requirement to receive the mark.
For example, this i5 has 4 physical cores: http://ark.intel.com/products/... while this i5 has 2 physical cores http://ark.intel.com/products/...
Err except with HT there is one execution unit, and with AMD there are two.
They are real cores, that share instruction decode and a FPU.
Actual execution is parallel (unlike HT which is more interleaved).
HT isn't similar to Bulldozer modules in any sense.
Intel's cores since Nehalem have nothing of the sort. There's one set of ALUs, one FPU, one front-end, one each of L1i and L1d caches, and one peak of the memory hierarchy per core. However the front-end can decode two threads concurrently, tracking two sets of ISA regs at the same time, and sharing all resources between the two. But there are still ony one set of ALUs, and one FPU, per core.
Intel gets more oomph per core this way. AMD merely took the other road, but their process tech was behind and their R&D hamstrung by budget cuts, so the things that would've made Bulldozer properly competitive only materialized in Piledriver, and then AMD was firmly in the "cheapo" tier already.
The "pretend multicore" is a throwback to the first hyperthreaded Netburst family chips, where it was offered precisely as a substitute for AMD's genuine single-chip "SMP in a socket" multicore.
Sigh, does nobody know how the BD/PD arch works here? It CAN share the FPU but absolutely does NOT "have to". Allow me to quote from Wikipedia: "."Two symmetrical 128-bit FMAC (fused multiplyâ"add capability) floating-point pipelines per module that can be unified into one large 256-bit-wide unit if one of the integer cores dispatches AVX instruction and two symmetrical x87/MMX/SSE capable FPPs for backward compatibility with SSE2 non-optimized software."
So each core DOES have an FPU, they simply used a simpler 128bit FPU that CAN be joined together to make a single 256bit FPU for use with AVX instructions and ya know what? The majority of users will NEVER NOTICE as every program and game Joe Average runs will run great on an AMD chip. I myself run an FX-8320E which I upgraded from a Phenom II X6 (which according to the lawsuit is a "full" core compared to mine) and the FX blows through transcodes and multieffects layering a good 40% faster than the P II X6. And if his BS was true how does he explain the fact that the 6350 and 1100T are equal in performance despite the fact that according to him its a triple core versus a hexacore?
ACs don't waste your time replying, your posts are never seen by me.
8 L1 caches and 4 L2 caches.
4 FPU(SIMD) units. Each unit can break down from 1 256bit FPU unit into 8 32bit FPUs, 4 64bit FPUs, 2 64bit FPUs plus 1 128bit FPU, or any combination you can think of. It's a modular "FPU" that change itself depending on current usage.