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Intel Says Chips To Become Slower But More Energy Efficient (thestack.com)
An anonymous reader writes: William Holt, Executive Vice President and General Manager of Intel's Technology and Manufacturing Group, has said at a conference that chips will become slower after industry re-tools for new technologies such as spintronics and tunneling transistors. "The best pure technology improvements we can make will bring improvements in power consumption but will reduce speed." If true, it's not just the end of Moore's Law, but a rolling back of the progress it made over the last fifty years.
To be fair, for a while in the middle of the last 50 you could do it in a couple of hours.
Nullius in verba
Intel's so far ahead of AMD, they have to roll back the clocks in order to stay competitive.
AMD isn't Intel's competition. Intel needs AMD to prevent Anti-Trust litigation. Intel's competition is ARM and all the OEM's who use ARM based chips. Especially if Microsoft ports full Windows 10 to the ARM. The big draw of ARM is performance/price per watt which is exactly what Intel is shooting for.
"A person is smart. People are dumb, panicky dangerous animals and you know it." - K
Intel's been shooting itself in the foot with power vs performance for years. AMD was better, Intel reversed course and then beat AMD down. Now Intel's gunning for ARM because ARM is becoming a real threat to their core business. How many phones have Intel chips? How many tablets? Notebooks are moving towards ARM as well. Imagine an ARM based server farm. ARM is moving up the food chain into Intel's core business, and doing so with a class of processors Intel can't match.
The cesspool just got a check and balance.
No, a lot of applications don't scale well across multiple cores / CPUs.
William George
Contrary to popular belief, Moore's Law doesn't say that processors will double in speed every 18~24 months. It says that the number of transistors that can economically be put on a single chip will double every 18~24 months. Up until recently, that has translated into a doubling of speed for two reasons: 1) more transistors can be used to optimize the processing of instructions through a variety of techniques and 2) the distances signals have to travel is lessened as the transistors shrink. More transistors contribute not only to power consumption but also more heat, which is another problem with high performance processors. This was partially dealt with by putting multiple cores on a die running at less than max clock rates, thereby distributing the heat and making it easier to deal with. It still may be economical to put more and more transistors on a die, but maybe we don't want to. More transistors consume more power. What's your priority, raw speed or power consumption. Maybe you can't optimize for both at the same time.
No, a lot of applications don't scale well across multiple cores / CPUs.
In 2016 they don't. But as chips evolve the applications will as well.
That's what they said in 2006, when CPU clock speeds essentially hit the wall.
Mainstream CPUs started going multi-core back then. Some things parallelize quite well, and the tools are making it easier for them to do so today, but there's still a lot of sequential crunching to do for a lot of jobs. We're not likely to see a 1000 core 200MHz chip out-performing a 2 core 2GHz chip for "average desktop applications" anytime soon.
Of course, the fundamental problem this presents is that it does *not* automatically result in improved performance.
Architectural changes require that performance code be tuned or re-tuned, which means every at-scale application has to be somewhere between rejiggered and given a huge dedicated rewrite effort (The DOE's upcoming 300 petaflop GPU machine will have exactly ten applications that can run at full scale, each of which will have an entire dedicated team rewriting it to do so). And, of course, Amdahl's Law puts an ironclad limit on the effect that more parallel hardware can have on performance, and some problems simply cannot be parallelized no matter how much we wish otherwise.
Contrast with the effect of improving the serial performance of hardware: All else being equal, double the CPU and memory clock rates and absolutely every program will run twice as fast, full stop. That was the desktop miracle from 1990 to 2003 or so - the same exact code screamed twice as fast every year.
But as processors trend towards slower and wider, everything becomes an exercise in parallel programming. OpenMP parallel, MPI parallel, SSE simd instructions, GPU simd parallel... It's harder to do at all, and harder yet to do *right*, and historically the average programmer has enough trouble working with a runtime that's sequentially consistent.
Rant aside though, I agree you're right - until we move to diamond substrates & heatsinks, we've hit the thermal brick wall (actually we hit it circa 2003) and there will not be any further increases in serial processing speed. Plus, AFAICT, there's a similar brick wall with access rates to DRAM and the fact that it requires a microwave-frequency bus with literally hundreds of pins extending for entire centimeters... so forget that too.
1024 cores will make it possible to get ten steps in, assume each step is a binary choice. The software I work with is way more complex than that. Not to mention, cache coherence is going to be a big problem, and multiplying the power draw and heat production by a thousand may be inconvenient.
There are ways to make problems more parallelizable, but they aren't going to work on all problems. Some problems are just really, really difficult to split up efficiently.
"When you have eliminated the unacceptable, whatever is left, however improbable, must be the truthiness" - Holmes
You can have strong AI in ~20W, because that's what our brain uses. Each neuron is really, really slow like 100Hz and below, but when you have absurdly many it works. The problem is understanding the programming model, because it's nothing like our one list of instructions.
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