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Linux Kernel Patch Hints At At 32-Core Support For AMD Zen Chips
New submitter Iamthecheese points to an article which says that a patch published on the Linux Kernel Mailing List indicates that AMD's forthcoming Zen processors will have as many as 32 cores per socket, but notes that while the article's headline says "Confirms," "the article text doesn't bear that out." Still, he writes,
There are hints of such from last year. A leaked patch for the 14 nanometer AMD Zeppelin (Family 17h, Model 00h) reveals support for up to 32 cores. Another blog says pretty much the same thing. We recently discussed an announced 4+8 core AMD chip, but nothing like this.
Linux has supported SMP for a long time. I am expecting these AMD chips to run 32 cores under Linux by granted.
Intel will probably come out with a slightly faster 64 core chip just before AMD releases the Zen architecture...
https://xkcd.com/619/
AMD best hope this CPU has some actual guts to it for performance / power efficiency. They haven't had a great CPU since the Duron / Thunderbird days when they were (arguably) the leader on the desktop.
Their CPU's have gotten progressively worse compared to intel, to a point where it's pretty much complete folly to go AMD at this point, which is a big shame.
Let's hope they close the gap significantly, very significantly. They've almost always been behind, even if it's only slightly (yet had to hugely undercut prices)
At their current rate, I do not see them lasting a hell of a lot longer. So this one better be the one for a couple of years.
those per-core software licensing fees better finally die off.
...that makes SystemD obsolete and incompatible with Linux.
It has an ARM core that controls the whole thing and runs cryptographicly signed code, just like intel.
All CPUs are backdoored.
This is to catch anyone opposed to the feminist global police state.
>In the United States, as late as the 1880s most States set the minimum age at 10-12, (in Delaware it was 7 in 1895).[8] Inspired by the "Maiden Tribute" female reformers in the US initiated their own campaign[9] which petitioned legislators to raise the legal minimum age to at least 16, with the ultimate goal to raise the age to 18. The campaign was successful, with almost all states raising the minimum age to 16-18 years by 1920.
>Also: see: Deuteronomy chapter 22 verses 28-29, hebrew allows men to rape girl children and keep them: thus man + girl is obviously fine. Feminists are commanded to be killed as anyone enticing others to follow another ruler/judge/god is to be killed as-per Deuteronomy. It is wonderful when this happens from time to time: celebrate)
Long time ago, when I saw my first dual-core machine, I predicted that I will see a kilo-core machine in my lifetime. That prediction still stands, and the step from 16 to 64 is just one little step on the way.
Yes, SJW faggot.
Your kind should be killed.
GIRLS NOT BRIDES, Right.
and "It's 2016" right!
CURRENT YEAR - Argument!
Fucking piece of shit.
at at at
If the previous max cores per socket was 16, and the value in the kernel needs to be a power of 2, then at most this tells us that they have a 17 (more likely 18 or 20) core CPU on the way.
https://www.phoronix.com/scan.php?page=news_item&px=Intel-KNL-Perf-In-Linux-4.5/
AMD's dual-core, partially shared, but partially independent has been a confusing thing. Better than hypethreading, but worse than real cores, claiming performance of real cores.
Note for all those desktop enthusiasts out there, don't get too excited. To look at Intel as an example, they go up to 4 cores per desktop socket, but go to 18 cores per socket in servers (at 150W per socket) as of this moment (can't talk about unreleased product). AMD does 8 'core' desktop processors (4 modules) and 16 'core' opteron (really 8 modules), so it's not just an Intel thing.
XML is like violence. If it doesn't solve the problem, use more.
From what I've read about AMD's Zen architecture, they've dispensed with the "two single threaded cores per module" architecture and now have SMT allowing two threads in each core according to this, much like "hyper threading" on Intel chips.
If that's the case, and we can expect a 32 core chip to execute 64 threads, then that's an awful lot of threads to keep supplied with data and instructions. In comparison, the biggest Intel Xeon I know about, the E5-2699 v3 has 18 cores, 36 threads, 45MB of last level cache, and 4 memory channels (68GB/sec to RAM). Intel sticks pretty close to that 1.25MB cache per core in their big Xeons. So if you adhered to Intel's apparent rules, a 32 core 64 thread chip would need 80MB of LLC and maybe 6 memory channels. Anandtech estimates 5.7 billion transistors for the big Xeon. Scaling the Intel design from 18 to 32 cores would require over 10 billion transistors! That number leads me to believe that an SMT 32 core 64 thread chip built with 2016 technology would not be practical.
What might be practical is a chip with some "heavy" cores optimized for balls-to-the-wall floating point execution, and other "lighter" cores for lower power integer tasks. This has been done in "octocore" mobile phone chips and called a big LITTLE architecture. The idea is that the OS and various decoding and checksumming tasks can stay resident on the low power light cores, while the heavy cores do things like game physics and photo noise reduction. Because the multiprocessing is not symmetric, the OS kernel needs special rules to assign tasks to cores. Which leads me to wonder if AMD has something like big LITTLE up its sleeve for 32 core Zens.
--- Often in error; never in doubt!
http://oi62.tinypic.com/6g8uc9.jpg
Perhaps cores-schmores is one way to approach this? Lots of small cores with relatively slow clocks, as higher clocks tend to worsen power efficiency.
Which is also the road that Intel themselves pursue with Xeon Phi (the currently used descendant of their failed GPU).
I'm not discounting Intel's success with single-core performance per se, but I sometimes feel it's aimed at speeding up legacy applications
Yup, the drawback is that not a lot of current application are able to run on tons of separate threads.
Not only "legacy" but even applications recently produced or currently being produced.
But the architecture can have some success on servers, and some scientific workloads.
"Sufficiently advanced satire is indistinguishable from reality." - [Tips: 1DrYakQDKCQ6y52z6QbnkxHXAocMZJE61o ]
This is like looking at a hardware register in a generic register layout that leaves 8 bits for "core index" and deducing that the manufacturer must be intending on delivering a 256-core CPU.
Then you find the documentation for the specific family and find out that bits 7-3 are "reserved and will be read as zero".
But the driver patch they submitted doesn't make that assumption "just in case".
Because it's easier to plan ahead in the driver than it is to actually deliver a 256-core CPU.
Why does the article call it "leaked patch"? That seems like a normal public patch to Linux Kernel Mailing List.
Also when I read the source code, I do not see anything suggesting 32 cores, and instead the patch adds support for an "instructions retired" register which is introduced in the Zeppelin architecture.
So is the article rubbish or am I rubbish? Once again I get the feeling that by even just slightly scraping the surface, things turn out to be completely different than what is described. :D
Newisys was working with AMD to create cache-coherent processor images of up to 128 cores (32 sockets at the time) back in 2007 with the Hypertransport connected Opterons.