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Samsung Returns To 2D, Releases 250GB 750 EVO For $75
Vigile writes: Even with Samsung pushing forward into 3D NAND with 32-layer technologies used in SSDs like the 850 Pro and the recently released M.2 PCIe NVMe 950 Pro, there is still plenty of traditional 2D planar memory being fabbed on production lines. To utilize that inventory, Samsung is shifting its low-capacity SSDs back to it, announcing the 750 EVO drives today available in 120GB and 250GB capacities. Though based largely on the very popular, but sometimes troubled, 840 EVO specs, the new drives are faster and start with some impressively low prices. The starting MSRP for the 250GB 750 EVO will be just $75.
ISTR they had weird TRIM behavior and the Linux blacklist hadn't been updated for them or something. Now it has and they'll be fine, even if they do TRIM weirdly. ... yep, I checked the link from the summary, and that's the story
"You're right," Fisheye says. "I should have set it on 'whip' or 'chop.'"
Because they were storing 3 bits per cell, that means 8 possible voltage levels. The voltage tends to vary over time if the data isn't touched. The SSD would read a block of cells, notice that the voltage levels were a bit off and re-calibrate, and then do another read. This result in greatly reduced read performance (200MB/sec down from near 500MB/sec).
They issued a firmware update that did something to alleviate the problem, and added background scans to do the re-calibration when the drive was idle which eliminated the problem completely on most systems.
The newer drives seem to be totally immune.
const int one = 65536; (Silvermoon, Texture.cs)
SJW, n: "Someone I don't like, and by the way I'm a fuckwit" - AC
A flash cell is basically a capacitor which holds an electrical charge at a certain voltage. The voltage level tells you the data that's stored in the cell. In the simplest case (1 bit), a 0 is no voltage, a 1 is high voltage. MLC stores 2 bits (4 voltage levels), TLC stores 3 bits (8 voltage levels). With increasing number of bits, the voltage difference between different levels becomes smaller.
The problem is, that charge slowly leaks out of the cell. As they reduced the lithography and the cells got smaller, the surface area to volume ratio grew. The stored charge was proportional to the volume, while the rate of leakage was proportional to the surface area. So basically shrinking the lithography meant the cells leaked their charge faster. All this came to a head in the 840 EVO series. The rate of leakage was high enough and the voltage difference between the values on TLC were small enough that the voltage of the cell dropped out of spec within a few months. And the SSD began having trouble reading the data back reliably from the cell.
Fortunately Samsung built in a ton of error correction, so when this happened the data wasn't actually lost. The SSD tried reading the cell over and over again until it randomly got the correct CRC value and knew it had a clean read. Unfortunately, all those re-reads took a lot of time, and the performance of the SSD tanked. Samsung's fix (pretty much the only fix possible) was to re-write cells which had old data in them to give them a fresh charge, basically resetting the countdown before the data became corrupt again.
With 3D NAND, because the cells are also stacked vertically, it wasn't as important to make the cells so small. So Samsung went from 19nm lithography in the 840 EVO, to 40nm lithography in the 850 EVO. No leakage problem at 40nm (at least not for several decades, if that). Likewise, the 840 Pro used MLC (the EVO used TLC). So it had twice the margin of safety on the voltage values before data corruption, and thus didn't suffer this problem. Now that they're returning to 2D NAND for this new line of drives, people are rightly asking if this voltage leakage is going to become a problem again.