Slashdot Mirror
California Researchers Build The World's First 1,000-Processor Chip (ucdavis.edu)
An anonymous reader quotes a report from the University of California, Davis about the world's first microchip with 1,000 independent programmable processors: The 1,000 processors can execute 115 billion instructions per second while dissipating only 0.7 Watts, low enough to be powered by a single AA battery...more than 100 times more efficiently than a modern laptop processor... The energy-efficient "KiloCore" chip has a maximum computation rate of 1.78 trillion instructions per second and contains 621 million transistors.
Programs get split across many processors (each running independently as needed with an average maximum clock frequency of 1.78 gigahertz), "and they transfer data directly to each other rather than using a pooled memory area that can become a bottleneck for data." Imagine how many mind-boggling things will become possible if this much processing power ultimately finds its way into new consumer technologies.
Programs get split across many processors (each running independently as needed with an average maximum clock frequency of 1.78 gigahertz), "and they transfer data directly to each other rather than using a pooled memory area that can become a bottleneck for data." Imagine how many mind-boggling things will become possible if this much processing power ultimately finds its way into new consumer technologies.
Quantum computing is not magic. It has problems it's insanely good at (in theory) solving, and it has problems where it's as fast or slower (because of the necessary error correction) as your traditional deterministic computer. Not only are we a long way off from personal quantum computing (we still don't even have a general purpose quantum processor), we still need to research deterministic architectures.
There is a system for subverting the system and you should use that system!
No they are not. The threads in a modern GPU are not all free to execute different instructions. A GPU is a SIMT architecture : Single Instruction, Multiple Threads; each warp of threads (group of approx. 16 to 32 threads) will execute the same instruction at the same time on whatever data each one is holding (some threads can also be deactivated in the group, for this instruction). So the physical architecture for each of the thread in a GPU is much simpler than for the threads of this processor (because of factorization of all the instruction queue and related mechanism, much simpler synchronization, etc.).
Because I look at the real world around me and I see little that would benefit from that.
This is a failure of imagination. The worst kind of failure.