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OpenCAPI: Google and IBM Lead Tech Consortium To Speed Data Centre Performance (thestack.com)

An anonymous reader writes: IBM is leading a prestigious consortium of tech players in the open development of a new framework that, the company says, can speed data centre performance by a factor of 10. Participants in the OpenCAPI group include IBM, Google, Nvidia, Mellanox, Hewlett Packard Enterprise, Micron and Xilinx. Chris Johnson, a Principal Engineer at Google commented 'Google is committed to open standards and we are excited to contribute to the cross-industry use and development of OpenCAPI'. Google's collaboration with RackSpace on the Zaius server will include IBM's forthcoming POWER9 processor technology, which is built around OpenCAPI. Tom Eby, vice president of Micron's compute and networking business said:"While memory has always been an essential building block for computing, it is quickly becoming the critical technology to unlocking next-generation performance."

11 comments

  1. where did everyone go by Anonymous Coward · · Score: 0

    i want to talk about scared grits girls and linix

  2. Well fellows... by johnsmithperson123 · · Score: 1

    It could be a bust, but I think it looks like HyperTransport all over again. Intel misses out on a good standard. Honestly, what is up over there?

    1. Re:Well fellows... by AchilleTalon · · Score: 1

      My understanding is OpenCAPI is actually built on top of a glorified HyperTransport architecture.

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      Achille Talon
      Hop!
    2. Re: Well fellows... by Anonymous Coward · · Score: 0

      That doesn't matter much if it's glorified. HyperTransport is more or less the ultimate interconnect over copper. The 2011 version is faster than anything but NVLINK, and I wouldn't be surprised if NVLINK is just a pair of HyperTransport buses (they are a consortium member, after all.)

  3. I will not by skids · · Score: 1

    ...fill out a form to view an "open" standard. "Open standards" should be posted in the open.

  4. Open Coherent Accelerator Processor Interface by wasteoid · · Score: 1

    Why no acronym expansion? That's not a well-known acronym.

  5. but what is it? by Gravis+Zero · · Score: 2

    It's an "open" version of IBM's Coherent Accelerator Processor Interface which is basically a specification for how programs can interface with specialized "accelerators" (usually FPGAs) by writing to designated sections of RAM. This method minimizes the number of alternations that need to be made to motherboards, allows the use of standard CPUs and standardizes the unifies the changes that need to be made to the kernel.

    TL;DR: supercomputing nerd stuff

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    Anons need not reply. Questions end with a question mark.
  6. Obligatory... by Anonymous Coward · · Score: 0
    1. Re:Obligatory... by kelemvor4 · · Score: 1

      You're crazy.

  7. Virtual addressing and coherency by Anonymous Coward · · Score: 0

    Generational bandwidth increases aside, the major features of this specification are virtual addressing to prevent malicious devices from scraping host/peer memory and reduce host kernel software overhead, and a coherency protocol to keep peer caches properly synchronized. This is a big win as more types of processing get offloadedd from host CPU.

  8. Pay more attention to NVlink and Gen-Z by Anonymous Coward · · Score: 0

    Seriously, while not a direct competing standard per se, NVlink and Gen-Z stuff is getting interesting enough to give OpenCAPI a run for its money.