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Own An Open Source RISC-V Microcontroller (crowdsupply.com)
"Did you ever think it would be great if hardware was open to the transistor level, not just the chip level?" writes hamster_nz, pointing to a new Crowd Supply campaign for the OnChip Open-V microcontroller, "a completely free (as in freedom) and open source 32-bit microcontroller based on the RISC-V architecture." hamster_nz writes:
With a completely open instruction-set architecture and no license fees for the CPU design, the RISC-V architecture is well positioned to take the crown as the 'go to' design for anybody needing a 32-bit in their silicon, and Open-V are crowd-sourcing their funding for an initial manufacturing run of 70,000 chips, offering options from a single chip to a seat in the design review process. This project is shaping up to be a milestone for the coming Open Source Silicon revolution, and they are literally offering a seat at the table. Even if you don't end up backing the project, it makes for very interesting reading.
Their crowdfunding page argues "If you love hacking on embedded controllers, breaking down closed-source barriers, having the freedom to learn how things work even down to the transistor level, or have dreamed of spinning your own silicon, then this campaign is for you."
Their crowdfunding page argues "If you love hacking on embedded controllers, breaking down closed-source barriers, having the freedom to learn how things work even down to the transistor level, or have dreamed of spinning your own silicon, then this campaign is for you."
Thanks, EditorDavid, for the welcomed break in leftist propaganda posts that don't matter to nerds.
Now, if you'll excuse me, I have backups to corrupt.
I think you mean the bitstream. Gate-array designs, including the design of this chip, are generally coded at a higher level than a single transistor. One can then compile them to the transistor level as part of the preparation for using a fab to create a chip rather than a gate-array program.
Actually, we would like an Open Hardware gate array. A big problem currently facing us is that the tool chain can't be entirely Open Source because gate-array manufacturers treat their bitstream format as trade-secret. So, we need an open bitstream.
Bruce Perens.
I love RISC-V, I really do but $50 for a chip in bad package is too much. Who can hand solder QFN chips?! $20 is really my limit for a chip of that caliber and it would need to at least be in a QFP package.
The reason stated for the QFN package was to achieve clock higher frequencies (160MHz) but really, 50MHz is enough.
Anons need not reply. Questions end with a question mark.
... and a sea story:
A fairy tale starts with, "Once upon a time ... "
A sea story; "Hey, this ain't no shit ... "
So, this ain't no shit:
When I trained on electronics in this man's Navy in 1965, I went to NAS Memphis and we worked on a vacuum tube computer that filled up a whole wall. We'd open the windows in the winter because it was HOT in there.
There were two tubes per flip-flop module. The tubes burned out often and we'd have to troubleshoot that.
Our goal was to use a row of toggle switches to turn lights "on" for a binary one, and "off" for a binary zero.
We would load up one register with four bits and the only other register with four bits and then we'd press a switch that could only execute an add and we'd better get the right binary number on the third row of lights.
We started (I shit you not) all of our algebra, trig, geometry, etc. including square root extraction by pencil and paper and then moved into the slide rule age.
The only goddam transistors we saw were the 9-volt radios playing Elvis.
It little behooves the best of us to comment on the rest of us.
If you want hardware open to the transistor level and not just the microcode level ...
Like most RISC processors, RISC-V doesn't use microcode. Microcode is a CISC thing.
"It used to be the case that the computer you bought came with schematics and"
This is just as wrong. Insofar as the percentage of the population that bought these computers was vanishingly small, instead of ubiquitously large. Apples and Oranges. Different day and age and world. There was never a time that ordinary people purchases such things. It's a nice fantasy though, I'll give you that.
Plenty of ordinary people bought the original IBM PCs and PC/ATs. They didn't come standard with the schematics, but you could buy technical reference manuals from IBM which included both the schematics and the BIOS source code for the systems.
Maybe few end-users made use of the available info, but it did ensure that 3rd parties could create a large ecosystem of compatible software, accessories and even competing computer systems. This greatly benefited the end users, whether they cared to dig into the underlying technology or not.
. We also need to be able to DIY them, and therefore we need to have access to the right tools so we can create (or, as an option, order) the chips by ourselves ;) Also, we need a tool to (that is easy to) design the chips too, so we can build them later :D
But, at a start, this action is a very good one...
SiFive is working on this exact problem--to let DIYs get access to real, packaged, custom silicon based on either your specification or with your RTL. Stay tuned for some announcements coming up at next weeks (11/29) RISC-V workshop.
Today, you need to set your expectations and hopes realistically ... a raspberry pi or less
A Raspberry Pi has more transistors than a top end 1980s supercomputer. It is a million times more complex than anything you could ever hope to etch in a garage. Maybe you could do a 4004 (~2000 transistors) with tape and etchant, but a Raspberry Pi has billions.
Last time an FPGA design was getting me down, it was due to power consumption issues. We could get 4x the battery life with an ARM design as compared to the on-FPGA NEON processor cores we were using.
FPGA was super flexible, but what we really needed was a couple of ARMs and a tiny bit of programmable silicon for the actual custom bits.
The Apple IIe had some custom silicon, but the II/II+ was made up of entirely off-the-shelf components.
Please stand clear of the doors, por favor mantenganse alejado de las puertas
The high speed is because they currently don't have any on-chip flash (flash being slower to access than SRAM, and typically being what slows 32-bit microcontrollers down). That means this isn't a single-chip solution like most microcontrollers, though they are working on changing that.
Instead of flash, they store their program in the same SRAM used to store data (which makes that 8 kB of SRAM a lot more limiting than it would be on a Cortex M0 with the same amount of SRAM plus 16-256 kB flash). Most microcontrollers use a Harvard architecture with separate program and data memory, allowing instructions to be fetched from flash while performing reads from and writes to SRAM. If they don't do this, I wonder what sort of performance they'll see when they have to make regular reads from a slow flash memory in between SRAM accesses. Or will they just load the entire program into SRAM? That's not going to be ideal in terms of power consumption, requiring a much bigger memory array than they'd otherwise use, something that's going to get worse as they try to compete with larger microcontrollers.
Also, the Harvard architecture has some advantages in security: things can be set up so a very specific sequence of actions has to be performed to enable writing to program memory. With IoT devices, this sort of thing is becoming more important...not an issue at present, with their 8 kB memory, but something to consider when thinking about this thing's future.