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Startup Offers A Chip Based On The Open Source RISC-V Architecture (computerworld.com.au)
angry tapir shared this news from Computerworld:
An open-source chip project is out to break the dominance of proprietary chips offered by Intel, AMD, and ARM... A startup called SiFive is the first to make a business out of the [open source] RISC-V architecture. The company is also the first to convert the RISC-V instruction set architecture into actual silicon. The company on Thursday announced it has created two new chip designs that can be licensed... but the company will not charge royalties. That makes it attractive alternative compared to chip designs from ARM and Imagination Technologies, which charge licensing fees and royalties.
One of RISC-V's inventors co-founded the company, and he says that support is growing -- pointing out that there's already a fork of Linux for RISC-V.
One of RISC-V's inventors co-founded the company, and he says that support is growing -- pointing out that there's already a fork of Linux for RISC-V.
But you have to pay a shitton of money to get the license. Well a shitton to a regular person anyway. If you can afford to manufacture one of these chips the license cost is probably a drop in the bucket.
I see you've been courted by ARM's marketing department. They've been coming to us as well with exciting charts about how affordable ARM licensing is versus the evil expensive RISC-V. But look closely, it's bullocks.
If all you want to do is mark Cortex-M0 chips, then ARM's DesignStart license is cheaper than hiring an engineer to put together a RISC-V. ($40K iirc). Of course ARM makes that up if you manage to ship a lot of M0 units. But if you need a wide range of ARM products, the licenses quickly get more expensive. And sadly ARM's marketing department doesn't tell you their top tier license is 20x more than their bottom end.
This is about security. Cost is second. If I can implement an open source RISC-V processor, don't you get that I could audit every instruction executed, as well as the means to execute those instructions? Most people blindly support a black box known as Intel or AMD to execute their instructions. There could be a dozen things undocumented hiding in that box that you never knew about, whether planted there unintentionally as bugs, or intentionally by governments and large companies.
RISC-V can be embedded into your ASIC design, which is not something you can do with an x86-64 from Intel or AMD. Not only because RISC-V tends to be smaller, but because Intel and AMD do not license their designs in such a way to allow vendors to embed the design. The other aspect or RISC-V that I think is quite interesting is that it has a wide range of configurations, allowing you to tailor an instance of the processor for your particular application.
I expect in the near future you will see RISC-V popping up as embedded processors in cameras, TVs, smart appliances, cars, routers, and more. Places where you might have had a MIPS or ARM in the past could also be serviced by a RISC-V. And the configurations available are quite a bit more flexible than MIPS and quite a bit cheaper than ARM, making it fit a broad range of markets. In a few years you will likely be using a RISC-V in some way, even if you are still stuck on trying to force your comparisons to a narrow market of desktop PCs. (your PC's GPU will probably have one or more RISC-V cores on it to manage power and orchestrate jobs to shaders)
Price and flexibility is the advantage here. Power is basically a solved problem, we know theoretically what the best power we can achieve for a particular computation (thanks to the laws of thermodynamics), and at a very low level that is already done by all the low power architectures, including x86. Theoretically RISC-V is as scalable as any other modern CPU architecture, and maybe someone will make a super computer out of the 64-bit variant of it some day.
“Common sense is not so common.” — Voltaire
...there's already a fork of Linux for RISC-V.
Wrong approach.
The right approach is to take FreeBSD who's upstream is already mature on RISC-V and you don't have to go to look for patches.