1.6 GHz Alpha With Transputer Features Coming?

GFD writes "The Register has a story about a 1.6ghz alpha with 8 paralell rambus channels (8oomhz) and a transputer like channel to 4 other cpus (10ghz), integrated memory controller and l2 cache. Science fiction? Maybe, but oh my God what specs!!"

Comments

They're overpriced for a reason

[Tet]

Sure, the major RISC chips tend to be much more expensive than consumer chips. There's a reason for that -- cache. The only chips Intel make with a comparable amount of cache to, say, an UltraSPARC, is the high-end Xeons. Surprise, surprise -- the Xeon is just as overpriced as the others.

Of course, even accounting for cache, the prices are artificially high, just because that's the price people are willing to pay. Profit margins on those chips are significantly higher than on commodity CPUs.

A pun (ahem)

[sinator]

I use my tool for entertainment all the time ;-)
The use of my tool is certainly one of my longest hobbies.
Some people say that I am addicted to playing with my tool.
They're probably right; but who cares?
I better be careful with my tool; i wouldnt want to pick up any viruses through its use.
And in thirty years, my tool will be obsolete :)

I think the only difference between one 'tool' and another is that with computers, smaller IS better!

Some 21364 URLs

[Tekmage]

Alpha 21364: A Scalable Single-chip SMP

Alpha OEM

Re:Why Bother?

[LinuxParanoid]

The 6.4 GB/sec memory bandwidth that feeds all this data into the CPU is 16x faster than Apple G4 systems' current 400 MB/sec and 8x faster than Apples "fast" 800 MB/sec motherboard coming out in a month or so. Fast memory bandwidth (and I/O bandwidth) is the difference between "supercomputer marketing" and a real supercomputer.

The G4's flops are totally bogus because you can't feed the CPUs at those rates, at least for reasonably sized datasets that overflow the L2 cache.

This is all "apples and oranges" comparisons of today's product versus futures though, and I'd agree that switching to Alpha would be a dumb move for Apple or Apple users.

--LP

Heat?

[Plasmoid]

The current Alphas dissipate enough heat to cook food. Will this thing produce enough to start nuclear fusion? Will I need a liquid nitrogen cooling system?

Re:Heat?

[prumpf]

Digital never cared about power consumption because, really, if you buy a $20K system you don't care if you pay $500/yr or $1K/yr for it. Starting with the 21264, Alphas do support a "sleep mode" with reduced (reduced to something about 20 W as opposed to the 90 W a 21264/500 MHz normally has) power consumption (Linux doesn't support that yet. It will once someone is bored enough to do it but not right now.) and I don't think there is any technical reason that could not be further reduced.

Check this...

[Anonymous Coward]

Well, according to "Great Microprocessors of the Past and Present" this is just the beginning. The Alpha was designed with this in mind from the start, "Alpha was designed for the future for a 1000-fold eventual increase in performance (10X by clock rate, 10X by superscalar execution, and 10X by multiprocessing)." Check the Alpha section: http://www.cs.uregina.ca/~bayko/cpu.html#Sec5Part4 I'd recommend reading the page in general, LOTS of great CPU info: http://www.cs.uregina.ca/~bayko/cpu.html

Here are the detailed specs for 21364 and 21464

[Anonymous Coward]

the alpha roadmap

http://www.microprocessors.co.uk/roadmap.pdf

21364 and 21464 Info

http://www.microprocessors.co.uk/futures.zip

Register Article with the two links above.

http://www.theregister.co.uk/990321-000011.html

The futures zip file is hard to download but worth it.

This is real.

[Mr. Piccolo]

Check out the Alpha site.

You can read the slides for yourself, but all that needs to be said is an estimated SPECint of 75 and a SPECfp of 120 (the best now is like, 30 and 60).

At those rates, who needs hardware acceleration for Quake?!

Details of transputer architecture

[Morgaine]

Transputers had at least 3 features that made them so far ahead of their time that they died through lack of applications. Or maybe it was just because the Brits and the French are lousy at bringing things to market. If only Intel had bought out Inmos ...

Anyway, getting back to the features:

- A process scheduler implemented in hardware (an outer loop outside the usual inner instruction fetch and execute loop), which allowed transputers to implement concurrency with very fine granularity because the context switch time was exceptionally low. (And the process scheduler was directly driven by I/O events at the transputer links, below.)

- Four high-speed serial "Inmos links" on-chip through which the transputer could be linked directly to other transputers and to other peripherals without further glue logic, so that building multiprocessors was very inexpensive and scaled linearly. Furthermore, these links ran not only extremely quickly (for their time) despite being serial, but more importantly they ran under DMA power all simultaneously and at the same time as the processor was doing its own thing independently.

- The above two features made the transputer exceptional for multiprocessing, but I think its instruction set was also far, far ahead of its time: not only ultra-RISC, but highly extensible too. For example, numeric literals in instructions were only as long as needed, because an extension bit would (if present) indicate that more bits were to follow if needed. This made code *extremely* tight. The scheme also allowed extensions to the instruction set to be made in a fully backward-compatible manner.

The transputer was ultra-cool, and the world hasn't seen anything like it since. No doubt somebody will reinvent this approach some day, but probably in a US or Japanese lab, as usual, and they'll take the credit for exceptional design ideas made in an earlier age. Sigh.

Why Bother?

[Valdrax]

Why bother?

The peak rate for this future 1600 MHz chip is only 6.4 gigaflops with its "new SIMD 3D instructions." The current 500 MHz G4 chip peaks at 4 gigaflops with single-precision Altivec SIMD operations. That means that this future Alpha only has a 8:5 gigaflop advantage over the current PPC rather than the 16:5 advantage you would expect from the higher chip clock rate alone, plus the higher memory bus clock rate than the PC-100 RAM that the PowerMac G4s use. If this is as good as it gets compared to now, then how will it compare to higher clocked PPCs also coming in the future?

While it'll beat the snot out any future x86 chips for awhile, it's a far sight from being worth porting away from PPC, which has a bright future ahead of it. Expect Apple to stick with the PPC. It is easily comparable in performance (though still edged out by Alpha on non-vectorized integer and FP operations), but it beats the heck out of Alpha on price, heat, and power consumption -- which is key for notebooks and low-end consumer machines. Also, the hassles of binary incompatibility makes it by far not worth the trouble.