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On The Transmeta Patents
Ari Levien sent us an article over at CNet that talks about the Transmeta Patents and what they might be up to. You're never gonna believe it: a chip that will emulate the x86.
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My read of the new Transmeta patent confirmed that yes, the processor will "emulate" other instruction sets... but that is not the important heart of the patent. The patent is not on a chip that translates instructions from one set to another (watch for that one, it should be coming soon), the patent is very specifically on a very important issue to operating system designers. Basically, their chip sounds like it will handle multiprocessing (not multithreading since the processes will not share their environment) and prevent process deadlock. I've never seen a study on deadlock avoidance in a situation where the instruction sets are multivarious and being cross-translated but I imagine it could get quite hairy!
Esperandi
I just want to warn you that most of what the "expert" Richard Belgard has to say on the matter is nonsense. I sent a message to the Journalist who wrote the article, here it is:
I was reading your recent article regarding the Transmeta patents. I develop compilers and so have some background in the area of low level processor archetecture, specifically exception handling.
I'm not sure who Richard Belgard is but much of what he says regarding the patent is nonsense. He may know patents but his interpretation of the patent is largely misguided.
First, some corrections:
Your article states: "Transmeta could be able to sell its chips at a lower, more-competitive cost by avoiding fees it would otherwise have to pay to license Intel patents"
While it may be true that Transmeta can save money by avoiding Intel's patents. That is not why this method will be more inexpensive. The reason the chip will be cheaper is because it is VLIW. That makes for a simpler processor design and more inexpensive chip. Many optimization functions are offloaded, making for a simpler chip. Simpler also translates into higher clock speeds (faster chip).
Later, the article says: "those instructions are stored in memory--either conventional memory or high-speed "cache" memory--so they can be called upon quickly. Because of this method, the Transmeta chip would be good at performing the same instructions over and over, a circumstance that wouldn't force the delays imposed by the translation process...That could make the Transmeta chip a good choice for something like a router..."
I'm not sure why the cache is focused apon so much. It really is an unimportant part of the patent. caches are used very commonly and it's use here is common sense. Regarding the sugestion that the chip may be good for something like a router, that's pretty silly as well. Routers and set top boxes are specialized and therefore don't need to emulate another processor. Using their own processor makes much more sense. Emulation would just be a waste.
Later: "Specifically, it describes when a step in the translation is complete enough that it should be stored in memory"
That is aproaching accurate, but isn't how I would describe it. I'll approach this one a little differently.
Problem: Emulation is slow because state (that is, a 'snapshot' of the processor's...well...state) must be stored for each instruction executed. This is in case an unexpected event or error occurs. This takes up time and makes it so that instructions cannot be reordered for efficiency.
Solution: Store memory writes in a buffer until a 'commit' happens. At this time the processor checks if any of the previous instructions generated an error. If not the buffer is written to permanent memory. If so, the processor can roll back to the point of the error and handle it appropriately.
I cannot stress enough how important this is from a feasability standpoint. This jumps over one of the major hurdles of emulation.
Another small point; Comparing this to AMD or Cyrix attempts is like apples and oranges. They have made clones. This is an emulator. That's why the mention of Intel's patents is a little strange in this context. It isn't intended to create an Intel clone (like AMD or Cyrix). This is an attempt to create a generic "processor agnostic" chip, capable of running anything, as far as I can tell...including Merced. It's important to also note that this chip can apparently run it's own native code as well.
If you have any questions, e-mail casey@sarahandcasey.com
Although all the information released to date about the Transmeta technology is concentrating on its ability to run x86 (or any other) chip-specific code, surely the ultimate goal is to run native code on this fast cheap hardware. If it run x86 code at high speed, then Transmeta have a potential revenue stream from day one. But hey, that doesn't really explain what Linus's role in all this does it.
Say that in parallel to developing the x86 compatability, Transmeta are also developing a native code environment. What operating system would be the easiest to port to such a new environment, and who would you want on board to do it for you? Duh...
That emulation of the x86 instructions is involved was pretty obvious from the patent document itself. The question is HOW is it done, and no more light has been shed on that.
Personally, I believe they're working on a meta-CPU which doesn't have a native general purpose instruction set of its own, but rather can be programmed to impersonate any number of processors on the fly. This makes sense particularly in light of the rising popularity of FPGA-type approaches to computing. The recent announcement by a company (I forgot the name) of a "mainframe on the desktop" (no, it wasn't Apple!) which is based on 256 or so FPGAs is typical of the trend. Scientific American in its previous issue had several articles about research at MIT into future computing devices, particularly handheld units containing FPGA-type hardware that is reconfigured dynamically to perform whatever functionality the current task requires.
If they strike the pot of gold and do it right--if indeed it can be successfully done--the implications are sublime. Imagine having a PC that can "multitask" being a Pentium, a MIPS, an Alpha, a PPC, a Z80, etc. The processing unit constantly time slices between the different CPU "emulations", each of which in turn is running some operating system. This wouldn't be real emulation in the sense of translating foreign instructions to a native set, incurring the necessay slowdown, but rather instruction decoding in hardware.
The main problem I see is the relatively low logic density of FPGAs as compared to dedicated hardware. Implementing an ALU on an FPGA would require considerably more logic gates and real estate, simply because those gates are general purpose and can also do lots of other things besides being part of an ALU. In addition, having more gates implies more propagation delays, longer signal paths, etc etc. The real gem would be to come up with a strategy or technology which can resolve these issues while still providing all the benefits of a truly generic "CPU".
That's all been resolved now.
Apparent Linus stubled across project "herring" at TransMeta. He had believed that is was the company's project to keep the press and competitors off the trail of what they were working on.
In reality project "herring" was a super-secret project for the US military to turn penguins in the ultimate killing machine. Reports surfaced of emperor penguins with machine guns embedded in their eye sockets and tactical nukes implanted in their bulbous bellies.
The project was cancelled after the army decided to test the work and dropped 1000 of the altered penguins from a B-52 bomber over the Nevada desert. They apparently didn't realize that penguins couldn't fly and the horror of 1000 penguins impacting like water ballons quickly resulted in the project's cancellation.
Thus ended, Linus was able to return to work where the penguins now deliver mail.