Oh please. Next you'll want to know the exact DRAM configuration. Was it DDR? How big was the L2? Was the data set swapped out to a 7200rpm hard disk or a 10k rpm disk?
Good grief. It's just an estimate. It's not the exact compute time that's interesting. It still tells me the interesting bits-- that it was a complexity that an ordinary PC could do in a reasonable time frame, not the sort of thing a gigantic cluster chewed on for 100 years.
I'm not sure how the pricing is now, but when I bought my TV, you paid a big premium for a 16:9 screen. In fact, it was so large a premium that buying a 32" 4:3 TV was a LOT cheaper than a 27" 16:9. If you do the math, the 32" displaying a 16:9 image is equivalent to a 29" 16:9 screen.
And of course, a 4:3 tv is a lot more useful for the bulk of television programming.
(The TV in question is an absolutely awesome Samsung Tantus digital. Highly recommend it!)
Without addressing any other elements in the article, I'd like to point out that describing frequencies as "colors" is a terrible idea.
Color is a phenomenon of human visual perception. Specifically, color is a function of the power spectral distribution of incident light. Is yellow synonymous with 500nm? No. We may see light at 500nm as yellow, but we also see a mix of 650nm and 400nm as yellow too. This is the basis behind computer monitors-- even with only the ability to generating 3 different wavelengths (with different intensities), humans will perceive a very large number of colors.
There are many other ways of showing that color and frequency are not the same thing. Look at an artist's color wheel. We perceive a continuous circle of color. It's circular. But if color was a frequency, there would be a discontinuity as we wrap around from long wavelengths to short wavelengths.
Radios do not "perceive" color. They are interested in frequencies. Best not to confuse the two.
The same thing can be said about Shakespeare, so therefore he must be an awful writer. In fact, it's even worse than Star Trek--he only has three plots!
- Tragedy: Someone has a flaw that ultimately leads to their demise.
- Comedy: misunderstandings and odd characters combine. Hilarity ensues.
- Histories: An elaboration and dramatization of historical events and people.
I've read a lot of architecture bashing. "P4's 8K L1 is too small to be useful." "AMD's huge L2 is too slow to be useful."
Both of these companies spend *billions* of dollars on producing these processors. Both companies run lots of simulations to determine what design choices best fit with the rest of their design. When you're spending that much time and money developing these CPUs, you can't afford NOT to consider every option.
When it comes down to it, both AMD and Intel have really good engineers, and both companies listen to them when figuring out how to build cpus.
So consider that the P4's 8KB L1 trace cache is so small because that's as big as they could make it while keeping the latency down to 2 cycles-- something that was critical to keeping their double pumped ALUs busy (and thus their IPC up as much as they can)-- and that they could compensate by working a bit harder on a fast L2.
Perhaps AMD decided that they could live with an extr cycle of latency in the L1 because they have enough instrucions in-flight that blocking on a cache access wouldn't hurt them as much as a low hit rate would.
Or, perhaps there are multiple sweet spots in size/hitrate, especially when you factor in die size and cost. Honestly, I don't know the reasons why they made these decisions, and I'd love to find out why-- but I have 100% confidence that all the options were carefully considered.
When it comes down to it, both architectures are performing really well! And for YEARS, they have been competitive with each other. So while you may have your favorite (I, for example, think the P4 SMT and trace cache stuff is pretty neat), you've got to realize that zealously promoting one over another just makes you look silly.
The HDTV standard provides approximately 20Mbps. This, of course, includes some very impressive compression technology.
Even for an uncompressed stream, the figure you provide is really bloated; color requires only about twice the bits of b&w once you do the appropriate color space conversions and account for the decreased dynamic range of some channels. Plus, HDTV does NOT have a 1080p mode at 60 fps. (It has 1080i @ 60fps and 1080p @ 30fps.)
HDTV supports a wide variety of resolutions. I'd be willing to bet that the demo you saw that looked bad was probably a fairly low bitrate video stream being upscaled to 1920x1080. Chances are that you were looking at broadcast HDTV; few broadcasters are broadcasting at 20Mbps. Instead of broadcasting full-resolution HDTV streams, they're broadcasting low resolution versions of their low-resolution analog feeds.
I'm not going to say that any particular JVM I've used has been amazingly fast (i.e., coming anywhere close to a C app), but the potential is there.
Garbage Collection can actually improve locality, and thus cache hit rate... which leads to faster performance. Years ago, in 6.001 (a introductory programming class), we all had to read about how generational GCs can result in a net speedup due to improved cache performance, *including* the cost of the GC itself. I'm not saying this is common, but it's possible.
Also, a dynamically recompiled machine can perform runtime optimizations that you just can't do at compile time.... finding hot traces and inlining them, for example. The Dynamo project dynamically recompiled PA-RISC into PA-RISC (yes, kind of strange) and got net speedups over -O4 executables in several cases. The same technology can be applied to Java.
Again, I'm not saying we're there yet, or that we'll ever get there with Java, but the nay-sayers should realize that a VM language system allows for all kinds of "magic" optimizations that CAN more than make up for the overhead of the VM itself.
A typical FIRST team costs about $40,000 (most donated by companies) and provides a wonderful experience for about 10-30 students (depending on the school.)
For $40,000, robotics contests like MIT's 6.270 or 6.186 can provide an experience for about 200 students. FIRST's large robots eat up money at an astonishing rate.
I'm not saying FIRST should be done away with-- it gets businesses involved in education, but before people get too carried away-- keep in mind the gigantic cost of FIRST.
I actually just gave a little talk on the subject of uPs continuing their rapid growth (the 58% or so that Moore's law implies). Bad news...
Even assuming we can reach 35nm gate lengths (that's a.035um process), the speed of the wires will be problematic because (to a rough approximation) the delay of a wire increases as 1/scale factor squared. In other words, decrease the feature size of your chips by a factor of 0.5, the delay of global wires goes up 4x. (Transistors are roughly sped up by 2x, however.)
Global wires are used to connect big functional blocks of a uP, like the ALUs, Cache, register file, etc.
The delay of small little wires (connecting adjacent gates, for example) stays about the same, but this still poses a problem since the transistors will have to wait for the wires as they get even faster.
Wiring is already responsible for much of the delay of a uP, and is only going to get worse. Even if transistors get to 35nm (which the SIA predicts will happen in 2014), they only get 7x faster. This corresponds to a 15% annual improvement rate, well short of Moore's law 58%.
Imagine a plot of the relative performances of the fastest uniprocessor machine on earth compared to the fastest uP, graphed vs. time. see paper. What you'd see is that, in fact, the fastest computers in the world have been improving at a rate closer to 12-14% annually. uP's got a late start and were many orders of magnitude slower. uP's have been catching up, borrowing technologies from minis and supercomputers which have been resulting in yearly advantages of 50-60% over the last 20 years or so. But uP's are about to hit the same hurdles that have been bothering supers for a long time. (Supercomputers have been communication bound for some time.) Until something fantastic happens (optical? organic?) uPs and supercomputers may be very similar in performance.
One last thing to note is that the bad news about future growth of uPs places an assumption on the microarchitecture--that it remain largely the same as today's. There are other possibilities being researched, for example, the RAW group at MIT. They may be able to cope with the wire delays in ways that a conventional uP cannot.
If you're interested in photonic crystals, there's a pretty good book:
Photonic Crystals, Molding the Flow of Light By Joannopoulos, Meade, & Winn
It's a bit mathy (Maxwell's equations) but describes how photonic wave guides work 'n such.
I didn't realize that the technology was anywhere close to commercial level yet, but I'm a bit curious about exactly what role the bubbles are playing. That's a take that I haven't heard before. It seems like if you have to form physical bubbles that your latency will be adversely affected... which was the whole point. I could be dumb though.
Compact Flash cards are widely used in digital cameras. They're already pretty low-cost and come in relatively high capacity... A quick check here http://www.d-store.com/d-store/product/cfpricing.s htm shows that capacities up to 128MB are available ($350), and the cost is roughly linear w/size.
I use a dinky 8mb card with my Nino 510 which helps out a lot with my five zillion avant-go subscriptions:)
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Oh please. Next you'll want to know the exact DRAM configuration. Was it DDR? How big was the L2? Was the data set swapped out to a 7200rpm hard disk or a 10k rpm disk?
Good grief. It's just an estimate. It's not the exact compute time that's interesting. It still tells me the interesting bits-- that it was a complexity that an ordinary PC could do in a reasonable time frame, not the sort of thing a gigantic cluster chewed on for 100 years.
I'm not sure how the pricing is now, but when I bought my TV, you paid a big premium for a 16:9 screen. In fact, it was so large a premium that buying a 32" 4:3 TV was a LOT cheaper than a 27" 16:9. If you do the math, the 32" displaying a 16:9 image is equivalent to a 29" 16:9 screen.
And of course, a 4:3 tv is a lot more useful for the bulk of television programming.
(The TV in question is an absolutely awesome Samsung Tantus digital. Highly recommend it!)
Without addressing any other elements in the article, I'd like to point out that describing frequencies as "colors" is a terrible idea.
Color is a phenomenon of human visual perception. Specifically, color is a function of the power spectral distribution of incident light. Is yellow synonymous with 500nm? No. We may see light at 500nm as yellow, but we also see a mix of 650nm and 400nm as yellow too. This is the basis behind computer monitors-- even with only the ability to generating 3 different wavelengths (with different intensities), humans will perceive a very large number of colors.
There are many other ways of showing that color and frequency are not the same thing. Look at an artist's color wheel. We perceive a continuous circle of color. It's circular. But if color was a frequency, there would be a discontinuity as we wrap around from long wavelengths to short wavelengths.
Radios do not "perceive" color. They are interested in frequencies. Best not to confuse the two.
-Ed
The same thing can be said about Shakespeare, so therefore he must be an awful writer. In fact, it's even worse than Star Trek--he only has three plots!
- Tragedy: Someone has a flaw that ultimately leads to their demise.
- Comedy: misunderstandings and odd characters combine. Hilarity ensues.
- Histories: An elaboration and dramatization of historical events and people.
Wow. Shakespeare sucks.
Both of these companies spend *billions* of dollars on producing these processors. Both companies run lots of simulations to determine what design choices best fit with the rest of their design. When you're spending that much time and money developing these CPUs, you can't afford NOT to consider every option.
When it comes down to it, both AMD and Intel have really good engineers, and both companies listen to them when figuring out how to build cpus.
So consider that the P4's 8KB L1 trace cache is so small because that's as big as they could make it while keeping the latency down to 2 cycles-- something that was critical to keeping their double pumped ALUs busy (and thus their IPC up as much as they can)-- and that they could compensate by working a bit harder on a fast L2.
Perhaps AMD decided that they could live with an extr cycle of latency in the L1 because they have enough instrucions in-flight that blocking on a cache access wouldn't hurt them as much as a low hit rate would.
Or, perhaps there are multiple sweet spots in size/hitrate, especially when you factor in die size and cost. Honestly, I don't know the reasons why they made these decisions, and I'd love to find out why-- but I have 100% confidence that all the options were carefully considered.
When it comes down to it, both architectures are performing really well! And for YEARS, they have been competitive with each other. So while you may have your favorite (I, for example, think the P4 SMT and trace cache stuff is pretty neat), you've got to realize that zealously promoting one over another just makes you look silly.
Cheers!
-Ed
The HDTV standard provides approximately 20Mbps. This, of course, includes some very impressive compression technology.
Even for an uncompressed stream, the figure you provide is really bloated; color requires only about twice the bits of b&w once you do the appropriate color space conversions and account for the decreased dynamic range of some channels. Plus, HDTV does NOT have a 1080p mode at 60 fps. (It has 1080i @ 60fps and 1080p @ 30fps.)
HDTV supports a wide variety of resolutions. I'd be willing to bet that the demo you saw that looked bad was probably a fairly low bitrate video stream being upscaled to 1920x1080. Chances are that you were looking at broadcast HDTV; few broadcasters are broadcasting at 20Mbps. Instead of broadcasting full-resolution HDTV streams, they're broadcasting low resolution versions of their low-resolution analog feeds.
-Ed
I'm not going to say that any particular JVM I've used has been amazingly fast (i.e., coming anywhere close to a C app), but the potential is there.
Garbage Collection can actually improve locality, and thus cache hit rate... which leads to faster performance. Years ago, in 6.001 (a introductory programming class), we all had to read about how generational GCs can result in a net speedup due to improved cache performance, *including* the cost of the GC itself. I'm not saying this is common, but it's possible.
Also, a dynamically recompiled machine can perform runtime optimizations that you just can't do at compile time.... finding hot traces and inlining them, for example. The Dynamo project dynamically recompiled PA-RISC into PA-RISC (yes, kind of strange) and got net speedups over -O4 executables in several cases. The same technology can be applied to Java.
Again, I'm not saying we're there yet, or that we'll ever get there with Java, but the nay-sayers should realize that a VM language system allows for all kinds of "magic" optimizations that CAN more than make up for the overhead of the VM itself.
That's truly terrific, but it's also the exception.
-Ed
A typical FIRST team costs about $40,000 (most donated by companies) and provides a wonderful experience for about 10-30 students (depending on the school.)
For $40,000, robotics contests like MIT's 6.270 or 6.186 can provide an experience for about 200 students. FIRST's large robots eat up money at an astonishing rate.
I'm not saying FIRST should be done away with-- it gets businesses involved in education, but before people get too carried away-- keep in mind the gigantic cost of FIRST.
-Ed
An interesting thing about this radio technology is that the baseband encoding (about 100MHz in width) is all done in software. Neat.
Even assuming we can reach 35nm gate lengths (that's a .035um process), the speed of the wires will be problematic because (to a rough approximation) the delay of a wire increases as 1/scale factor squared. In other words, decrease the feature size of your chips by a factor of 0.5, the delay of global wires goes up 4x. (Transistors are roughly sped up by 2x, however.)
Global wires are used to connect big functional blocks of a uP, like the ALUs, Cache, register file, etc.
The delay of small little wires (connecting adjacent gates, for example) stays about the same, but this still poses a problem since the transistors will have to wait for the wires as they get even faster.
Wiring is already responsible for much of the delay of a uP, and is only going to get worse. Even if transistors get to 35nm (which the SIA predicts will happen in 2014), they only get 7x faster. This corresponds to a 15% annual improvement rate, well short of Moore's law 58%.
A bunch of this is described here.
Imagine a plot of the relative performances of the fastest uniprocessor machine on earth compared to the fastest uP, graphed vs. time. see paper. What you'd see is that, in fact, the fastest computers in the world have been improving at a rate closer to 12-14% annually. uP's got a late start and were many orders of magnitude slower. uP's have been catching up, borrowing technologies from minis and supercomputers which have been resulting in yearly advantages of 50-60% over the last 20 years or so. But uP's are about to hit the same hurdles that have been bothering supers for a long time. (Supercomputers have been communication bound for some time.) Until something fantastic happens (optical? organic?) uPs and supercomputers may be very similar in performance.
One last thing to note is that the bad news about future growth of uPs places an assumption on the microarchitecture--that it remain largely the same as today's. There are other possibilities being researched, for example, the RAW group at MIT. They may be able to cope with the wire delays in ways that a conventional uP cannot.
-Ed
Photonic Crystals, Molding the Flow of Light
By Joannopoulos, Meade, & Winn
It's a bit mathy (Maxwell's equations) but describes how photonic wave guides work 'n such.
I didn't realize that the technology was anywhere close to commercial level yet, but I'm a bit curious about exactly what role the bubbles are playing. That's a take that I haven't heard before. It seems like if you have to form physical bubbles that your latency will be adversely affected... which was the whole point. I could be dumb though.
I use a dinky 8mb card with my Nino 510 which helps out a lot with my five zillion avant-go subscriptions :)
-Ed