Maybe you just shouldn't try to replace $650 desktops with Macs. Instead, give Macs to poeple who would otherwise be using $2,500 workstations or notebooks.
EPIC (i.e. Itanium) is still based on centralized structures like register files. To create a 16-issue EPIC processor, you'd need a ~32R/16W port register file which would be virtually impossible to build because it would be so huge and power-hungry. Also, EPIC needs heroic compiler optimizations to overcome its in-order execution, while EDGE is naturally out-of-order.
Yes, TRIPS is an out-of-order superscalar processor. But it's bigger and better: by eliminating centralized structures, a TRIPS core can issue more instructions per cycle out of a bigger instruction window. It's not just more of the same; it's a qualitative improvement that allows much bigger (and thus higher performance) cores to built, yet with lower power and design costs.
When the fastest Barcelona is ~2.5GHz and Clovertown is 3.0GHz, comparisons at the same frequency are pointless. What matters in reality is performance at the same price or performance at the same power or highest available performance at any price.
There are 'hybrid drives' where the flash is part of the hard drive, there's the Windows Vista method which uses a separately attached flash memory (typically USB), and there is this "Robson Technology" where it is on the motherboard.
The hardware and OS support is orthogonal; Vista supports all three kinds of flash.
It really seems to me that the 'hybrid drive' is the Right Thing to do. The cache contents is useless without the drive, and the drive is potentially corrupt without the cache contents, so why make them separable?
If the cache is write-through then you wouldn't have to worry about drives getting corrupted. You can remove a hard disk from a notebook, but it's not exactly easy so I don't think that's much of a concern.
I think the real reason Robson exists is political: Intel doesn't make hard disks, but they want to offer some kind of flash cache, so they build what they know how to build. It will be interesting to see whether vendors choose Robson or hybrid hard disks and why.
With a dual-core chip, you expect both cores to contribute 50% to the heat load. If one core's throttled back, you can overdrive the other core without the chip overheating.
This is not the case, because the heat does not spread out on the chip that much. So the peak temperature of a core doesn't depend on the behavior of the other cores. The fact that Intel is using EDAT indicates that Merom is power-limited but not temperature-limited.
I would not suggest cluster file systems such as Lustre for a small installation; they're generally designed to scale up to hundreds or thousands of servers, but not to scale down to a handful.
Not really; Linux can just run in insecure mode. It may not be allowed to play Blu-ray or HD-DVD, but since there is no such (official) player software for Linux anyway it doesn't matter.
The point of the presentation was that Intel's proposal is not that different from today's x86; it's a cache-coherent SMP. Really the only new feature is 16-wide SIMD rather than 4-wide in SSE today, so you just unroll your inner loops four times as much. But Cell is totally different from traditional architectures because the SPUs have no caches.
It looks like soon enough everyone will be using Debian's children and no one will be using Debian. At that point there will be no need to even have stable Debian releases at all.
Looks like the FSF has admitted failure in one of the major goals of GPLv3; they're no longer trying to be compatible with the Apache License 2.0. It frustrates me that they are solving problems like "Tivoization" but not this. Maybe the ASF can create an Apache 2.1 license to solve this.
Pthreads don't work on clusters, GPUs, or Cell, and they are about 100 times harder to program than new data-parallel APIs/languages that are now being developed. This is probably explained in the video but since this is Slashdot, neither of us bothered to watch it.
Except NVidia's NVCC has NVidia-specific syntax extensions, which is just more lock-in. Maybe somebody will propose a metacompiler that can output Peakstream-C, RapidMind-C, or CUDA-C...
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Maybe you just shouldn't try to replace $650 desktops with Macs. Instead, give Macs to poeple who would otherwise be using $2,500 workstations or notebooks.
Sure, this is great for Flex developers. But there are many more users than developers, and this announcement doesn't help them.
EPIC (i.e. Itanium) is still based on centralized structures like register files. To create a 16-issue EPIC processor, you'd need a ~32R/16W port register file which would be virtually impossible to build because it would be so huge and power-hungry. Also, EPIC needs heroic compiler optimizations to overcome its in-order execution, while EDGE is naturally out-of-order.
Yes, TRIPS is an out-of-order superscalar processor. But it's bigger and better: by eliminating centralized structures, a TRIPS core can issue more instructions per cycle out of a bigger instruction window. It's not just more of the same; it's a qualitative improvement that allows much bigger (and thus higher performance) cores to built, yet with lower power and design costs.
Or you could do the same thing with VMware ESX.
When the fastest Barcelona is ~2.5GHz and Clovertown is 3.0GHz, comparisons at the same frequency are pointless. What matters in reality is performance at the same price or performance at the same power or highest available performance at any price.
Er, most TeX-generated PS/PDF documents that I've seen print fine but look horrible on screen. IIRC, it's got something to do with them using an unusual font format.
Exclusion at all costs?
Here's the legal Windows Media codec bundle for Linux & Solaris.
You know, you can use these cards with DX9 under XP. Just because the card supports DX10 doesn't force you to use it.
They also support OpenGL and Linux (using proprietary drivers).
Robson is a PCI Express Mini Card, but I doubt anyone will ever replace one. It's a cache; if it wears out just don't use it any more.
There are 'hybrid drives' where the flash is part of the hard drive, there's the Windows Vista method which uses a separately attached flash memory (typically USB), and there is this "Robson Technology" where it is on the motherboard.
The hardware and OS support is orthogonal; Vista supports all three kinds of flash.
It really seems to me that the 'hybrid drive' is the Right Thing to do. The cache contents is useless without the drive, and the drive is potentially corrupt without the cache contents, so why make them separable?
If the cache is write-through then you wouldn't have to worry about drives getting corrupted. You can remove a hard disk from a notebook, but it's not exactly easy so I don't think that's much of a concern.
I think the real reason Robson exists is political: Intel doesn't make hard disks, but they want to offer some kind of flash cache, so they build what they know how to build. It will be interesting to see whether vendors choose Robson or hybrid hard disks and why.
With a dual-core chip, you expect both cores to contribute 50% to the heat load. If one core's throttled back, you can overdrive the other core without the chip overheating.
This is not the case, because the heat does not spread out on the chip that much. So the peak temperature of a core doesn't depend on the behavior of the other cores. The fact that Intel is using EDAT indicates that Merom is power-limited but not temperature-limited.
When one core is idle, the other one will only speed up by 200 or 400 MHz. So you have a choice between, say 2.4+2.4 GHz or 2.6+0 GHz.
I don't know why you think NFS doesn't support failover; check out Red Hat Cluster (PDF) or Sun Cluster. You will need a RAID array that has two host ports, such as VTrak E310s, IBM DS3200, HP StorageWorks 500, or Xserve RAID.
I would not suggest cluster file systems such as Lustre for a small installation; they're generally designed to scale up to hundreds or thousands of servers, but not to scale down to a handful.
Not really; Linux can just run in insecure mode. It may not be allowed to play Blu-ray or HD-DVD, but since there is no such (official) player software for Linux anyway it doesn't matter.
The point of the presentation was that Intel's proposal is not that different from today's x86; it's a cache-coherent SMP. Really the only new feature is 16-wide SIMD rather than 4-wide in SSE today, so you just unroll your inner loops four times as much. But Cell is totally different from traditional architectures because the SPUs have no caches.
It looks like soon enough everyone will be using Debian's children and no one will be using Debian. At that point there will be no need to even have stable Debian releases at all.
Looks like the FSF has admitted failure in one of the major goals of GPLv3; they're no longer trying to be compatible with the Apache License 2.0. It frustrates me that they are solving problems like "Tivoization" but not this. Maybe the ASF can create an Apache 2.1 license to solve this.
For long-haul links there's 40Gbps OC-768 and for data centers there's 2x16Gbps Infiniband.
Ethernet likes to increase by factors of 10 but 100Gbps is not practical yet, so there's nothing in between.
Sure, an x86 interpreter written in Java is going to be pretty slow, but a JIT written in Java beats a C interpreter (bochs) any day.
You mean Cell is optimized for 32-bit float. 64-bit double math is about 7x slower.
Pthreads don't work on clusters, GPUs, or Cell, and they are about 100 times harder to program than new data-parallel APIs/languages that are now being developed. This is probably explained in the video but since this is Slashdot, neither of us bothered to watch it.
Stanford's Sequoia compiler is supposed to be open source eventually. Plus, it looks a little easier to use than RapidMind, PeakStream, or CUDA.
The GPUs will ship with C compilers soon enough.
Except NVidia's NVCC has NVidia-specific syntax extensions, which is just more lock-in. Maybe somebody will propose a metacompiler that can output Peakstream-C, RapidMind-C, or CUDA-C...