I won't fund any electronics hardware project that appears to be asking for too little money. It's a sure sign they don't understand the scale of electronics manufacturing.
Reading TFA is seems by 'Kickstarter Goal' they mean getting funded. Once you've got funded you have to actually do the thing you said you were going to do with the money.
If people are using gender to determine who they are funding, they are presumably displacing more rational metrics, like "does the project make any sense?", or "Does this person seem competent to do what they claim they can do?'.
Thus in those areas where gender bias is measurable in funding, I would assume the odds of eventual successful delivery to be reduced.
The incarceration rate in the United States of America is the highest in the world. As of October 2013, the incarceration rate was 716 per 100,000 of the national population.[2] While the United States represents about 5 percent of the world's population, it houses around 25 percent of the world's prisoners.[3][4] Imprisonment of America's 2.3 million prisoners, costing $24,000 per inmate per year, and $5.1 billion in new prison construction, consumes $60.3 billion in budget expenditures.
How's that then? Would you care to explain, please, what you mean? My D-FFs here are totally synchronous: The D-input pops up at the output exactly with the rising clock edge + processing delay. And the latter is unavoidably indefinably..
A DFF is the basic element of a synchronous circuit, yes. But look inside a DFF and it's a basic async circuit with two (or 3 or 4) inputs and one (or two) outputs. That's why it requires you to maintain at least a minimum time gap between certain transitions on the inputs.
Don't they teach async design at college these days?
I do understand it. That patent describes an asynchronous data transfer with rendezvous using a conventional quadrature handshake. I can't imagine that there isn't prior art. That is standard stuff. The date of the patent is 2006. I finished my degree in 1991 around the same time the amulet async ARM was beginning development. My tutor at college invented the async register file for the amulet.
The method it describes is slow because it requires a two round trips between source and destination. That is why clock-in-data schemes are preferred. The neatest of those is the DS link code that was put out by Inmos in the early 90s (I used to work there). A receiving async circuit can recover data and clock and pass it on to a synchronous receiver using normal methods.
But it makes the same wrong assumption that the 'better than clock gating' efficiencies of async logic would be superior to a synchronous circuit. However these days it doesn't matter. In small geometries, your logic is sucking power whether or not it is clocked, due to static leakage. The way of the world these days is fine grained power gating. As per my previous post, async transactions have a role to play in power gating (because you don't need to leave the clock tree on to use them), but they are a false economy in random logic applications because the increased gate count leads to an increased static current draw.
Yes. In semiconductors, there's a basic tradeoff between static power dissipation and propagation latency. In a slow/low static current process, you might well be able to use asynchronous design to improve power efficiency. This is more the realm of RFID tags, payment cards and smart card chips. You won't be finding much of that going on in a desktop or phone CPU.
> The fact that a simple integer addition operation has a latency of 2 or 3 clock cycles doesnt prevent the CPU from executing 3 or more of those additions per clock cycle.
That's just wrong. It does't take three clock periods to propagate through an adder on today's silicon unless it's a particularly huge adder. It might take several cycles for an add instruction to propagate though a CPU pipeline, but that is completely different.
More gates == more static power draw. Leaving a circuit switched on because you don't know when asynchronous transitions will arrive == more static power draw.
Global async design may have made sense in 1992, but not these days. Silicon has moved on.
Every D-flip flop is an async circuit. We use a variety of other standard small async circuits we use that are a little bigger. Receiving clock-in-data signals like DS links is a common example. What you're talking about is async across larger regions.
Scaling fully asynchronous designs to a whole chip is a false economy. The area cost is substantially greater than a synchronous design and with the static power draw of circuits now dominating, the dynamic power savings of asynchronous design is moot. You need to turn circuits off to save power. Just rendering them static doesn't help much.
A modern CPU is made of islands of synchronous design, which are not assumed to be globally synchronous. Data passing between these islands is generally re-synchronized.
An exception is power control signaling. Clock trees are power hogs, so you don't want to have to leave it on to support the power gating interfaces. So an async state machine to communicate power management protocols is common.
Right. There's no way you'd run a signal across a one inch chip and expect to get anything useful out the other end.
In days of yore, the signal would be buffered a few times.
These days it would pass through 5 clock domains and power boundaries and so have to be rebuffered, resynchronized, levelshifted and firewalled at each stage. But this is normal and we do it all the time.
Not since term ended. It's not that you can't try to do it. It's that it doesn't work when you try it in any of the several ways we tried. Works fine on a normal computer. I'm not wasting more of my life on this. There'll be a new macbook in the house before term starts.
My daughter attends a public online school that is part of the local school district.
They use what I presume is a common software package for this sort of school. When doing assignments it typically asks to to write the homework in one of several formats (word, ODF, PDF, text etc.) and upload it through a web page. This simply does not work with ChromeOS. You cannot navigate to the Google docs files from the browser and select a file there to upload. This makes a ChromeOS computer entirely useless for many online schools.
ChromeOS may meet many needs, but it fails in significant content creation roles.
Slashdot Mirror
Try disabling scripting in Linux and see how far you get.
I won't fund any electronics hardware project that appears to be asking for too little money. It's a sure sign they don't understand the scale of electronics manufacturing.
We need to do a controlled experiment to establish causality. First get a second KickStarter web site..
Reading TFA is seems by 'Kickstarter Goal' they mean getting funded.
Once you've got funded you have to actually do the thing you said you were going to do with the money.
If people are using gender to determine who they are funding, they are presumably displacing more rational metrics, like "does the project make any sense?", or "Does this person seem competent to do what they claim they can do?'.
Thus in those areas where gender bias is measurable in funding, I would assume the odds of eventual successful delivery to be reduced.
>where AIDS was/is spread primarily through homosexual sex and intravenous drug use.
and blood transfusions.
Was it important?
I think they should be digging a tunnel instead.
>So essentially all Ecuador has to do is give him citizenship and declare him a diplomat?
No, the host country has to agree to the designation as well.
They should have thought of that before they let themselves be found by the police in possession of dark skin and black curly hair in a built up area.
https://www.youtube.com/watch?...
You are conflating asynchronous circuits with asynchronous communication between mutually asynchronous circuits.
America is closer to a penal colony these days.
From the internetz: http://en.wikipedia.org/wiki/U...
The incarceration rate in the United States of America is the highest in the world. As of October 2013, the incarceration rate was 716 per 100,000 of the national population.[2] While the United States represents about 5 percent of the world's population, it houses around 25 percent of the world's prisoners.[3][4] Imprisonment of America's 2.3 million prisoners, costing $24,000 per inmate per year, and $5.1 billion in new prison construction, consumes $60.3 billion in budget expenditures.
Every D-flip flop is an async circuit. W.
How's that then? Would you care to explain, please, what you mean? .
My D-FFs here are totally synchronous: The D-input pops up at the output exactly with the rising clock edge + processing delay. And the latter is unavoidably indefinably.
A DFF is the basic element of a synchronous circuit, yes. But look inside a DFF and it's a basic async circuit with two (or 3 or 4) inputs and one (or two) outputs. That's why it requires you to maintain at least a minimum time gap between certain transitions on the inputs.
Don't they teach async design at college these days?
>Most power is drawn on transitions.
Most power is drawn in static leakage.
There, fixed that for you. It isn't 1990 any more, when what you said was true.
No, he wasn't. From his post: "simple integer addition"
I do understand it. That patent describes an asynchronous data transfer with rendezvous using a conventional quadrature handshake. I can't imagine that there isn't prior art. That is standard stuff. The date of the patent is 2006. I finished my degree in 1991 around the same time the amulet async ARM was beginning development. My tutor at college invented the async register file for the amulet.
The method it describes is slow because it requires a two round trips between source and destination. That is why clock-in-data schemes are preferred. The neatest of those is the DS link code that was put out by Inmos in the early 90s (I used to work there). A receiving async circuit can recover data and clock and pass it on to a synchronous receiver using normal methods.
But it makes the same wrong assumption that the 'better than clock gating' efficiencies of async logic would be superior to a synchronous circuit. However these days it doesn't matter. In small geometries, your logic is sucking power whether or not it is clocked, due to static leakage. The way of the world these days is fine grained power gating. As per my previous post, async transactions have a role to play in power gating (because you don't need to leave the clock tree on to use them), but they are a false economy in random logic applications because the increased gate count leads to an increased static current draw.
It depends.
Yes. In semiconductors, there's a basic tradeoff between static power dissipation and propagation latency. In a slow/low static current process, you might well be able to use asynchronous design to improve power efficiency. This is more the realm of RFID tags, payment cards and smart card chips. You won't be finding much of that going on in a desktop or phone CPU.
Of course I'm hoping for the product update before term starts.
If you have a crappy old planar process maybe.
The speeds of the electrons is immaterial. The speeds of the electric field in the wires is what matters.
The electrons move really slowly.
> The fact that a simple integer addition operation has a latency of 2 or 3 clock cycles doesnt prevent the CPU from executing 3 or more of those additions per clock cycle.
That's just wrong. It does't take three clock periods to propagate through an adder on today's silicon unless it's a particularly huge adder. It might take several cycles for an add instruction to propagate though a CPU pipeline, but that is completely different.
How are they energy efficient?
More gates == more static power draw.
Leaving a circuit switched on because you don't know when asynchronous transitions will arrive == more static power draw.
Global async design may have made sense in 1992, but not these days. Silicon has moved on.
I guess that's me then.
Every D-flip flop is an async circuit. We use a variety of other standard small async circuits we use that are a little bigger. Receiving clock-in-data signals like DS links is a common example. What you're talking about is async across larger regions.
Scaling fully asynchronous designs to a whole chip is a false economy. The area cost is substantially greater than a synchronous design and with the static power draw of circuits now dominating, the dynamic power savings of asynchronous design is moot. You need to turn circuits off to save power. Just rendering them static doesn't help much.
A modern CPU is made of islands of synchronous design, which are not assumed to be globally synchronous. Data passing between these islands is generally re-synchronized.
An exception is power control signaling. Clock trees are power hogs, so you don't want to have to leave it on to support the power gating interfaces. So an async state machine to communicate power management protocols is common.
Right. There's no way you'd run a signal across a one inch chip and expect to get anything useful out the other end.
In days of yore, the signal would be buffered a few times.
These days it would pass through 5 clock domains and power boundaries and so have to be rebuffered, resynchronized, levelshifted and firewalled at each stage. But this is normal and we do it all the time.
>Have you tried that recently?
Not since term ended. It's not that you can't try to do it. It's that it doesn't work when you try it in any of the several ways we tried. Works fine on a normal computer. I'm not wasting more of my life on this. There'll be a new macbook in the house before term starts.
My daughter attends a public online school that is part of the local school district.
They use what I presume is a common software package for this sort of school. When doing assignments it typically asks to to write the homework in one of several formats (word, ODF, PDF, text etc.) and upload it through a web page. This simply does not work with ChromeOS. You cannot navigate to the Google docs files from the browser and select a file there to upload. This makes a ChromeOS computer entirely useless for many online schools.
ChromeOS may meet many needs, but it fails in significant content creation roles.