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User: Liquid-Gecka

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  1. Hrm.... on Diablo II: Lord of Destruction · · Score: 1

    That wasn't the best of ideas Hemos, There are going to be thousands upon thousands of people registering to test it now! Talk about crappy odds..

    You really should have waited till one day after letest acceptable registration date =)

  2. 2B or !2B on Be, Inc. Says Cash Can't Last Past Q2 · · Score: 1

    Well at least we know the answer is !2 Be now! =(

  3. Re:Guns on Are Kids Turning Your Kids Into Killers? · · Score: 1

    Acually.. America after the Civil War was the highest rate of guns to citizens ever in recorded history. There where by some estimates 3 guns for every man, woman, and child in the states. Granted, these where not semi auto's and such, but they where out there. (It was so bad infact that several gun makers went out of buisness because of the lack of gun sales after the war)

  4. Whew.. on Gnutella at One Year · · Score: 1

    Finally.. something we CAN'T slashdot..

    Or can we? *grin*

  5. fun things with linux on a watch =) on IBM Linux Watch v2.0 · · Score: 1

    'Bob thought he would be cool.. hehe.. he bought one of those linux wrist watches.. *chuckle* One day, when he acidently left it on his desk we logged on and added "*/1 * * * echo ^G >/dev/console" to his crontab! *laugh* now every so often he asks me where the setting is to change the watch back to beeping ONLY on the half hour!! *LOL* '

    (Office pranks of the future I guess =)

  6. Re:AMD is releasing a highly adaptable bus on AMD Challenges P4 With 1.33Ghz · · Score: 1

    First of all I would like to point out that both the AMD and Intel K7/P3&4 processor's use 32 bit.. and thats all. 8bit, 16bit, 32bit and 64bit are all code. They only support 32bit * FSB bandwidth.

    Memory is also 64bit, no exceptions other than RAMBUS. It is true that the memory support comes from the chipset, but the processor can still be designed to work with a certain type of memory, ex the P4/rambus setup.

    Your biggest lag is the data bus's. If you clock your processor to 10 tera hertz its still only going to be able to recieve data in/out at a fixed bandwidth. 32bits * clock. Intel has used some fancy marketing gimicks to apear to have a 400MHz FSB and AMD have pushed there 100x2 (200MHz) bus's. What it all comes down to though is a good multiplier/FSB combination. having a 1GHz FSB won't help you because you will spend to much time on the bus waiting for the processor to finish the command it is working on. Having a 33MHz FSB will be to slow because the processor spends to much time waiting for the chipset to send it data. In the end its about a good combination of the two, as well as good supporting hardware (1GHz FSB won't help if you have 100MHz memory, and (133x2)MHz PC2100 won't help you if you have a 66MHz FSB processor.

  7. Re:Remember DARPA's purpose on DoD developing Linux-based "Soldier's Radio" · · Score: 1

    Hrm.. for some reason I just can't see Windows.NET running a military radio! Its not really embeded application oriented and the ILOVEYOU virus could have some.. intresting results. "Sarge.. Sarge come in! I can't hear you, your breaking up.... erm.. I didn't know you thought of me that way sarge!"

  8. This isn't new at all. on Clockless Computing? · · Score: 2

    The first electronics where built without clocks. Most communications don't use clocks. your 100/t network doesn't have a clock to operate. It works by senging data (A high or a low) then a middle state. This is a voltage in between the zero and one states. On the recieving end it waits for the state changes. Once it recieves that middle state it knows that the next change is acually data. Once it recieves the data it waits for that invalid state to know that that bit has ended.
    The reason it has to do this is because both systems may be running at diferent speeds. If one's running at 100MHz and the other is at 102MHz then they will eventually get out of sync. Without a system like this they wouldn't even know they where out of sync. DSL/Cable/Modems all use systems like this. There are several hundred out there. Some of the mor common are Return to Zero (RZ) Non return to zero (NRZ) etc etc etc..

    Back to electronics though, several types of memory are acually async. You set your addressing pins, you pulse a pin high wich tells the chip that its address is waiting. The chip then looks up the memory and sets the output data pins and then sets a return pin wich allows the other electronics to use the data returned. This allows for the fastest operation of the chip as posable. Since there is no clock there is no speed to conform to. The chip will always return its fastest posable responce. This is also harder to work with since you have to rate your chips in a speed rate. You may remember this from the old 70ns/60ns/50ns EDO/SIMM memory erra.

  9. I find it funny on OS X Won't Be Fully Functional On March 24th · · Score: 1

    that MSNBC, 'a Microsoft-NBC joint venture' would be reporting problems with OSX with such flare. "early users will find a list of glitches that range from annoying to frustrating" and "Other gaps, ..., also will limit the new OS' usefulness to certain users", and thats just in the first paragraph)

  10. Civil disobedience. on OpenNaps Targeted; Gnutella "Validated" · · Score: 1
    If you really want to waste a corporation or groups time and money:

    Organize a large group of people.

    Arrange a date.

    File as many small claims court claims on or around said date.

    As long as there are several hundred/thousand small claims country wide the company will be overwhelmed with paper work. All people would have to be willing to put out the money to file the claim as it is unlikely that they will win the case.

    Mind you I am not sure about the legality of this, but it would create confusion within the companies legal team. It also would be kind of fun to watch the head lawyers office while he gets all the registered letters =)