Repeat after me, "seti@home is a signal processing application" not a scientific one! It seems to be the general consensus of a lot of people in the know (read comp.arch if you don't believe me) that altivec is a waste for general purpose scientific computing. That is why IBM isn't interested in it for their 'supercomputers'. Lack of precision and all that nonsense:> Motorola put altivec on those cpu's so their embedded customers could have a high end DSP solution not a math cruncher. The G4 makes a great high end DSP! Exactly what motorola wanted.
Thief- One who steals, especially one who steals movable property by stealth rather than force. Steal- to take (the property of another) without right or permission
Since it can be argued that nothing has been "taken" from the owner an in some cases it can be shown that the MPAA gains additional sales though the extra distribution napster affords (similar to radio) I would hesitate to call all napster users thieves. The only ones who are thieves are the ones who listen to music they haven't bought but would have purchased if they didn't have napster.
When I was looking into it the authors weren't getting a significantly larger royalty on those obscure textbooks. I assume there is a $50 difference between the 'dumb' books and the ones requiring 'more time and sheer brain power' so I would expect that $50 to go to the author. Except it doesn't, that extra money appears to go into the publishers black hole.
I've always been annoyed by the $100+ textbooks. The usual excuse for charging $115 for a textbook has been the cost of "paper, printing, binding, stocking..." Now with these people charging $600 for a DVD it sort of proves that the college textbook industry is just greedy and can get away with outrageous textbook prices because they have a captive audience.
IBM demonstrated a PowerPC chip running at 1 Ghz way back in 1998
If you look a little more carefully at those press releases you will discover that chip would never have worked in any real system considering it acccually a implemented a subset of the required PPC instructions. It was a technology demo nothing else. IBM's up and comming POWER4 on the other hand is a real ghz processor but apple probably won't want to ship a processor designed for a server in the near future. If apple wanted 64-bit PPC's with fast memory subsystems they could have had them. Of course apple will have to give up that we don't need a fan attitude when their processors are designed for high power computing tasks.
Having the G5 (which is used in IBM workstations and servers) gives
As far as I know there is no such thing as a 'G5' used in IBM server and workstations. There is the POWER series of processors which are power hungry 64-bit processors and have very little to do with the low power embedded style processors that motorola produces. Look at RS/6000 Model F80 if you don't believe me.
I can't seem to quickly find out how many blank tapes were sold in the 80's or how many blank VHS tapes were sold last year.
I think it might be interesting to compare the average number of songs that fit on a 90 minute tape times the number of tapes sold each year against the total number of napster downloads last month*12.
Does anyone know where I might find this information?
I don't know its not SMT, but I suspect it isn't for three reasons.
1. If their x86-64 was SMT i'm sure they would be yelling it for the world to hear.
2. SMT usually requires some software support (unless AMD has figured out how to make it look like a real SMP) much like SMP does. The system programming sections don't describe how to turn it on.
3. AMD doesn't have a SMP chipset for the K7 on the market yet. The only companies talking about SMT are companies which have been making SMP systems for years.
I got a good chuckle out of the fact that AMD is calling the 64-bit IP RIP. Every time RIP gets touched it signals the end of non x86 processors. 'RISC' processors will be pushed into even narrower markets than they already are. The extra R&D money AMD has because of the volumes of x86 processors will allow them to continue to gain ground on existing RISC processors until companies simply cannot afford to make a general purpose non x86 processor for desktop/workstation/server use that competes with x86. The only place you will find non x86 processors is in embedded systems where the extra decode logic for x86 costs to much power.
BTW: The next step for AMD after this is to build a SMT x86-64.
Seems to me that improving the performance of an existing language (albeit at the cost of platform independence, obviously) would be much simpler than developing a whole new language to include the piece that Java is missing - a native compiler.
Actually, the problem is the JVM which makes to many assumptions about the fact that its running in an interpreted state. This doesn't mean that you can't JIT java its just means that its inefficient. This is sort of evidenced by the fact that the java JIT setups don't get as massive performance improvements as you would expect.
Apparently according to Hejlsberg the C# and the associated.net platform is designed with JIT compilation in mind so it makes me think that the result should be a lot closer to native code execution speed than java can hope to get. Although M$ doesn't want people to think that C# is a java extension it makes sense that M$ saw the opportunity to improve on javas many flaws and the marketing / Business people saw the chance to solve there problems with Sun/Java, VB's bad image, etc in one big package.
BTW: I suspect that if Sun hadn't gotten in the way with VJ++ then M$ probably would have eventually added an 'Ultra Fast native' mode which completely bypassed the JVM and locked the user into the M$ JVM (more than they already did) or a.net type layer. The end result being java loosing its attempt at cross platform in exchange for a order of magnitude speed improvement on M$ platforms.
Wow, it constantly amazes me that people still don't get templates. Duh, you can create containers without them. Duh, the Java or C++ (ever looked at MFC? ick...) non template containers only need a single code instance independent of the data type being manipulated. The point of templates is FAST containers. The compiler can make all kinds of cool optimizations if it knows that in the line if (T1>T2) dosomethingwith(T); T1 and T2 are a particular type at compile time and it can optimize the code for that particular type rather than calling some virtual method to do a simple comparison.
The point of templates is two fold, to provide a type independent method for coding algorithms, and to allow the compiler to generate OPTIMUM code from that generic algorithms for a particular data type.
This is sort of like the point of C++ wasn't to create the perfect OO language. It was to provide a natural evolution for C with all the advantages of an OO language without compromising any runtime speed.
Wow, I rember people asking the same thing about 200mhz processors. It takes all types, after a few years in the industry some poeple go through this stage where they wish the pace would just slow down. Asking "do we need this much speed" is a sure sign your in that stage. Acceptance is the next step. Of course you need that 1.1ghz processor!! Duh!!! In two years when they are releasing the 2ghz processor and you have a nice 1.8ghz processor you will wonder how you ever got along with a lowly 800mhz one. Anyone who runs on a 500mhz machine and thinks its fast enough hasn't tasted the joys of running on a 850+ machine.
I was sort of wondering this myself. It probably is possible to disable the on-die cache if it isn't yielding as well as expected (or at all for that matter @1.13) and go with a PII solution of a larger slower external cache.
Personally I find this a more valid reason for that slot than cooling issues. Apparently no one here has seen some of the high end server heat sinks designed to work without fans. In fact since the die size should be the same (unless there is an external cache) It would seem to me that it is possible to get more surface area on a FCPGA heat sink since you can grow vertically quite a bit and still expand out to maybe 2 or 3 times chip size horizontally on the board. Of course for that matter I have seen some pretty big slot heatsinks that rise 2x-3x higher than than the processor.
The problem isn't Intels fault because the arch has an execute bit in the segments. The original idea was you put your code in a separate code segment from your stack and data segments. The real problem is OS designers who for various reasons decide that the x86 arch's segmentation should be ignored and set the code segments equal in size to the data segments and stack segments. It then becomes a simple matter to just jump into the data or stack segment and begin executing code.
Of course since most of the OS's don't properly use the protection mechanisms Intel has provided, I guess it becomes Intels fault if they don't extend the arch to support a feature and potentially break downward compatibility with other OS's using the current paging system.
You do have another choice, the RS6000's which use the POWER/PPC arch use a couple diffrent 64-bit (could this be why IBM doesn't use the G4 in their box's? maybe? ) implementations of the arch. I understand there is some work to get linux running on them too..
Actually, I asked this question a year or so ago when I worked at IBM. The answer? The G4 is basically a 604e core (much the the PIII is just a PPro) which is 32-bit (all of the new rs6k's are 64-bit), doesn't scale in MP systems very well, and IBM didn't think the SIMD instructions Motorola was adding were very useful for general purpose computing. So basically it was like asking why Intel doesn't make a 500mhz version of the MMX Pentium for low end workstations.
If apple is smart they would be all over IBM to make POWER4's for them. That way they could announce that they have the first 64-bit 'PC' and actually be able to complete in marketecture (that's Market - Architecture Ie clock speed).
Personally, I suspect that the G' series of processors has bottomed out architecturally. Any future speed improvements are going to come from process shrinks and additional specific purpose instructions. Hmm sounds familiar doesn't it? It actually seems the design bottomed out somewhere around 400mhz. The pipeline is just to short for very high clock rates.
Ah.. Have you installed mandrake 7 on anything less than a PII 300? It sort of sucks. In fact it is damn slow. I would go so far as to say it is a sh*t load slower than 95 on the same hardware.
Oh, don't even think about it with 16 megs of ram on a DX33...
I don't know about you but my codes compile times scale very nicely with CPU speed. Feed it enough RAM to keep it from paging the compile process and fire of a parallel build. Damn, I will chew up every ounce of CPU you can throw my way.
First get out your computer arch textbook and read about how to calculate effective CPU fetch latency given memory latency, cache latency and average hit ratios. Plug in the values Intel lists, and you will discover that Intel with PC133 has gotten itself a little headroom and the processor shouldn't be loosing much performance due to memory constraints compared to a 933. After all, its only an 8.5x multiplier.
Second with the x86's abysmal FPU arch the floating point speed usually gets a nice increase. With that nice increase in floating point speed you get a nice increase in anything that is heavily FP intensive.
Massively parallel.... There is a reason why everyone doesn't have a 32 or 64 way system. Its because the more processors you add the better your memory system needs to be to keep up (and therefore the more expensive). What you have effectively done is trade a fast CPU for a fast memory system. There is this cute little multiplier effect (which NUMA tries to alleviate a little of) for every processor you add you must add enough bandwidth to your memory to support it until you end up making massively expensive memory subsystems.
SMP just doesn't make sense for the desktop. It really doesn't make much sense for server either. SMP is a solution for lack of CPU performance. Most users don't really have tasks that would benefit from dual CPU's. Quake III is a wonderful example. Tasks that are latency sensitive work much better with faster CPU's than massively parallel ones. By definition most desktop tasks are single user, latency sensitive. The question is this... If you have two machines that cost the same amount of money and have the same parallel throughput but one has two processors the other has one. Which one are you going to choose? Personally I want the single processor machine because it will keep up with the dual processor machine when it is running a throughput sensitive task and it will be twice as fast when it is running a latency sensitive task.
Dual processors is easy since the differences are easy to quantify. In truth dual PIII systems aren't that much more expensive than single processor systems. You can add a second processor to a machine for pretty much the cost of the second processor which can be as low as 5% of the system cost. It just doesn't buy you that much for everyday desktop use. Sure there are some things that run faster but with processor speeds the way they are most of the applications that can be run in parallel are bottlenecked by disk, memory, video etc..
Its one of those riddles that can be easily solved with linear equations. I of course had to see if I could solve it the traditional way which is more fun, and took me about 30 minutes longer than just doing the math would have.
Actually, what I have found is that shadow mask monitors tend to converge better over the long run than the aperture grille ones. The third party Sony FD based monitors tend to be the worst in my experience. There is something about that flat screen technology that the OEM's can't seem to get right because the convergence seems to drift over very short time periods (a few hours).
In the near future, even devices that are very simple today, will have added functionality. They will get a (wireless) internet access, and functionality will be added. Microwaves come with access to cookbooks, and will be monitored for defects.
What you describe can be done far more efficiently with current 8-bit microcontroller technology than with bloated internet appliances...
Imagine instead of a microwave that has wireless internet access a microwave with a small 8 bit controller that communicates using a short-range lightweight wireless protocol with the rest of the house. Now somewhere in the house you have a music/movie/recipe/etc storage 'computer' that has broadband internet connectivity. You can still have the microwave monitor itself, display recipes, query the fridge for the correct ingredients, etc but the storage and external access occurs through the home Linux box/firewall.
This alternate model saves massive quantities of power because you don't need a 100 'high power' transmitters to connect to CDPD (or your favorite wireless IP of the future) you don't need 100 CPUs sitting in idle loops, or 16 megs*100 worth of RAM dynamically refreshing itself for every house on your block. You have just saved yourself a couple of kWh's a day in power bill. Not only that but your microwave costs $105 instead of $150.
BTW: Do you really want people to be 'hacking' your microwave?
Slashdot Mirror
Like for instance Communications test sets, Oscilloscopes , Debuggers, Protocol analysers, Logic Analyzers, and Engineering Books
Repeat after me, "seti@home is a signal processing application" not a scientific one! It seems to be the general consensus of a lot of people in the know (read comp.arch if you don't believe me) that altivec is a waste for general purpose scientific computing. That is why IBM isn't interested in it for their 'supercomputers'. Lack of precision and all that nonsense :> Motorola put altivec on those cpu's so their embedded customers could have a high end DSP solution not a math cruncher. The G4 makes a great high end DSP! Exactly what motorola wanted.
Well, dictionary.com says...
Thief- One who steals, especially one who steals movable property by stealth rather than force.
Steal- to take (the property of another) without right or permission
Since it can be argued that nothing has been "taken" from the owner an in some cases it can be shown that the MPAA gains additional sales though the extra distribution napster affords (similar to radio) I would hesitate to call all napster users thieves. The only ones who are thieves are the ones who listen to music they haven't bought but would have purchased if they didn't have napster.
He he he... Title says it all... Its pretty funny I can make slashdot my wallpaper and a little script gets it to resync every couple of minutes.
When I was looking into it the authors weren't getting a significantly larger royalty on those obscure textbooks. I assume there is a $50 difference between the 'dumb' books and the ones requiring 'more time and sheer brain power' so I would expect that $50 to go to the author. Except it doesn't, that extra money appears to go into the publishers black hole.
I've always been annoyed by the $100+ textbooks. The usual excuse for charging $115 for a textbook has been the cost of "paper, printing, binding, stocking..." Now with these people charging $600 for a DVD it sort of proves that the college textbook industry is just greedy and can get away with outrageous textbook prices because they have a captive audience.
IBM demonstrated a PowerPC chip running at 1 Ghz way back in 1998
If you look a little more carefully at those press releases you will discover that chip would never have worked in any real system considering it acccually a implemented a subset of the required PPC instructions. It was a technology demo nothing else. IBM's up and comming POWER4 on the other hand is a real ghz processor but apple probably won't want to ship a processor designed for a server in the near future. If apple wanted 64-bit PPC's with fast memory subsystems they could have had them. Of course apple will have to give up that we don't need a fan attitude when their processors are designed for high power computing tasks.
Having the G5 (which is used in IBM workstations and servers) gives
As far as I know there is no such thing as a 'G5' used in IBM server and workstations. There is the POWER series of processors which are power hungry 64-bit processors and have very little to do with the low power embedded style processors that motorola produces. Look at RS/6000 Model F80 if you don't believe me.
I can't seem to quickly find out how many blank tapes were sold in the 80's or how many blank VHS tapes were sold last year.
I think it might be interesting to compare the average number of songs that fit on a 90 minute tape times the number of tapes sold each year against the total number of napster downloads last month*12.
Does anyone know where I might find this information?
I don't know its not SMT, but I suspect it isn't for three reasons.
1. If their x86-64 was SMT i'm sure they would be yelling it for the world to hear.
2. SMT usually requires some software support (unless AMD has figured out how to make it look like a real SMP) much like SMP does. The system programming sections don't describe how to turn it on.
3. AMD doesn't have a SMP chipset for the K7 on the market yet. The only companies talking about SMT are companies which have been making SMP systems for years.
I got a good chuckle out of the fact that AMD is calling the 64-bit IP RIP. Every time RIP gets touched it signals the end of non x86 processors. 'RISC' processors will be pushed into even narrower markets than they already are. The extra R&D money AMD has because of the volumes of x86 processors will allow them to continue to gain ground on existing RISC processors until companies simply cannot afford to make a general purpose non x86 processor for desktop/workstation/server use that competes with x86. The only place you will find non x86 processors is in embedded systems where the extra decode logic for x86 costs to much power.
BTW: The next step for AMD after this is to build a SMT x86-64.
Seems to me that improving the performance of an existing language (albeit at the cost of platform independence, obviously) would be much simpler than developing a whole new language to include the piece that Java is missing - a native compiler.
.net platform is designed with JIT compilation in mind so it makes me think that the result should be a lot closer to native code execution speed than java can hope to get. Although M$ doesn't want people to think that C# is a java extension it makes sense that M$ saw the opportunity to improve on javas many flaws and the marketing / Business people saw the chance to solve there problems with Sun/Java, VB's bad image, etc in one big package.
.net type layer. The end result being java loosing its attempt at cross platform in exchange for a order of magnitude speed improvement on M$ platforms.
Actually, the problem is the JVM which makes to many assumptions about the fact that its running in an interpreted state. This doesn't mean that you can't JIT java its just means that its inefficient. This is sort of evidenced by the fact that the java JIT setups don't get as massive performance improvements as you would expect.
Apparently according to Hejlsberg the C# and the associated
BTW: I suspect that if Sun hadn't gotten in the way with VJ++ then M$ probably would have eventually added an 'Ultra Fast native' mode which completely bypassed the JVM and locked the user into the M$ JVM (more than they already did) or a
Wow, it constantly amazes me that people still don't get templates. Duh, you can create containers without them. Duh, the Java or C++ (ever looked at MFC? ick...) non template containers only need a single code instance independent of the data type being manipulated. The point of templates is FAST containers. The compiler can make all kinds of cool optimizations if it knows that in the line if (T1>T2) dosomethingwith(T); T1 and T2 are a particular type at compile time and it can optimize the code for that particular type rather than calling some virtual method to do a simple comparison.
The point of templates is two fold, to provide a type independent method for coding algorithms, and to allow the compiler to generate OPTIMUM code from that generic algorithms for a particular data type.
This is sort of like the point of C++ wasn't to create the perfect OO language. It was to provide a natural evolution for C with all the advantages of an OO language without compromising any runtime speed.
Wow, I rember people asking the same thing about 200mhz processors.
It takes all types, after a few years in the industry some poeple go through this stage where they wish the pace would just slow down. Asking "do we need this much speed" is a sure sign your in that stage. Acceptance is the next step.
Of course you need that 1.1ghz processor!! Duh!!! In two years when they are releasing the 2ghz processor and you have a nice 1.8ghz processor you will wonder how you ever got along with a lowly 800mhz one. Anyone who runs on a 500mhz machine and thinks its fast enough hasn't tasted the joys of running on a 850+ machine.
I was sort of wondering this myself. It probably is possible to disable the on-die cache if it isn't yielding as well as expected (or at all for that matter @1.13) and go with a PII solution of a larger slower external cache.
Personally I find this a more valid reason for that slot than cooling issues. Apparently no one here has seen some of the high end server heat sinks designed to work without fans. In fact since the die size should be the same (unless there is an external cache) It would seem
to me that it is possible to get more surface area on a FCPGA heat sink since you can grow vertically quite a bit and still expand out to maybe 2 or 3 times chip size horizontally on the board. Of course for that matter I have seen some pretty big slot heatsinks that rise 2x-3x higher than than the processor.
The problem isn't Intels fault because the arch has an execute bit in the segments. The original idea was you put your code in a separate code segment from your stack and data segments. The real problem is OS designers who for various reasons decide that the x86 arch's segmentation should be ignored and set the code segments equal in size to the data segments and stack segments. It then becomes a simple matter to just jump into the data or stack segment and begin executing code.
Of course since most of the OS's don't properly use the protection mechanisms Intel has provided, I guess it becomes Intels fault if they don't extend the arch to support a feature and potentially break downward compatibility with other OS's using the current paging system.
You do have another choice, the RS6000's which use the POWER/PPC arch use a couple diffrent 64-bit (could this be why IBM doesn't use the G4 in their box's? maybe? ) implementations of the arch. I understand there is some work to get linux running on them too..
Actually, I asked this question a year or so ago when I worked at IBM. The answer? The G4 is basically a 604e core (much the the PIII is just a PPro) which is
32-bit (all of the new rs6k's are 64-bit), doesn't scale in MP systems very well, and IBM didn't think the SIMD instructions Motorola was adding were very useful
for general purpose computing. So basically it was like asking why Intel doesn't make a 500mhz version of the MMX Pentium for low end workstations.
If apple is smart they would be all over IBM to make POWER4's for them. That way they could announce that they have the first 64-bit 'PC' and actually be able
to complete in marketecture (that's Market - Architecture Ie clock speed).
Personally, I suspect that the G' series of processors has bottomed out architecturally. Any future speed improvements are going to come from process shrinks and
additional specific purpose instructions. Hmm sounds familiar doesn't it? It actually seems the design bottomed out somewhere around 400mhz. The pipeline is just
to short for very high clock rates.
Ah.. Have you installed mandrake 7 on anything less than a PII 300? It sort of sucks. In fact it is damn slow. I would go so far as to say it is a sh*t load slower than 95 on the same hardware.
Oh, don't even think about it with 16 megs of ram on a DX33...
I don't know about you but my codes compile times scale very nicely with CPU speed. Feed it enough RAM to keep it from paging the compile process and fire of a parallel build. Damn, I will chew up every ounce of CPU you can throw my way.
Two points.
First get out your computer arch textbook and read about how to calculate effective CPU fetch latency given memory latency, cache latency and average hit ratios. Plug in the values Intel lists, and you will discover that Intel with PC133 has gotten itself a little headroom and the processor shouldn't be loosing much performance due to memory constraints compared to a 933. After all, its only an 8.5x multiplier.
Second with the x86's abysmal FPU arch the floating point speed usually gets a nice increase. With that nice increase in floating point speed you get a nice increase in anything that is heavily FP intensive.
Massively parallel.... There is a reason why everyone doesn't have a 32 or 64 way system. Its because the more processors you add the better your memory system needs to be to keep up (and therefore the more expensive). What you have effectively done is trade a fast CPU for a fast memory system. There is this cute little multiplier effect (which NUMA tries to alleviate a little of) for every processor you add you must add enough bandwidth to your memory to support it until you end up making massively expensive memory subsystems.
SMP just doesn't make sense for the desktop. It really doesn't make much sense for server either. SMP is a solution for lack of CPU performance. Most users don't really have tasks that would benefit from dual CPU's. Quake III is a wonderful example. Tasks that are latency sensitive work much better with faster CPU's than massively parallel ones. By definition most desktop tasks are single user, latency sensitive. The question is this... If you have two machines that cost the same amount of money and have the same parallel throughput but one has two processors the other has one. Which one are you going to choose? Personally I want the single processor machine because it will keep up with the dual processor machine when it is running a throughput sensitive task and it will be twice as fast when it is running a latency sensitive task.
Dual processors is easy since the differences are easy to quantify. In truth dual PIII systems aren't that much more expensive than single processor systems. You can add a second processor to a machine for pretty much the cost of the second processor which can be as low as 5% of the system cost. It just doesn't buy you that much for everyday desktop use. Sure there are some things that run faster but with processor speeds the way they are most of the applications that can be run in parallel are bottlenecked by disk, memory, video etc..
Its one of those riddles that can be easily solved with linear equations. I of course had to see if I could solve it the traditional way which is more fun, and took me about 30 minutes longer than just doing the math would have.
Actually, what I have found is that shadow mask monitors tend to converge better over the long run than the aperture grille ones. The third party Sony FD based monitors tend to be the worst in my experience. There is something about that flat screen technology that the OEM's can't seem to get right because the convergence seems to drift over very short time periods (a few hours).
In the near future, even devices that are very simple today, will have added functionality. They will get a (wireless) internet access, and functionality will be added. Microwaves come with access to cookbooks, and will be monitored for defects.
What you describe can be done far more efficiently with current 8-bit microcontroller technology than with bloated internet appliances...
Imagine instead of a microwave that has wireless internet access a microwave with a small 8 bit controller that communicates using a short-range lightweight wireless protocol with the rest of the house. Now somewhere in the house you have a music/movie/recipe/etc storage 'computer' that has broadband internet connectivity. You can still have the microwave monitor itself, display recipes, query the fridge for the correct ingredients, etc but the storage and external access occurs through the home Linux box/firewall.
This alternate model saves massive quantities of power because you don't need a 100 'high power' transmitters to connect to CDPD (or your favorite wireless IP of the future) you don't need 100 CPUs sitting in idle loops, or 16 megs*100 worth of RAM dynamically refreshing itself for every house on your block. You have just saved yourself a couple of kWh's a day in power bill. Not only that but your microwave costs $105 instead of $150.
BTW: Do you really want people to be 'hacking' your microwave?