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AMD Releases X86-64 Architecture Programmers Overview

AMD has released a manual in PDF format to allow software developers to migrate their code to its 64-bit Hammer microprocessor platform. The PDF document is here and Sandpile Web site gives excellent explanatory material of the content of the PDF file. Surprisingly, Sun supports the Sledge Hammer. Article can be found here

199 comments

  1. Sun supports it because by Anonymous Coward · · Score: 1

    It's inferior to Intels VLIW approach.

    We don't new another patch on x86, we need a new arch. Intel's approach is superior, but it will take longer to perfect. AMD is counting on that delay to gain support for their inferior product.

    My.. How the tables have turned.

    1. Re:Sun supports it because by dpilot · · Score: 3

      They see a steamroller called Itanium on the horizon. Sure, they have an X86 port. But that's more of an entry tool to make sure that customers grow up into their bread and butter, the Sparcs and the rest of the higher end.

      By endorsing Sledgehammer, AMD hopes (IMHO) to take some of the wind out of Itanium's sails, and make it less of an 'obvious' choice. Intel is becoming formidable as a systems house, and can challenge Sun in that role. AMD at the moment is merely a chip (including CPUs) vendor.

      On the side, I guess it's not so amazing that when Intel announces an upcoming 64-bit CPU, everyone starts planning on it being a success, even before details were known. Where it gets just slightly amazing is when bad news starts to leak out about Merced, how it's a dog, and "Just wait for McKinley!" Yep, we messed up this time, but just wait until next time.

      In spite of the flop of Merced a year before its introduction, and the uncertainty of developing decent compilers for VLIW, and the general dislike of Intel's quirky architectures, like X86...

      IA-64 is still branded one of the Winners in the 64 bit sweepstakes, and there's STILL no generally available hardware.

      --
      The living have better things to do than to continue hating the dead.
    2. Re:Sun supports it because by Black+Parrot · · Score: 1

      > Where it gets just slightly amazing is when bad news starts to leak out about Merced, how it's a dog, and "Just wait for McKinley!" Yep, we messed up this time, but just wait until next time.

      Yeah, that's a novel line to take in the mass market.

      Whoever (ahem!) innovated it first should have patented it as a business method.

      --

      --
      Sheesh, evil *and* a jerk. -- Jade
    3. Re:Sun supports it because by ExoDemon · · Score: 1

      My guess would be that Sun supports it because it differentiates them from HP. Remember, the IA-64 architecture was jointly developed by HP and Intel. When 64 bit processors first come out, only the big boys (read high end server vendors) are going to care right away. Sun and HP are directly competing in that space, so I bet Sun is hoping to gain an advantage over HP.

    4. Re:Sun supports it because by Zurk · · Score: 1

      sun already has an advantage over HP - PARISC is dying and everyone knows it. IA-64 is an annoying ISA - its HUGE. the result is the chips run *really* hot and slow. if AMD can come out with SMP systems using AMDs version of the much faster and simpler instruction set, then AMD will beat intel for the first time. and thats gotta hurt intels bottom line - finally.

    5. Re:Sun supports it because by styopa · · Score: 3

      Sun is tired of all of Intels whining and wants to stabe a sharp stick in their eye. For the past year Intel has been whining to the press that Sun isn't backing the IA-64 processor as their primary processor, and that because of that they aren't living up to their agreements. Sun had one of the first working ports on the IA-64, and sees IA-64 as secondary to their UltraSPARC line for Solaris.

      Some of the high ranking people in Sun have gotten so fed up with Intels whining that they have gone so far as to say that they may not even release Solaris for IA-64. They are supporting AMD just to piss off Intel.

      --
      Disclamer - Opinion of Person
    6. Re:Sun supports it because by / · · Score: 3

      "Just wait for McKinley!"

      Right. The last time there was a McKinley in the public spotlight, he got assasinated. By an Anarchist. Parallels, anyone?

      --
      "If one is really a superior person, the fact is likely to leak out without too much assistance" -- John Andrew Holmes
    7. Re:Sun supports it because by ackthpt · · Score: 1

      They see a steamroller called Itanium on the horizon

      Where do you get this? The Itanium is such a frankenstein it'll be a footnote 2 years from now.

      By endorsing Sledgehammer, AMD hopes (IMHO) to take some of the wind out of Itanium's sails, and make it less of an 'obvious' choice. Intel is becoming formidable as a systems house, and can challenge Sun in that role. AMD at the moment is merely a chip (including CPUs) vendor.

      You probably mean SUN endorsing, not AMD, since it's AMD's baby. Intel is floundering around with PIII deliverieries, stupid exec. decisions and fudging their earnings to keep their stock from reflecting reality. AMD, starting from such a minority position, has demonstrated they can promise and deliver. IMHO Intel has slid to the ignominious position of having to Show Me, their announcements fall on deaf ears.

      IA-64 is still branded one of the Winners in the 64 bit sweepstakes, and there's STILL no generally available hardware.

      Cough cough. Go look at an alpha some time. Gimme a break.

      Vote Naked 2000

      --

      A feeling of having made the same mistake before: Deja Foobar
    8. Re:Sun supports it because by ackthpt · · Score: 1

      When 64 bit processors first come out, only the big boys (read high end server vendors) are going to care right away. Sun and HP are directly competing in that space, so I bet Sun is hoping to gain an advantage over HP.

      The IA64 is targeted directly at the business and personal user, don't even imagine it isn't. There is already a considerable number of 64 bit commercial systems available.

      It's a bit like Al Gore claiming to practically invent the internet, to claim Intel will revolutionize something with a long overdue 64 bit processor. But, hey, maybe they can sucker people with more dancers in bunny suits, who knows...

      Vote Naked 2000

      --

      A feeling of having made the same mistake before: Deja Foobar
    9. Re:Sun supports it because by ackthpt · · Score: 1

      Hey, that's insulting to a Z80!

      Maybe a 4004...

      Vote Naked 2000

      --

      A feeling of having made the same mistake before: Deja Foobar
    10. Re:Sun supports it because by dpilot · · Score: 1

      Just because Itanium is a Frankenstein doesn't mean it isn't a steamroller. Consider Windows.

      Caught me, I meant to say "Sun" there, not "AMD".

      When I said "STILL no generally available hardware," I meant no IA64. Alpha's existence is obvious. So is PowerPC, but in spite of the fact that PowerPC-64 has been sold and IA64 hasn't, some have the former taking a dive before the marketed might of the latter.

      --
      The living have better things to do than to continue hating the dead.
    11. Re:Sun supports it because by jovlinger · · Score: 1

      Inscription found at Pompeii: Nero MCCCXXXVII VkrIpVII kIddXIII est.

      now that is genius.

    12. Re:Sun supports it because by MO! · · Score: 1
      Although in terms of media hype, I may agree to some extent to the "Intel's a threat to Sun" idea, in the datacenter (where it matters) Intel can't get even close to what Sun can do.

      I just upgraded a Sun E6500 box last weekend to 24 UltraSparc processors and 17GB of RAM. Name a single intel-based system that can get even close to that. Perhaps in a few years there'll be something, but it will be brand new and unproven in the real world. Meanwhile, Sun will have advanced even further.

      --
      I AM, therefore I THINK!
    13. Re:Sun supports it because by jovlinger · · Score: 1

      Expand the roman numerals to get

      1337 5kr1p7 k1dd13 est

    14. Re:Sun supports it because by ackthpt · · Score: 1

      When I said "STILL no generally available hardware," I meant no IA64. Alpha's existence is obvious. So is PowerPC, but in spite of the fact that PowerPC-64 has been sold and IA64 hasn't, some have the former taking a dive before the marketed might of the latter.

      The greatest likelihood of success for the IA64 is in Intel boxes, which 99% of the public are unaware of. Bang for the buck, these machines will see limited service. When Intel & other vendors ever get around to trying to sell VLIW to the public and business they'll find it's like being the last girl scout out to sell cookies, "Sorry, we've already bought some."

      The lightweight market will be taken by Crusoe, which is expected to be the market for VLIW for the next year, at least.

      Vote Naked 2000

      --

      A feeling of having made the same mistake before: Deja Foobar
    15. Re:Sun supports it because by spondylus · · Score: 1
      Intel's (HP's, really) VLIW will only be superior when it proves itself to be superior. ISTR back in 1994 or so when Intel and HP got together to make the next generation chip, with Intel providing money, compatibility, and fab and HP providing technology, particularly VLIW. They were aiming at a 1997 release. Three years on and it has yet to ship, yet the first version is being effectively disavowed by a co-creator and downplayed for the next generation by the other co-creator. These are not good signs.

      Maybe IA64 will come good in time not to get run over by other advances. Maybe it will go down as the Itanic, as the Register calls it. But a superior approach may not result in a superior product--execution is key, as is timing; and to dismiss one in favor of the other before either actually ships is just plain ridiculous.

    16. Re:Sun supports it because by SonofRage · · Score: 1

      The reason AMD has decided to do things this way is so that 32bits can still run at normal speed while with Intel's chip 32bit apps will run like ass (fear my scientific terms).

    17. Re:Sun supports it because by GodSpiral · · Score: 1

      It's less technically innovative, and the theoretical performance is lower than IA-64, but its not inferior.

      Ease of transition is an important aspect. Its what will make it far more likely for any of us to buy x86-64 long before we touch ia-64.

  2. GCC can't do VLIW by Anonymous Coward · · Score: 5
    Face it, with VLIW the onus for performance is on the compiler. And C is not the easiest language for VLIW compilers. VLIW compilers work best when global analysis can be performed. But global ananlysis is very difficult amid the untamed world of C pointers (aliasing problems).

    AMD's 64 bit processor is a better match for the current state of compiler technology, particularly Open Source compiler technology.

    1. Re:GCC can't do VLIW by Idaho · · Score: 3

      According to Tom's Hardware, the problem with using VLIW in complicated microprocessors is writing a fast compiler, which is really hard since instruction have to be executed concurrently (or if this is impossible you'll lose much performance). Read the article for further information.

      This is also why the Crusoe is not as fast as a Pentium III or Athlon (the Crusoe uses VLIW too). However, in the Crusoe case it might not be a problem since Transmeta is targeting another market: PDA's, laptops and such, requiring low power usage and long battery live.

      Obviously, the Itanium (stupid name!) is targeted at the server market, where power consumption does not really matter (except when running into cooling problems ofcourse!), so it had better be fast.

      And until now it looks like it isn't! Little problem for Intel that has yet to be solved!

      --
      Every expression is true, for a given value of 'true'
    2. Re:GCC can't do VLIW by Anonymous Coward · · Score: 1
      This is also why the Crusoe is not as fast as a Pentium III or Athlon (the Crusoe uses VLIW too). However, in the Crusoe case it might not be a problem since Transmeta is targeting another market: PDA's, laptops and such, requiring low power usage and long battery live.

      No, this doesn't apply to the Crusoe at all. Due to 'Code Morphing', the Crusoe is actually designed to be fed x86 instructions (actually, any instruction set, but at the moment the only Code Morphing stuff I know of is x86->P95). These are translated internally to P95 ones - but the code itself is compiled for a regular, x86 CPU. It is definately discouraged to write in native P95.

    3. Re:GCC can't do VLIW by Anonymous Coward · · Score: 2

      What are you smoking?

      gcc Already has some work on it to support predicated execution and a few more things (Have you even checked gcc.gnu.org in the last 3 months?) And there is a port to IA-64 already underway.

      Compilers HAVE TO analyze for independency between intructions, just to reorder them. Once you have that, it is pretty simple to schedule them in parallel.

      And about C pointers, gcc also has a fortran compiler that doesn't have to care about aliasing, and is in the process of implementing C99, with restrict in it. Besides, it already has to deal with aliasing issues, just to do the aforementioned reordering, and to decide whether to use a host of other optimizations.

      Granted, IA-64 is a lot more complicated than usual processors, but GCC has been ported to more processors that you can shake a stick at.

      "Open Source" compiler technology is very damn good. Don't you dare underestimate the GCC group.

    4. Re:GCC can't do VLIW by ackthpt · · Score: 1

      Nous allons d'accord!

      As it has been so demonstrated by 20 years of 8088 and x86 architecture, new hardware is excedingly hard to sell to the masses, considering the entrenchment of current application and tools.

      Price doesn't do it.
      Flashy doesn't do it.
      Hype certainly doesn't do it.
      Secure in the belief I won't have to re-invent many wheels will do it.


      Vote Naked 2000

      --

      A feeling of having made the same mistake before: Deja Foobar
    5. Re:GCC can't do VLIW by jovlinger · · Score: 1

      (also response to #157)

      The thing is that to do VLIW well, you need long snippets of straight line code. You get these either by unrolling loops, inlining/duplicating code, and generally transforming the shit out of your program, or from dynamic execution traces.

      Once you have long unbranching intruction sequences, you can then start reordering and peepholing your mini-instructions into groups that can execute simultaneously. These are the VLIW instructions.

      This is why crusuoe has some level of ILP ('cause it has the runtime information to make long blocks) and why GCC could have a hard time (I don't know that it does, taking your word on that) generating good VLIW code ('cause the language it compiles is generally a bitch to transform safely -- this applies both to C/C++ and the internal representation, I'd think).

      Johan

    6. Re:GCC can't do VLIW by Anonymous Coward · · Score: 1
      Don't let your pro-GNU bigotry blind you to the task at hand. Hell, GCC can't even produce decent code for the Compaq Alpha processor. Compaq's own compilers blow GCC out of the water. Same with their Fortran compiler. How many years has the Alpha been around? GCC is still not up to the task.

      As for the IA-64, currently HP and Intel have the best brains in the compiler industry struggling to produce a decent VLIW compiler for IA-64. They have faced roadblock after roadblock despite essentially unlimited resources. Do you think that the GCC team can do better?

      GCC is mediocre at best on most architectures, including IA-32. Motorola 68K was an exception. And lest we forget, GCC development time is measured in GNU years, not calendar years. When has GCC ever delivered a product in a timely fashion? How many years did it take to fix the "strength reduce" bug in GCC?

      Will GCC eventually be able to generate code that will run on the IA-64? Sure, why not. But like the dog that dances on his hind legs, it is not a question of whether he dances well, but that he can dance at all. A competitive GCC on IA-64 is a pipe dream. You have let your hubris blind you to the monumental difficulties you have yet to overcome.

    7. Re:GCC can't do VLIW by ckaminski · · Score: 1

      Yes, but you are comparing a pretty niche market and the fact that there is practically no vendor support for Linux/GCC on alpha, to the mega-behemoth called Intel who's betting on Linux/GCC to push it's new hardware.

      Apples and oranges.

    8. Re:GCC can't do VLIW by kreyg · · Score: 1

      And C is not the easiest language for VLIW compilers.

      Just to be a bit picky...

      Don't we really need a better ASSEMBLER? I wrote a compiler as a university project for a MIPS processor - it just spewed out the instructions I wanted and let the assembler deal with the instruction pairing. That seems like a much more reasonable place to do it anyway, because it's more language (and processor) independent.

      Of course, that's probably hard to do and make things run fast, but that's the nature of the processor - if you have strong data inter-dependence, then VLIW may be the wrong architecture - it seems to me to be somewhat algorithm and application specific (i.e. if it can't be done in parallel, you're screwed). Do we need to create a new language to help specify this type of data relation, or are we going to discover that VLIW is not general purpose enough, and won't help (or will hinder) general computing needs?

      OK, maybe they're not targeting general computing... but that's a lot of money to throw at a niche market.

      I'm a software guy, so I'm not too well informed about the VLIW debate... there is a debate, right? Intel isn't just running after a catch term without knowing there are significant advantages, right? Right? Anybody?

      --
      sig fault
    9. Re:GCC can't do VLIW by barracg8 · · Score: 1
      [fx: Java programmer preparing facial muscles for smug grin :-)]

      But global ananlysis is very difficult amid the untamed world of C pointers (aliasing problems)

      • What is global ananlysis?
      • What are aliasing problems?
      • What are C pointers? (no, kidding.)
      Seriously, you lost me by the word 'analysis', but I am interested - do you have any links you can suggest / a brief explaination?

      cheers,
      G

  3. Moving forward, a little at a time by Killer+Napkin · · Score: 2

    This is obviously a power move on the side of AMD. However, people that know about Sledgehammer also know about Intel's new 64-bit architecture. Though this might be of interest to some, the only people who really care are developers, and I'm sure they're going to wait for Intel's superior offering. Now that AMD's made the first move, it puts pressure on Intel to quicken the pace a bit. I think this is the first step to putting more powerful computers out onto the market. The next six months or so are going to see computing have a brand new facelift, what with the court cases with the RIAA, MPAA, this race for the 64-bit chip, and the massive popularity that Linux is gaining. These are exciting times, indeed.

    1. Re:Moving forward, a little at a time by lpontiac · · Score: 1

      Why, oh why, keep on with the assumption that the Intel product will be 'superior' when the companies are pretty much neck-and-neck these days?

    2. Re:Moving forward, a little at a time by Killer+Napkin · · Score: 1

      I don't mean to start a war over people's favorite processors, but Intel chips have conistantly shown themselves to be faster than both PPC chips (Yes, I've run Photoshop. Altivec only works for some fo those filters. Blatantly false advertising, in my opinion.) and AMD chips. I've run the benchmarks myself. And if you throw into the equation that Intel chips don't nearly have as many bugs with them (Pentium 60 chips, aside) as AMD chips, you can understand why I expect a whole lot from the upcoming 64-bit architecture (as opposed to a revamped Athlon chip.) It may be a longer wait, but I'm sure it'll be worth it.

    3. Re:Moving forward, a little at a time by Tough+Love · · Score: 3

      Though this might be of interest to some, the only people who really care are developers, and I'm sure they're going to wait for Intel's superior offering.

      I'm not sure you're really in touch with what developers think. I'm a developer, and I'm intensely interested. AMD's K7 was a killer punch, 3D Now is pretty successful in spite of the odds, and now I'm in the mood to take a close look at *anything* AMD puts forward.
      --

      --
      When all you have is a hammer, every problem starts to look like a thumb.
    4. Re:Moving forward, a little at a time by SQL+Error · · Score: 4

      Agreed 100%. IA-64 is a very interesting architecture (all those little crinkly bits - lovely baroque feel) but the first chips (i.e. Merced) look like they'll be hot (150W), slow, and expensive. Intel are already spinning Merced as a development platform only. McKinley (chiefly designed by HP, who tend to know what they're doing) looks like the first "real" IA-64 chip, but it's still some distance away.

      Meanwhile, AMD has designed the SledgeHammer as a minimal 64-bit extension to the Athlon, so it's not much bigger than existing chips (on the order of 10%), and so hopefully won't be too expensive. Though if it comes with dual cores and a large L2 cache, you can expect to pay rather more than for a Duron.

      Assuming that it does come with dual cores and a healthy L2 cache (and no critical bugs), SledgeHammer will make a good choice for small servers and high-end desktops even without true 64-bit OS support. And Intel's troubles with Merced effectively hand AMD a 12-to-18-month window of opportunity in the low-end 64-bit market. Which may be all they need.

      The other issue is that Merced is likely to be relatively slow on IA-32 apps, while SledgeHammer could well be the performance leader. If you don't expect all your code to go 64-bit overnight, it's another plus for the AMD solution.

    5. Re:Moving forward, a little at a time by Deflatamouse! · · Score: 1

      the only people who really care are developers

      Not necessarily. End users would care as well. The IA-64 architecture is not compatible with x86 while the x86-64 offers full support of x86 legacy software. You must admit that Intel's success is largely based on their support of legacy code. It could very well be a different ball game had Intel decided to totally abandon x86 when they were developing the Pentium chip. The install base of x86 systems in '94 is not nearly as large as the install base today but it still made Intel successful. Given today's x86 install base, it would be extremely foolish for Intel to totally abandon x86. For this reason, Intel has decided to offer some "emulation" of x86 on their Itanium chip, aka Merced. And I assume their McKinley (Itanium II?) chip would as well. There are already enough players in the server/high end market, i.e. IBM, HP, Sun, Compaq/DEC, etc. Why should anyone choose a completely new platform over the established platforms of the above mentioned companies? Obviously, offering x86 compatibility would be a plus.

      The IA-64's VLSI architecture does not natively support x86. It is true that Intel will most likely add more hardware just to support x86, but I just don't think it is as efficient as x86-64 (in running x86). Performance is obviously important. I really question Itanium's performance running x86. Given that IA-64 and x86-64 are both a new architecture, it would not really matter which one I chose for my 64-bit applications. But if I also need to run legacy x86 software, since the majority of the software out there is in this ISA, I would choose x86-64. Porting and recompiling is very expensive, therefore x86-64 would be a much cheaper solution.

      Intel's superior offering

      Intel's IA-64 may very well be a superior product since it is a clean design, and was designed from scratch compared to Sledge Hammer's "64-bit hack". But as unfortunate as it maybe, for the reason stated above and in this post, superiority has nothing to do with it.

    6. Re:Moving forward, a little at a time by Keeper · · Score: 1

      I guess that's why the buggy athlon has about 4 pages of errata compared to the BOOK of errate intel publishes....

      Buggy Athlons? FUD all the way ..

    7. Re:Moving forward, a little at a time by Master+Bait · · Score: 1
      ... the only people who really care are developers, and I'm sure they're going to wait for Intel's superior offering.

      They'll be waiting a long, long time for Intel's 'superior' offering. The Itanium is so late, and so slow, that word is they're abandoning it entirely and moving their development efforts toward McKinley (the CPU that isn't constrained by the idiot grafted on i386 execution unit).

      Intel is positioning their 64-bit CPU for the high-end market, negating the original plan for a low-cost unit to migrate the computer world to a general purpose 64-bit environment.

      AMD is going to french Intel's fry.


      blessings,

      --
      "Only in their dreams can men truly be free 'twas always thus, and always thus will be."
      --Tom Schulman
    8. Re:Moving forward, a little at a time by HiredMan · · Score: 1

      Even HP has said that they don't expect IA-64 performance to overtake the progress of HP PA-RISC until at least 2005 and they expect a slow migration process starting around that time.


      VLIW seems simple in concept but has a whole bunch of bitchy implementation details (including a need for a HUGE number of registers) and the very concept of the process insures that you're wasting a bunch of cycles so that you need to throw more power at a process.

      Also because the compiler is such an important part of the whole code/chip concept it also seems that you're insuring MORE time between chip generations at a time in which the coming of generations get faster and faster.


      Anyway these concerns are well known - until Intel actually ships something (hey it's only 4 + years late) we won't know what happens when the proverbial rubber meets the road.


      tkk

    9. Re:Moving forward, a little at a time by ckaminski · · Score: 1

      I don't see how you can call a revolutionary new product that isn't yet available, and from many quarters is seen as being much less than promised is the superior offering?!

      While I'm not judging merced,mckinley until I get real silicon to fold,crumple,spindle and mutilate, I'm not counting out AMD from the battle. Intel is trying something VERY new that they've never done before, and hence, can slip up fairly easily. Especially if the cost puts it out of reach of the home user, small business.

      Well then, how about the fact that big-business will drive the successful processor into the home?!

      I don't see that happening anymore. Intel will just end up with the Merced line, and the Pentium V line which will have to play catch-up to Sledgehammer, or roll it's own proprietary x86-64 extensions. Or copy AMD's into the merced line.

      Don't count out the underdog before the race get's underway...

    10. Re:Moving forward, a little at a time by Sebastopol · · Score: 1

      Intel posts all of their errata, unlike AMD. If AMD was as big and successful as Intel, it would have just as many enemies uncovering every tiny shred of non-documented operations, which become useless errata.

      ---

      --
      https://www.accountkiller.com/removal-requested
    11. Re:Moving forward, a little at a time by Keeper · · Score: 1

      Oh I love this one..........wait ... wait ... wait for it...

      You don't think intel is going through AMD processors trying to find some sort of huge bug right now to use to their advantage? ROFL...they havn't found one yet.

  4. Just what the doctor has ordered by Anonymous Coward · · Score: 1

    AMDs 64 bit chip wasn't really alien to big system integrators (IBM, Compaq), but with Sun's glowing support, it'll have an enourmeous mindshare. Who knows, maybe Sun could be for Hammer what IBM was for Java: The Confirmation.

  5. The inevitable outcome by ameoba · · Score: 4
    Both AMD and Intel have impressive 64bit architectures coming in the near future. I don't really know enough about either to say if one is technically superior to the other, but as we've seen time and time again, that's not going to be the determining factor. Since the two aren't compatable, they'll be forced to compete, and I don't think the market has room for both of these platforms.

    Technical merit won't really make a difference here; both Intel and AMD can make a good chip. It's going to come down to who gets to market first, who can buy the press coverage, and who's going to get the required software support.

    I have some vague memory of an Intel sponsored 64bit Linux port; If AMD expects to succeed, they should be doing the same.

    I can sum the whole post up in two words:

    Betamax
    --
    my sig's at the bottom of the page.
    1. Re:The inevitable outcome by Greyfox · · Score: 3
      I agree. Intel's putting a hell of a lot of effort into making sure that you have a lot of OS choices for the Itanium. They and SGI and IBM are collaborating on a heavily (and I mean HEAVILY) optimizing C compiler. Linux will already boot and run on the Itanium, and I'm sure Tarentella or whatever the commercial UNIX for the processer is at least as advanced. Wouldn't surprise me if even Windows runs on it now.

      AMD's been putting out superior processors for about a year now, but if I can't run my software on them, those processors are going to go the way of all the other superior products that came and went before. If AMD's chips run 20% faster and pgcc makes my programs run 20% faster on Intel's hardware, the superior design of AMD's stuff is pretty much negated (Except that I'm not forced to get RAMBUS RAM with the Athlon.)

      In response to your betamax I have a few words of my own. Words like Amiga, NeXT, and Apple.

      --

      I'm trying to teach myself to set people on fire with my mind... Is it hot in here?

    2. Re:The inevitable outcome by superlame · · Score: 1

      >In response to your betamax I have a few words
      >of my own. Words like Amiga, NeXT, and Apple.

      Ah-ha. So the key to being sucessful in an Intel world is to produce your hot new computer using a Motorola 68k based chip. I new AMD must have been doing something wrong.

      --
      -- Superlame http://catpro.dragonfire.net/joshua/
    3. Re:The inevitable outcome by DrTomorrow · · Score: 1
      I can sum the whole post up in two words:

      Betamax

      By my count, Betamax is one word.

      --

      Everything in this post is false.

    4. Re:The inevitable outcome by linzeal · · Score: 1

      *do not moderate this up*

      Just a link to the IA64 Intel porting page with a list of all the companies/institutions that are helping.

      Linux on IA64

  6. Obviously... by Lion-O · · Score: 3
    Intel then accused Sun of not doing enough work to port Solar to its own 64-bit technology.

    Hmz, I call that very narrow minded, or perhaps 'biased' would be the better phrase. As a matter of fact Microsoft (Windows and other programs) sometimes also don't support the processor as efficiently as they could. The Pentium processor has been around for quite some time now (I'm referring to the plain Pentium (I?) btw) yet it took a lot of developers ages before any decent Pentium based software came out. I've debugged quite some software back then just to see in which way Pentium based software really did differ with the rest and I was quite surprised to make this discovery.

    Offcourse I don't judge all the software outthere, don't get me wrong, but if Windows in those days also didn't use the processor to its full extent then I have a difficult time believing that they are doing so now (speculation, mind you). But why didn't Intel complain about that, and still seem to complain about Sun?

    1. Re:Obviously... by SEE · · Score: 2

      Because Itanium is far more heavily dependent on optimization than x86.

      You know how with tradtional RISC chips you needed to recompile the software when the instruction set's newest-core chip came out, or else you'd experience little to no performance improvement (or maybe even perfomance losses)?

      VLIW/EPIC is even more dependent on the compiler. If the code is difficult to optimize in the first place, EPIC/VLIW will have a severe performance hit.

      Steven E. Ehrbar

  7. We've been stuck long enough. by Anonymous Coward · · Score: 1

    Face it, X86 is dead... Sun had an excuse to add a 64bit extension to their 32bit CPUs... The sparc arch wasn't hopelessly outdated. There is no such excuse for x86.

    AMD's design enhancements are very very very weak. They don't even add a non-stack based FPU (x86's WEAKEST POINT!).

    The only good things that AMD's new arch will do is: Make handling big address spaces less of a kludge (still a kludge), and allow x86es to perform DES cracking as fast as Alpha or Usparc (sideways).

    Other then that there it's mostly marketing fluff. While 64bits might sound faster then 32bits, it really isn't (Cept for a few apps like DES cracking). It's all dependent on the arch and design and AMD is keeping the same crap arch.

    The reason compilers can't handle VLIW very well is because it hasn't been out there enough. The approach is superior, and it will perform like it sooner or later.

    By buying into AMD on this we are selling out our future.

    1. Re:We've been stuck long enough. by SQL+Error · · Score: 1

      Doing pretty well for a dead architecture. No arguing that X86 is goddamn ugly and annoying, but my elderly (I mean, it's 6 months old!) Athlon-700 whomps any chip Sun have in production on both int and floating point. Admittedly, you can't currently get 64 Athlons in an SMP box, or run 64 bit apps on them (at any useful speed), or put 8MB of L2 cache on them... Where was I?

      Anyway, SledgeHammer gives me: 64-bit addressing, 64-bit native integers (don't know about you, but I need them), solid performance and hopefully sane pricing. And AA-64 has cleaned up some of the cruftiest corners of IA-32, with the extra GPRs and the new FP modes (16 128-bit SSE registers).

      On the VLIW side - it's hardly a given that VLIW will beat OOO (Out-of-Order) RISC architecture even when VLIW compiler technology matures. Particularly for C/C++ code, which can't use a lot of optimisation techniques (due mostly to pointer issues). It's a wait-and-see there, I think. If you want to program in ASM and produce 100 bytes of code a day, then a w-i-d-e VLIW is for you, otherwise...

      Since my performance needs are on big (32-bit need not apply) multi-user systems, I'll be watching the multi-core (Power4, SledgeHammer) vs. multi-thread (Alpha 21464) vs. VLIW (IA-64) battle with interest.

  8. Intel's superior offering????? by Idaho · · Score: 5

    You obviously never read Tom's Hardware. Look at this article describing how Tom thinks about Intel's IA64 architecture (Itanium, formerly Merced) in relation to AMDs SledgeHammer technology.

    Why do you think it's called SledgeHammer in the first place???

    --
    Every expression is true, for a given value of 'true'
    1. Re:Intel's superior offering????? by Detritus · · Score: 2
      Why do you think it's called SledgeHammer in the first place???

      Because the architect said "Trust me, I know what I'm doing."

      --
      Mea navis aericumbens anguillis abundat
    2. Re:Intel's superior offering????? by Bombcar · · Score: 1

      Because:

      When you have a sledgehammer, every thing looks like a BIG HONKIN' NAIL!

      or should that be concrete sidewalk?


      .sig

    3. Re:Intel's superior offering????? by John+Allsup · · Score: 1

      Basically, the Sledgehammer's aims are more for the short term. Intel have been desparate to get rid of the x86 for most if the IA's lifetime. They designed it with a 3-4 year life-cycle in mind, then got themselves shot in the foot with it approaching a life-cycle time of more like ten times that!

      The point of Intel's move into VLIW in the way that they have is to do to RISC what RISC did to CISC. Obviously, the persistance of CISC would seem to indicate that they are in for a rough ride, but the fact that RISC architecture has dominated so far as processor design innovation is concerned (note that most of the clever innovations on todays x86 chips are due to previous RISC designs).

      p.s. to those who care as to where I may draw the lines bewteen RISC and CISC -- I draw them based upon the thinking behind them, which I take to be paramount.
      John

      --
      John_Chalisque
    4. Re:Intel's superior offering????? by John+Allsup · · Score: 1

      Or maybe just because 'a sledgehammer to crack a walnut' is what it takes to make any progress with an x86 design these days. Diminshing returns and all that...
      John

      --
      John_Chalisque
  9. Will 32-64 upgrade hurt more than 16-32 did? by korpiq · · Score: 3


    Huge amount of computer based work is now done on Wintel instead of mainframes. Remember how much stability problems arised in windows due to the 16-bit compatibility? Ok, so it was not because of the bitness but the insecure memory model. Still, providing backwards compatibility to 32-bit software is going to happen with separate interfaces (what's the length of an 'int'?^). Have some more DLL Hell? I wouldn't mind Microsoft dropping the backward compatibility all together - heck, the world would probably choose to turn compatible with my OS - but somehow I imagine that won't happen :)

    Most of us would probably finally like to trash 16-bit compatibility, wouldn't we? Keep the old processors for old games and recompile what is
    worth it. Or just make it software-emulated and stop wasting die space. But there it remains, according to the PDF. It's just a tradition, not useful anymore.

    I was considering whether I should upgrade from Celerons to PIII's at home, when it hit me: wait another year or so, and invest into a 64-bit system. Worth it? In schedule? Time will tell. If only Abit released plans of Hammered mobos :) And when will the Transmeta 64-bit-Intel-compatible firmware upgrade come out?-)

    --

    I think, therefore thoughts exist. Ego is just an impression.
    1. Re:Will 32-64 upgrade hurt more than 16-32 did? by akey · · Score: 2

      I wouldn't mind Microsoft dropping the backward compatibility all together...

      That's not going to happen, and there are a few reasons why. The biggest reason is the existing investment in software... a lot of companies waited (or are still waiting) to deploy Win2K, despite the fact that it will run almost 100% of the software that ran under 95/98 and contained security and other enhancements. If you completely axe backwards compatibility, hardware or software, people are not going to flock to replace existing installations.

      Or just make it software-emulated and stop wasting die space.

      Absolutely. Emulation would probably be able to handle 90% or more of current applications. The choice would then be to either keep around 32-bit machines for the software that needs it, and/or wait for new version built for the new platform.

      ---

      --

      ---
      "Go Metallica. Die RIAA." -- Linus Torvalds
    2. Re:Will 32-64 upgrade hurt more than 16-32 did? by nachoman · · Score: 1

      If Microsoft needs to use emulation if the new processor is so different, I think our friends at WINE may get a visit...

      Think about how much windows code they can run with incomplete documentation. It's not that slow either.

    3. Re:Will 32-64 upgrade hurt more than 16-32 did? by thing12 · · Score: 1

      To quote the first paragraph of the introduction of the pdf: "The x86-64 architecture supports legacy 16-bit and 32-bit applications and operating systems without modification."

      There are 3 operating modes in the chip - a pure legacy mode (supporting realmode, v86, and protected mode) which will run if you're on a 16 or 32bit OS; and two modes - true 64 and 16-32 compatibility (both supporting only protected mode, woohoo!) - that can be accessed if running an OS with their 64-bit extensions, and it oughta be trivial for the OS's program loaded to know if the app it's trying to run is 32-bit or 64-bit so it will just have to know how to launch a program in either the 64-bit mode or the 32-bit compatibility mode.

      So with the software incompatibility nightmare out of the way, people can upgrade their hardware and sit around running their 'legacy OS' while waiting for a new OS that supports the wonderful 64-bit extensions. And who will be there first? I think we all know that answer and it's probably not even going to be Sun.

      The only thing that really sucks about this is that the byte order is still backwards Intel legacy crap. If only they could get around it through emulation.

      The big question is whether Microsoft will write two 64-bit OS's. If Win2k doesn't run in 64-bit mode on this thing it's going to be dead in the water --- I was going to say all the Linux boxes in the world changing to this chip wouldn't save it... but it probably would ;-). Of course, all it should take is a new OS loader which throws it into 64-bit mode and a few changes in the kernel so it can start up all the apps in 32-bit compatibility mode. So that'll take MS, what, maybe 2 years :-)

    4. Re:Will 32-64 upgrade hurt more than 16-32 did? by _Gnubie_ · · Score: 1

      Wine doesnt do CPU emulation (ok for the nitpickers in some cases theres a tiny bit of mucking around).
      WINE is an implementation of the WIN32 API and others for Unix. It also has a loader for loading windows executables into memory and doing a bit of translation on some of the adresses that the app might try to relocate itself to to fit in with the way we have things set up on *nix.

      From there on in its basically the x86 processor executing x86 code. Any library calls to win32 are either hanled by WINE's inbuilt WIN APIS or at your choice native windows dll's which undergo the same treatment as the programs loaded into memory as described above.

      Basically wine on a PPC wont run x86 Windows apps. Youd need to run wine compiled on an x86 under BOCHS or similar for this to work.

      If an app breaks under windows with a move to a new 64bit processor because of problems with some of its assembly code theres little or nothing WINE can do about it and it will fail under WINE too

    5. Re:Will 32-64 upgrade hurt more than 16-32 did? by heh2k · · Score: 1

      there's one problem with that:

      wine == wine is not an emulator

      btw, merced/itanium/pentium4/whatever-this-weeks-name-i s, can natively execute x86 code.

    6. Re:Will 32-64 upgrade hurt more than 16-32 did? by ackthpt · · Score: 1

      If only Abit released plans of Hammered mobos :)

      If there's anything I've learned about the mobo makers in Taiwan, its that they clearly are in the loop with AMD. No Athlon, Thunderbird or Duron comes out without the accompanying board to run on. Expect only Intel to have boards for the IA64 if/when it sees daylight.

      Vote Naked 2000

      --

      A feeling of having made the same mistake before: Deja Foobar
    7. Re:Will 32-64 upgrade hurt more than 16-32 did? by Inoshiro · · Score: 2

      So what you're saying is we shouldn't upgrade because some programmers (to put it mildy) can't code their way out of a paper bag?

      "Remember how much stability problems arised in windows due to the 16-bit compatibility? Ok, so it was not because of the bitness but the insecure memory model."

      NT runs 16-bit code in its own separate address space. That's what should've happened in Win9x, and might have happened had MS not been helmed by marketters trying to sell the more expensive NT to businesses (who themselves bought the 9x because it was the "legacy" update to their legacy Win31 machines).

      "Still, providing backwards compatibility to 32-bit software is going to happen with separate interfaces (what's the length of an 'int'?^). Have some more DLL Hell?"

      It's not AMD's fault that programmers can't be bothered to use proper types and use sanity checking in their programs. AFAIK, NetBSD is the only project written with enough portability discipline to run on a 26-bit processor (one of the ARM family). Using things like "int" and assuming they are 16-bit, 32-bit, or even 64-bit is wrong. There are specific types given with every mature libc that allow you to define exactly how many bits it should be via such defined types as int8_t, int16_t, int32_t, etc.

      If you look at this Kernel Traffic, you'll see what assumptions Linux makes about the various bit types.

      So before you complain about migration hell, remember that you probably made the choice to run your company on a Windows powered server. If you then can't get support for it 10 years later on newer hardware because the company behind it has decided to sell other things, you have to accept that. Don't try to call foul when the hardware standards advance, but your chosen software does not.

      I agree that earlier stuff should be emulated in software, rather than hardware. That's where the Crusoe has an edge -- it can, at the lowest level, emulate several processor families and allow them to communicate using the system memory. A benefit that is only gained by emulating another processor on theirs (which is what those "D00d, c0mp1l3 R4D H4t f0r 17 n471v3" kiddies fail to understand).
      ---

      --
      --
      Internet Explorer (n): Another bug -- that is, a feature that can't be turned off -- in Windows.
    8. Re:Will 32-64 upgrade hurt more than 16-32 did? by copito · · Score: 1

      vmware is also not an emulator, it just virtualize the i386 on top of an i386.

      Bochs is an emulator.
      --

      --
      "L'IT c'est moi!"
    9. Re:Will 32-64 upgrade hurt more than 16-32 did? by Inoshiro · · Score: 2

      I suggest you read the /usr/include/stdint.h on your system. It will show you how they libc people use C preprocessor magic to make types sane by default.
      ---

      --
      --
      Internet Explorer (n): Another bug -- that is, a feature that can't be turned off -- in Windows.
  10. Don't Blame AMD for that one by Killer+Napkin · · Score: 4

    Intel started that whole game with adding MMX Technology (R) to their chips. It made everyone think that, somehow, they were getting something entirely different with the Pentium chips because MMX was this magical add-on that no one else had.

    Suddeny Cyrix (you remember them don't you) chips started coming out with MX technology. AMD, if I remember correctly started licensing MMX for a while and finally came out with 3DNow.

    Now every peice of hardware you buy comes with magical tweaks. Hard drives, video cards, and even motherboards -- they all come in brightly colored boxes with completely unrelated pictures on them flouting "Proprietary Brand Useless Features (R)" If you're going to blame someone for being lame, blame Intel. (Of course, I'd also blame Microsoft, who touts useless or standard features as being "innovative")

    1. Re:Don't Blame AMD for that one by Killer+Napkin · · Score: 1

      Intel did the exact same thing.

      Anyways, this is a common practice in marketing now. Look at Apple. Everything begins with "Power" or "I." Companies like Compaq (iPaq) steal from this popularity. When nVidia started calling their 3D chips GPUs, so did everyone else.

      The rule is: If you can't steal the name, come up with something that's almost the same.

      You can't really just point your finger at AMD.

    2. Re:Don't Blame AMD for that one by Doctor+Memory · · Score: 1

      did you know that the old cyrix chips had the same architecture as the failed pentium pro?

      'Failed'? JFC, last I checked, a PPro w/1M cache was still in the several-hundred-dollar bracket. For a long time it was the only way to get a 4-CPU server w/ Intel arch. Check out this page under "Intel" and then explain to me how an ancient "failed" chip still commands the same price as the latest silicon.

      --
      Just junk food for thought...
  11. way x86? by nachoman · · Score: 1

    I don't understand why Intel and AMD don't start to work on non x86 based processors. The pentium IIIs and athlons already have far too much code to keep them backwards compatible. As far as software goes, Microsoft has already abandoned DOS totally, so why keep the processor architecture to run DOS.

    I think they should come up with a new design for a good 64 bit processor. Something that is RISC, but not worrying about x86.

    Make Microsoft port all their code for a change to the new processor. They've had it easy. Linux can run on countless platforms and would be easily ported.

    1. Re:way x86? by mikefoley · · Score: 1

      You've already got one.. It's called Alpha.

      --
      What's my Karma Mr. Burns? "Excellent"
    2. Re:way x86? by Saurentine · · Score: 1
      I don't understand why Intel and AMD don't start to work on non x86 based processors. The pentium IIIs and athlons already have far too much code to keep them backwards compatible. As far as software goes, Microsoft has already abandoned DOS totally, so why keep the processor architecture to run DOS.

      Intel has done just this. It's called Itanium. Haven't you read a thing about it yet?

      Itanium is NOT an X86 processor. That's also a big part of why Intel keeps telling us that it's for the server market, not the desktop.

    3. Re:way x86? by JebOfTheForest · · Score: 1
      I think there's still some DOS compatibility relics in Windows Millenium Edition (I refuse to call it "Windows Me".)

      Microsoft would love to port all of their code to a new processor, and charge their millions of users a tasty sum in the process. Microsoft would probably charge hundreds just for recompiled apps, so maintaining backward compatibility is probably good for the end user.

      jeb.

    4. Re:way x86? by nachoman · · Score: 1

      I know. The alphas are great, but are really for commercial use. I'd buy one for my desktop but I don't have that kind of cash. We need a good 64 bit processor for the desktop.

    5. Re:way x86? by nachoman · · Score: 1

      Nope. They removed the restart in DOS mode... The "DOS mode" no longer exists. It's like NT.

    6. Re:way x86? by mikefoley · · Score: 1

      But you can get an EV67 600MHz Alpha for around $3000. Granted, it's not $1500, but my first 486 cost $4000. And it's available today, not years from now. Do you really think you can get a Merced or Sledgehammer system for under $2000 today?

      mike (I work at API. We "do" Alpha)

      --
      What's my Karma Mr. Burns? "Excellent"
    7. Re:way x86? by Webmonger · · Score: 1

      Evidence in Caldera's lawsuit showed that Windows 95 and 98 still rely on DOS for some of their system functions. Since Windows Milennium is not a major architectural change, it probably uses DOS the same way.

      Just because you can't go into MS-DOS mode doesn't mean DOS isn't there.

      Anyhow, it still has DOS boxes. I haven't heard anyone authoritative say that no DOS apps will work with Windows Milennium.

    8. Re:way x86? by nachoman · · Score: 1

      Cool. I though they were way more then that. Last Time I checked Digital (Compaq) didn't have their prices on their website and I'm not a business, so I wasn't going to get a business quote.

      I've used alphas at my last work. It was a really old one running VMS 6.2.

    9. Re:way x86? by SEE · · Score: 2
      They made it hard to get to DOS, but they didn't remove DOS. To quote http://www.seagate.com/sup port/kb/disc/windowsmefaq.html:


      What are the differences between Windows Me and Windows 2000?

      Windows Me is structurally based on the 16-bit DOS (Disk Operating System) code base, although it is a native 32-bit operating system. The underlying technology of Windows Me is very similar to the software platform on which Windows 95/98 was built. Windows 2000, in contrast, was designed from the Windows NT software platform, and on a completely different code structure. Windows NT and Windows 2000 are native 32-bit operating systems built upon a 32-bit code base.



      Steven E. Ehrbar
  12. VLIW = Very Long Instruction Word by Idaho · · Score: 4

    For the uninformed,

    VLIW means Very Long Instruction Word, which means that the processor can execute
    several instructions at one time (one Instruction Word can contain multiple instructions).

    This is a good idea because this way the processor does not have to worry about
    running instructions concurrently. Instead, the compiler has to worry about that,
    which makes it really hard to write a compiler that handles this right, while still
    optimizing as much as possible.

    Since the VLIW technology has not been tested very much in microprocessor designs,
    Intel is doing some really hard (maybe even innovate!) work, but that also means
    many problems/bugs/performance issues, as with almost every 'new' technology.

    VLIW is successfully used in (e.g.) DSP processors, but those have very simple
    instruction sets, where the order in which things are processed often does not
    really matter, so this is rather simple to implement.

    However, in a microprocessor it's much harder, which may be part of the reason why Intel's Itanium is delayed so much (performance problems, and problems running high clock frequencies).

    --
    Every expression is true, for a given value of 'true'
    1. Re:VLIW = Very Long Instruction Word by Amokscience · · Score: 2

      Actually elements of VLIW have trickled into many CPUs. Many DSPs feature this as you have mentioned aas well as Transmetas chip. Also the AltiVec in the G4 is similar to a VLIW design (makes sense, no? Motorola also makes tons of DSPs). It's not the bulk of the chip but it hadnles the specialized instructions and that's where all of this 'G4 is twice as fast as a Pentium III' stuff comes from

      --
      Fsck cluebie moderators. I'll say what I want, offtopic or not. And fsck having to qualify every bloody statement just
    2. Re:VLIW = Very Long Instruction Word by SQL+Error · · Score: 1

      > Also the AltiVec in the G4 is similar to a VLIW design.

      Er, no, sorry. AltiVec is a short vector / SIMD implementation, like MMX, SSE and 3DNow: it allows you to apply a single instruction to multiple data elements (hence SIMD). The data elements in all these architectures must be identically sized and packed into a single field (vector), so a 128-bit AltiVec register can contain 4 32-bit, 8 16-bit or 16 8-bit values.

      VLIW is all about applying multiple instructions to multiple, independent values. The independence of the values is essential, since all the instructions in a word are processed simultaneously without checking for conflicts, so two writes to the same register produces an undefined result.

      SIMD and VLIW are orthogonal approaches, and there's no reason why they can't both be implemented on the same chip.

      Yeah! 16-processor 16-core 16-issue VLIW with 16-way SIMD! At 16GHz!! Beowulf clu - ow! I'll be good this time, really!

    3. Re:VLIW = Very Long Instruction Word by SimonK · · Score: 2

      Sorry to be picky, but all modern CPU evaluate many instructions simultaneously, using multiple-issue systems for many similar functional units of eack kind. The difference with VLIW is that several instructions are held in the same instruction word.

      In conventional VLIW the instructions combined in the same word must not have any dependencies on one another. The Crusoe native instruction set is VLIW in this sense. The Itanium system - which they call EPIC - is more complex, allowing instructions that interfere with one another to be combined in the same word. This ought to be somewhat easier for the compiler, but it seems in fact that elements of it are causing problems.

    4. Re:VLIW = Very Long Instruction Word by Amokscience · · Score: 2

      I stand corrected

      --
      Fsck cluebie moderators. I'll say what I want, offtopic or not. And fsck having to qualify every bloody statement just
    5. Re:VLIW = Very Long Instruction Word by ToLu+the+Happy+Furby · · Score: 4

      Sorry to be picky, but all modern CPU evaluate many instructions simultaneously, using multiple-issue systems for many similar functional units of eack kind. The difference with VLIW is that several instructions are held in the same instruction word.

      More to the point, most modern CPU's, the chip itself determines which instructions should be run simultaneously. With VLIW, in theory, the compiler does this. Thus (in theory) the VLIW chip can be a lot simpler, since it doesn't need to spend a whole bunch of chip area on complicated logic to manage the process of choosing which instructions to process simultaneously and on large buffers to hold many instructions while the fastest combinations are chosen.

      In conventional VLIW the instructions combined in the same word must not have any dependencies on one another. The Crusoe native instruction set is VLIW in this sense. The Itanium system - which they call EPIC - is more complex, allowing instructions that interfere with one another to be combined in the same word. This ought to be somewhat easier for the compiler, but it seems in fact that elements of it are causing problems.

      Ah, what happens when theory becomes practice. See, the problem with all of the above is that traditional VLIW (and it is very a traditional idea, despite Intel pretending they just invented it (and even then, it was HP who invented EPIC)) can only produce code which is known to be dependency-safe at compile time. In the fields where VLIW has been used for decades--i.e. specialized DSP stuff--this means most code. In the fields in which Intel is trying to sell its IA-64 chips--i.e. general purpose, multitasking machines (first servers and eventually workstations and even, they claim, desktops)--this turns out to be almost no code at all. It turns out that virtually nothing that a general-purpose computer tends to do has very many instructions which can be proven at compile-time never to have any dependencies on many other instructions. This compares to a normal superscalar x86/RISC processor, which has the much more fruitful task of determining which instructions are likely to be dependency free at run-time.

      This presented a problem. So, with EPIC, HP came up with the idea of having long-words (or "bundles") composed of instructions which were merely likely not to have dependencies on each other. So far so good...except that then you need a bunch of hardware on the chip to determine when you have dependencies and when you don't, and to figure out what to do when you do (after all, the chip still needs to execute all those instructions). That is, all the hardware that any non-VLIW superscalar CPU needs. But wasn't the whole point of VLIW was to make the chip simpler by moving all that stuff into the compiler and keeping it there?

      Another feature that most modern CPU's (so called "out-of-order designs") have is the ability to pick one side of a conditional branch--the side which is more likely to be taken--and pretend it has already been taken, executing the results before it knows they will be needed. The problem with this is that now the chip needs to keep track of which instructions are definitely needed and which would have to be "thrown out" if it turns out the wrong branch was taken. This would seem to be counter to VLIW philosophy, but because of the speed gains speculative execution offers, EPIC includes it as well. While branching "hints" are indeed introduced by the IA-64 compiler, this is still just more complexity which ends up not being removed from silicon.

      Further holding back Itanium is the fact that without dynamic handling of instructions in the CPU, the chip can't take advantage of something called register renaming, which essentially allows the compiler to pretend it's using certain registers while the on the chip the programs just use whatever registers happen to be available. The upshot of this is that Itanium needs a whopping 128 14-ported (a "port" is like a line into/out of the register) 64-bit general purpose registers. More registers--sounds like a good thing, right? Problem is that 128 14-ported 64-bit registers take up such a phenomenal amount of die space that it's difficult to get them to do all the things they need to do in one clock cycle and still stay in sync. The result is that Itanium won't clock very fast without failing, and Intel had to screw with the pipeline timings late in the design process to get it to "acceptable" clock speeds at all.

      The end result of this? Amazingly, in a processor whose entire design philosphy is to remove as much complicated control logic from the chip to the compiler, the portion of Itanic's die dedicated to control logic will be bigger than the entire die of an Alpha 21264 on an identical process!! Intended to be a high-volume chip released at 800 MHz in late 1997 or 1998, Itanium is going to end up a low-volume chip released at 733 MHz in 2001, if indeed it is released at all in anything more than engineering-sample quantities.

      Thus everyone's hopes have turned to the next IA-64 chip, McKinley. Intended to be released in late 2001 (put me on the record as doubting it) as a high-volume, moderate clock speed chip on Intel's upcoming .13um process, it may indeed be an impressive performer. (Interestingly enough, McKinley is being designed entirely at HP...) Whether that's because of or despite the EPIC design will be interesting to see. It is, at the least, pretty doubtful that the competing Alpha 21364 and Power4 chips around by then won't be even faster than McKinley, and they'll be manufactured on less advanced processes than Intel's.

      Bottom line: at this point in the game, VLIW looks like a damn neat idea that never should have made the jump to general-purpose computing. Whether IA-64 will end up dominating the world anyways will be an interesting story to see. On the one hand, the server market isn't known for rewarding well-designed processors: the lion's share of the market is owned by Sun, whose UltraSPARC-II's are horribly outdated and outclassed on a per-processor basis by everything this side of a Celeron. Meanwhile, the Alpha, universally agreed to be the fastest and most elegant processor around, is languishing in the market. On the other hand, Sun's big strength (other than marketing) is in scalability, and given that the two big OS's for IA-64 appear to be Linux and Windows-64 (laff), it seems Intel won't be able to able to compete on this measure either.

    6. Re:VLIW = Very Long Instruction Word by bmajik · · Score: 1

      You are wrong.

      VLIW was done over 20 years ago. Try looking at the AP-120B. "Trace" scheduling and other advanced techniques were being used on full-fleged microprocessors while intel was still dicking around with 4004s. In general, though, compilers were not smart enough to make them effective. doing manual software pipelining isn't fun or time-effective.

      Fast forward to now. Now that RISC compilers are so bright, and the control section is taking up so much die on your average "RISC" chip to make it arse-slow anyway, VLIW is again worth considering. Making the CPU dynamically extract ILP is now too complex to allow the CPUs to scale up the clock. Enter the Mips R10k. Amazing at its introduction, but never even doubled its introductory clock rate over its life cycle.

      Also. The intel chip is _not_ a VLIW chip. LIW, perhaps. There are previous VLIW designs that used > 1000 bit instructions with dozens if not hundreds of execution units. The Intel chip has nowhere near this many.

      Intel _is_ doing something smart. Moving the scheduling code to the compiler where it can be made infinitely smart and as slow as necessary, is a good thing for performance.

      However, there are drawbacks. Adding EUs breaks binaries (and compilers). Changing pipeline length breaks binaries (and compilers). The compiler on a LIW (or VLIW) is absolutely intimiately tied to the microarchitecture of the CPU. If any of the details of pipelining, EU type, resource numbers, or timeing are changed, everything breaks. Thats not just compilers, thats existing code. Get ready for a recompilation nightmare - theres almost no binary compatability once you change anything significant.

      It's easy to see why this is the case; with a x86 chip today, you stuff it some instructions, it figures out how to schedule them and manages all resource conflicts for you.

      With the new intel chip, the compiler will be doing all of this. "At stage 1, this instruction will be on EU0, this will be on EU1.... this will be on EUn." "The instruction package is 128 bits long. At stage k, each of these sub-instructions are still not creating any hazards because I knew how the eu's were pipelined when i made the instruction packge.

      So if you add another EU, its going to need a slot in the instruction package -> the 128bit size goes up, or some other amount of that space gets shrunk. There goes binary compatability. If the pipeline lengths are changed, then the load/store/branch slot delays may change. There goes your scheduling for the next n instrucation packages.

      LIW/VLIW isn't a silver bullet. There is never a silver bullet. Think of it as more as a necessary evolution as controllers take up more and more precious die space on cpus.

      --
      My opinions are my own, and do not necessarily represent those of my employer.
    7. Re:VLIW = Very Long Instruction Word by cburley · · Score: 4
      Excellent post. I have only a few off-hand observations to add.

      My impression of IA-64/EPIC, based on some reading of the docs, is that it's VLIW redesigned so it can scale up or down quite a large range of implementations.

      (I say something about this on my linuxexpo web page (see my site), and that's over a year old.)

      Basically, VLIW design can be (roughly) thought of as focusing on the question "given chip process design circa <insert two-or-so-year period>, and problem space <type of software being targeted>, and assuming very clever compilers, what's the optimal ISA we can implement?"

      (Note that it doesn't take into account long-term viability of the ISA that gets produced, because the idea is that, with very clever compilers, when you get to the next generation of chip/process design, you instantiate a new ISA based on asking that question again, recompile, and, viola, you've got "optimal results" absent previous-ISA baggage. Ah, dreams.)

      EPIC seems to augment the question with "and that scales across a fairly wide range of potential chip sizes and processes".

      So, e.g. on the 128-bit VLIW machines I used to deal with, there were reasonably decent low-end chip designs that couldn't viably handle the ISA, because too much stuff would have to go off-chip (like, say, the register file maybe ;-).

      Whereas simpler designs, 16-bit or even 32-bit CISC or RISC, could fit on such chips, blowing the doors off a similarly-processed instantiation of that 128-bit VLIW.

      A good amount of the logic you talk about in your article strikes me as being unnecessary for low-end applications.

      E.g. the register renaming, the huge multi-port register file (a huge file is needed, but not so hugely multiported), the logic that attempts to figure out what the dependencies are, etc. -- these all strike me as being necessary only for medium-to-large-scale (vis-a-vis the high-level ISA) implementations.

      My impression is that early Alphas, e.g. 20264 or 20266 or whatever, were intentionally done as low-end implementations. But they didn't attract a lot of attention. Even though the (well-done, IMO) ISA allowed for a great deal of scaling up, as the 21264 and 21264 are apparently proving (my 21264 is "mothballed", sadly), there isn't enough "groundswell" to make it popular. Perhaps not coming out with more of a barn-burner chip -- shooting higher than the basic ISA implementation -- is partly responsible for this.

      I'm thinking that the only way EPIC, IA64 in particular, ends up looking good is if it's popular and implemented across a wide spectrum of chips, from low to high end.

      That way, code that's already compiled to the ISA can, in theory (and perhaps in practice too), be optimized for mid-level to high-end chips, and still run pretty well on the low end.

      Similarly, code that's "mundanely generated" might run about as well on the low end as the highly-optimized stuff anyway, but could still get worthwhile boosts being moved, without recompiling, up the chain.

      That's a nice dream, if it's what they have in mind, but there are a couple of problems.

      One, any information that is able to be encoded into ISA-level instructions that helps a variety of implementations of an architecture make their own decisions how to implement them represents ISA space (and usually other resources) that can't be used in a way that's optimal for a given implementation -- one that didn't have to accommodate the "wide-range" ISA (like EPIC).

      E.g. if you reserve in the ISA a bit that says "please serialize between previous and next op" so a faster chip can know when to do dependency analysis before assuming parallel execution will work, that's a bit that a low-end chip, which is going to serialize it anyway, won't need.

      Also e.g. if you reserve bits and fields for all sorts of optimization hints, so mid-level chips can do a better job of guessing, not only do you hurt low-end chips that won't use them, but you hurt high-end chips that have either enough logic to do at least that good a job of guessing at runtime anyway or have otherwise rendered most of the compile-time guessing redundant (e.g. by reducing latencies on branches, memory loads, whatever).

      In both cases, these bits in the ISA could, on chips that don't really benefit from them, have served to boost performance in some other fashion. E.g. a low-end chip might want hints about L1/L2 cache issues, or maybe just a more compact ISA so it holds more instructions in Icache. Whereas a high-end chip might want hints about completely different things, or maybe just a way to specify what some new ALU can do in parallel with everything else!

      Two, notice the Catch-22 in my statement about how EPIC/IA64 might look good. It has to be popular and run across a wide variety of architectures to show how good it really is (to the market, anyway), but how does it get popular until the market knows how good it is?

      HP/Intel seems to be taking the approach of doing their best to "mandate" its popularity -- by making a real commitment to the architecture, including ensuring Linux runs out it from the outset, making good (great?) compilers (including OSS ones -- not sure how SGI Pro64 fits into this) available, etc.

      But while they struggle to popularize this "epic" ISA by planting many seeds far and wide, and, at the same time, proving its value by rolling out an increasingly-wide array of implementations (in terms of performance), they do risk giving competitors opportunities to make inroads targeting shorter-term strategies.

      And, in the longer run that IA64 seems targeted towards, will ISA compatibility across implementations be nearly as important as it was when this strategy was formulated and adopted, what, five or so years ago?

      If so, then assuming IA64 is not much more or less "correct" an ISA for the longer haul than the competitions' designs for their shorter outlooks, Intel perhaps can afford (fiscally speaking) to remain committed to an ISA that might seem like a dinosaur roaming around slowly while clever early mammals expand into a bunch of niches for awhile, until that day comes when the dinosaur's strengths are visible -- applications compiled to IA64 will have longer useful lifetimes compared to those compiled to upstart ISAs, they'll scale better across a wide range of machines, etc.

      But what works against this is the increasing viability of the ISA-ignorant code base out there, by which I mean code distributed as source, bytecodes, whatever, and which cares little for the underlying ISA to meet its performance goals.

      That viability is increased by things like:

      • Increased deployment of Open Source software
      • Better compiler technology, encouraging less use of ISA-specific tactics (assembly coding being the extreme) for performance
      • Increased awareness of the pitfalls of investing in, or developing, ISA-specific applications (this applies especially to the comparatively huge "market" of in-house software)
      • The mere existence of IA64, which tells everyone that even the "King" realizes that the one-time "only" ISA (the 1980s Unix equivalent of the VAX ISA), the IA32, will someday pass away as a viable platform for many
      That last item is kinda like what Y2K did for two-digit year encoding. After all, similar mind-sets, priorities, etc. lead to that as to doing ISA-specific, e.g. IA32-specific, platform development.

      Yet it seems Y2K didn't cause a lot of people to resort to "1900/2000" solutions. I.e. we don't see a lot of cases (that I know of anyway) where the developers said "okay, the old code was for 1900, the new code supports 2000, and includes some 1900->2000 conversion utilities, but it's still all two-digit stuff".

      No, it seems most Y2K issues were handled by finally going the full four (or more!) digits, so the problem wouldn't come up again in 2100.

      If so much effort (US$Billions) was put into keeping the problem from resurfacing in another hundred years, that suggests the industry (those who decide what platforms to target for their software, whether for distribution or use in-house) will respond, to a significant extent, to the IA32->IA64 transition with less of an "okay, let's retarget everything to IA64" attitude and more of a "hmm, IA64 might get us 10-20 years of viability, that's too short for the investment we have to make, let's go the extra distance, get away from ISA-specific tactics, and pick a strategy that gives us flexibility in choosing IA64 vs. IA32 vs. Alpha vs. whatever at a suitably fine-grained level".

      To the extent the industry adopts that model, the advantages of EPIC decrease, while the disadvantages remain the same.

      It's also interesting to note the strong feedback among the other items.

      In particular, consider how the success of Open Source (mainly GNU/Linux -- GCC specifically) came about soon enough to cause HP/Intel to openly "target" OSS so it could join the IA64 revolution.

      Now, that helps promote IA64 acceptance.

      But it also allows competitors, who want to produce better, "one-off" ISAs using whatever IA64-like techniques are appropriate, to do so without losing all that Open Source software, and even without necessarily having to do much high-end compiler development!

      I.e. to the extent OSS compiles code well for IA64, it can be fairly easily modified to compile code well for a one-off ISA that doesn't have all the baggage of IA64 but does do some of the sophisticated stuff.

      So OSS popularity led to IA64 "openness", which could well lead to better compiler technology being available/affordable for arbitrary ISAs that are VLIW or RISC subsets of IA64, and that could encourage the third item above, in that more "users" of code bases will realize they'd spend less $$ to get performance if they could just recompile for the ISA de jour (from AMD, Compaq, whoever).

      I'm not saying IA64 represents taking a risky path, since I don't know the percentages -- could be anywhere from 10% to 90% chance of success for all I know.

      But, of course, a huge amount of $$ and energy is being put into IA64, so it is, indeed, a "big risk" to say the least.

      --
      Practice random senselessness and act kind of beautiful.
    8. Re:VLIW = Very Long Instruction Word by SimonK · · Score: 2

      Nice post. As a matter of interest, whats your take on Crusoe's VLIW instractions ? To what extent can the problems with VLIW be circumvented by running the compiler at run-time ?

      My guess would be that you can do it to some extent, provided your compiler is sophisticated enough, and you're prepared to compile several versions of the same source for different input data.

    9. Re:VLIW = Very Long Instruction Word by ToLu+the+Happy+Furby · · Score: 2

      As a matter of interest, whats your take on Crusoe's VLIW instractions ? To what extent can the problems with VLIW be circumvented by running the compiler at run-time ?

      My initial guess would be that you can do it to some extent, provided your compiler is sophisticated enough, and you're prepared to compile several versions of the same source for different input data.


      My guess would be similar--that, by looking for dependencies at run-time instead of compile-time, Crusoe has a much better shot at generating fast code and keeping the CPU small, cool, and simple. After all, with their approach, they are successfully able to do what IA-64 can only promise: move all the complexities of instruction scheduling from hardware to software.

      Or are they? Because Crusoe (the hardware) is a straight-up in-order VLIW chip, its runtime compiler is actually doing two things: recompiling compiled x86 (or whatever) instructions, and scheduling them. Most of the criticism levied at Crusoe's approach focuses on the first half of this equation, and proceeds along the lines that "JIT is a bad idea, because it's why Java is so slow." As it turns out, I couldn't disagree more. For one thing, much of the reason Java is slower than C/C++ is because it is safer and more OO--it runs its own garbage collector and forces everything to be an object, amongst other things. For another, it's not actually slower! The newest Java JIT's manage to generate faster code than static compilers in many cases--and well they should, because they know more about the machine they are compiling to and the most common critical paths through the software than a static compiler ever could. Indeed, HP is working on a runtime interpreter which will speed up almost any precompiled code.

      The reason JIT's can work so well is because they only need to compile the code once, then sit back and profile it, recompiling only when necessary. In other words, they incur a lot of overhead at first, but pretty much stay out of the way afterwards unless they'll really help out.

      Now on to the second half of Crusoe's compiler--the scheduler. As I mentioned before, this sounds like a good idea--taking some functionality off of hardware and moving it into software. But when you think about it, you realize there's no such thing as "taking functionality off of hardware and moving it into software"--after all, the "software" still needs to execute on the same hardware!

      What you're actually doing, then, is moving a function from having dedicated on-chip hardware performing it to having to be run with normal general-purpose hardware. This still has the very real benefit of making the chip a lot simpler, but now you've added a scheduler that needs to take clock cycles from the code it's trying to schedule.

      The big question, then, is how much can the scheduler be like the compiler--that is, just doing its work once and then only stepping in when necessary. If, by moving the scheduler from dedicated on-chip logic to software using general-purpose logic, you make it able to do that much better, then it may be a significant design win. If, however, the scheduler needs to do anywhere near as much work as it would have as dedicated on-chip hardware, you're going to end up losing speed.

      Which of these is the case? I have no idea. Obviously, a lot of very smart people (Dave Ditzel, etc.) thought the former. On the other hand, Dave Ditzel is reportedly the one responsible for keeping Sun's chips in-order while the rest of the world moved to out-of-order; a quick comparison between an Alpha 21624 and an UltraSPARC-II (or even the upcoming UltraSPARC-III) shows you who was right on that one. (Hint: not Dave Ditzel.)

      What we do know is that Crusoe is a lot slower than Transmeta originally thought a runtime interpreted VLIW processor would be. There have been strong reports that they originally envisioned their processors would be able to beat leading-edge x86 chips handily, and only scaled back to the low-power market once their original benchmarks came back disappointing. Even at the low end of the scale, they're attracting a lot of ridicule amongst chip designers for trying to "reinvent the benchmark" because their chips can't compete. I happen to believe that (work/time)/power is a useful benchmark for the mobile arena; still, there's no denying that Transmeta would rely on traditional benchmarks if they could. Furthermore, it looks as if several chips may end up being able to compete with Crusoe even on (work/time)/power--StrongARM's, the much-maligned Cyrix III, and various other low profile simple RISC chips coming out of the woodwork to compete for the "mobile embedded" market.

      So, while I would very much like Transmeta to succeed, so far--just as with IA-64--there's little indication that it's more than a bunch of hype. Perhaps after a disappointing first iteration, VLIW will get its kinks worked out and become the standard general-purpose CPU design philosophy of the next couple decades, just as RISC has been for the last two. (And yes, modern x86 chips are designed according to the RISC philosophy, even though the x86 ISA is CISC.) However, I have to say I doubt it. Looking ahead, all the badassest designs of the future (MAJC, Power4, 21464, SledgeHammer) seem to be moving towards keeping the dynamically scheduling RISC architecture and adapting it for CMP--chip level multiprocessing.

      But, as always, only time will tell.

  13. Will it make a difference to me? by Psiren · · Score: 3

    Okay, so assuming I buy a 64bit x86 CPU and slap Linux on it, what difference will I see as an end user to my current 32 bit system. Ignoring clock speed differences, will it be massively faster? Will it be more stable? What *real* beneift do I get from choosing a 64 bit processor, instead of a 32 bit one. The fact that it can address shitloads more memory doesn't help much. Who can afford over a Gig on their home system anyway?

    1. Re:Will it make a difference to me? by jcupitt65 · · Score: 1

      It should be quite a bit quicker (bigger busses, more bandwidth, less legacy idiocy), and you'll be able to handle bigger objects easily.

      It's not just how much RAM you have, it's the size of the files on your disc too. You have a 40GB hard disc, but the largest file you can mmap() is 2GB? That sux0rs. What if you're trying to edit a movie? Or open lots of large images in Gimp? The 2GB limit is becoming painful already.

    2. Re:Will it make a difference to me? by 4im · · Score: 1

      Speed will not necessarily be the most important factor, neither will be the tons of RAM that can be addressed.
      *BUT* you'll get rid of the 2GB file size limitation (ignoring that large-file-patch) of the 32bit-platforms. With an eye on video and some server applications that's a big plus.

    3. Re:Will it make a difference to me? by Baki · · Score: 1

      Not that again...

      There are enough OSses on 32-bit CPU's that can handle large files. NT and FreeBSD to name two.

      It is unbelievable that Linux still hasn't fixed this.

    4. Re:Will it make a difference to me? by thing12 · · Score: 1

      Read the question - this has nothing to do with large filesystems and everything to do with address space. He's saying that you can't mmap() the large file that exists on the filesystem. And you CAN'T unless you have an address space that will hold the whole thing. NO 32-bit OS can do that if the file is over 2 Gigs, though there may be some trickery you can do to get that up to 3 Gigs. I haven't tried it on an Alpha... anyone out there mmap()ing 20 gig files on an Alpha?

    5. Re:Will it make a difference to me? by heh2k · · Score: 1

      the only advantage other than more address space, is that 64bit interger ops will be atomic. that is, single instruction, instead of having to concatenate two 32bit values.

    6. Re:Will it make a difference to me? by heh2k · · Score: 1

      no, it only means a speed up when using 64bit intergers. the disadvantage (unless you need 64bits of address space) is 8 byte pointers. 64bit gprs are nice, but currently there isn't much need for them (in the consumer mainstream, anyway).

    7. Re:Will it make a difference to me? by heh2k · · Score: 1

      *sigh* there is no 2gig limit, it's 4gigs. if you're going to complain about something, at least get the facts straight first.

    8. Re:Will it make a difference to me? by superlame · · Score: 2

      Well, anytime you are dealing with 64bit numbers you'll see a speed increase. So, if you have a file system larger than can fit in a 32bit address space, you'll get some performance improvement. This is good news for file servers and database servers.

      Also, the AMD 64bit CPU has twice as many registers as before, so that will help performance some. It would be a tremendous performance gain, but cache helps take some of the pain out of having to swap registers to memory.

      --
      -- Superlame http://catpro.dragonfire.net/joshua/
    9. Re:Will it make a difference to me? by mrfiddlehead · · Score: 1
      It won't, in the short term. It's the long term that matters. The limits of the 8088 systems begat the 286, then 386, 486, [56]86, ... Technology catches up to the limits, or has in the past couple decades. Mind you, a 64bit integer is a huge limit (0-18,446,744,073,709,551,615 - 18.5 quintillion).

      I wonder if we will ever need that 128bit processor in our lifetimes?

      --
      :wq
    10. Re:Will it make a difference to me? by Fesh · · Score: 1
      Oh, now you've gone and said it. I submit for your approval Murphy's Law (Fesh's Corrolary):

      If a person wonders if we'll ever end up needing higher-performing computer hardware that isn't currently unavailable, he/she will invariably be proved wrong.

      Take Bill Gates, for god's sake... *grin*


      --Fesh
      "Citizens have rights. Consumers only have wallets." - gilroy

      --
      --Fesh
      Kill -9 'em all, let root@localhost sort 'em out.
    11. Re:Will it make a difference to me? by Fesh · · Score: 1
      Damn it! And I even previewed!

      isn't currently unavailable = isn't currently available.


      --Fesh
      "Citizens have rights. Consumers only have wallets." - gilroy

      --
      --Fesh
      Kill -9 'em all, let root@localhost sort 'em out.
    12. Re:Will it make a difference to me? by S�gnal+ll · · Score: 2

      Since the size of integers will double, you will need twice more RAM to run your software.

    13. Re:Will it make a difference to me? by lpontiac · · Score: 1

      void moveBack(recordset_t *r, int n) {
      fseek(r->fp, (size_t)(-n * sizeof(record_t)), SEEK_CUR);
      }

    14. Re:Will it make a difference to me? by Inoshiro · · Score: 2
      Let's see:
      Pros of 64-bit proccssor:
      • 64-bit default pointer means you get > 2 gb file size limit without any performance penatly or backflips on the part of your OS.
      • Your memory bandwidth will increase (think AGP 4x being faster still!) because you move larger chunks of data per clock cycle (not more).
      • You, too, can run nuclear weapon detonation simulations on your home machine without waiting an eon for a result.
      • Whereas most small operations (such as bit reads/writes) are about the same in terms of speed, all "large" operations (such as flushing memory pages to disk) will go faster.
      • AMD specific: you lose some of the Intel compatbility-bagage, and should get better performance because of the much-saner memory segment handling.

      Cons of a 64-bit proccessor:
      • Most software not written with portability in mind will break in interesting ways (not fixable if it's closed source)
      • Some 32-bit code will not run on it because of some of the legacy compatibility removed.

      Over all, a good upgrade (IMO).
      ---
      --
      --
      Internet Explorer (n): Another bug -- that is, a feature that can't be turned off -- in Windows.
    15. Re:Will it make a difference to me? by Alanzilla · · Score: 1

      *sigh* The offset value is signed, ergo 2 gigs.

    16. Re:Will it make a difference to me? by slashdot-me · · Score: 2

      I wonder if we will ever need that 128bit processor in our lifetimes?

      Well, let's do the math. Moore's Law or some derivative suggests that the size of {disks,ram,whatever} doubles every N months. Each doubling of "stuff" will require one more address bit. So the number of bits in an address should increase linearly with respect to time. That is, one bit every 18 months or so. Since address bit counts seem to grow by powers of 2 the time between address bit count doublings should double.

      Year Chip Bits Physical/log
      1971 4004 4 640/9
      1972 8008 8 16k/14
      1974 8080 8 64k/16
      1978 8086 16 1M/20
      1980 I was born
      1982 80286 16 16M/24
      1985 80386DX 32 4G/32
      1994 Alpha 64 lots/64 (guessing)

      The data doesn't fit perfectly. Through the 70s we seemed to gain one bit a year or thereabouts. Through late 80s and early 90s we got two or three bits per year. I suppose everyone will have 128 bit computers in 30 years or so. 1e17 bytes on a disk (mmmm). And I'll be 50 (doh!).

      News flash: #9 came out with a 128 bit graphics processor in the early 90s. So this might all be bullshit.

      Ryan "1e17 bytes should be enough for anyone!"

    17. Re:Will it make a difference to me? by GodSpiral · · Score: 1

      The benefit to u, of the sledgehammer is not the 64bitness. Its the dual cores on a single chip that will do it. Should be Cheaper (chip and MB) and faster than dual processors.

  14. How are these gonna compeate in the future? by TyFoN · · Score: 1
    I wander what happpens when amd and intel gives out a 64 bit chip each. Will windows be out for each processors?
    If not one of them is surly gonna beat the crap out of the other and we suddenly have monopoly on CPU's again.
    I know at least that if they're not compatible i'll go for Intel as a standard.
    Does anyone have any info regaring this issue?

    Øyvind

    1. Re:How are these gonna compeate in the future? by nsanit · · Score: 1

      This reminds me of the time in the early 80's when you had a Commodre, an Apple, or MAYBE an IBM machine.

      With the two companies moving away from compatability, it seems like we're moving back toward that era where there's no such thing as a PC as we know it.

      AW hell, if only I could afford to put an Sun enterprise machine in at home. At least the competitors in that arena are incompatible all around - you can tell by looking at the case. In this case, there could be 2 Compaq machine (or Gateway etc) that you can't install the same OS on...can't tell by looking though.

      --
      They that can give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety.-Franklin
    2. Re:How are these gonna compeate in the future? by Saurentine · · Score: 1
      I wander what happpens when amd and intel gives out a 64 bit chip each. Will windows be out for each processors? If not one of them is surly gonna beat the crap out of the other and we suddenly have monopoly on CPU's again. I know at least that if they're not compatible i'll go for Intel as a standard. Does anyone have any info regaring this issue?

      Picking "Intel as a standard" is a rather strange thing to do in this situation, as the AMD chip is expected to run all your current software natively, while the Intel will have to do tricks to make it run.

      This is a big reason why the Intel chip is targeted at server markets; to give the much broader desktop software markets more time to mature and adapt to their programs to Intel's radical change. The AMD, on the other hand, should run x86 code natively faster than any other x86 chip, and could be scaled down from servers to desktop systems any time AMD wants to pound on Intel.

      Gives a little more meaning to the code name "SledgeHammer", doesn't it?

  15. As usually slashdot line noise is high by arivanov · · Score: 5
    By the time I read AMD pdf slashdot was already full of various "meaningfull opinions". Whatever, as usual, people never change.

    I have to admit I am impressed:

    • AMD managed to get rid of quite a bit of legacy for the 64 bit mode. Most of the utterly idiotic segmented switching is gone. There is a well defined supervisior mode and user mode. There is a SYSCALL instruction so the mess of "jump to that magic offset to get promoted to OS level" is gone and OSes will have a nice clean API.
    • At the same time there is a reasonable amount of backwards compatibility. It is not without a cost but the cost is way less than Itanic. Almost all idiotic x86ism (tm) like the x86 task switching mechanism generate a GPF on the spot. So the OS will have to handle them in software. This means two things: the compatibility is relatively simple and the compatibility will be easier to achieve for emulating 32 bit OSes where ring 0 is called within a well defined API. Porting "the world of bypass backdoors" - NT on this will suck (even after AMD has broken their own rules and made exemptions for it). Porting all Unix OSes available for x86 will be a piece of cake.
    • Also unless told to it will do all calculations in 32 bit. So that most of favourite x86 legacy issues will have less impact. Also it has a reasonable number of register. 8 more general purpose 64 bit ones and 8 more 128 bit SIMD ones.
    Quite an interesting beast to play with, question being will it have proper linux and BSD support. Also after reading the PDF it becomes clear why is the Sun support for this. This approach is very close to their uSparc/Sparc legacy scenario. And they have swam in that swamp for years (and are still swimming there). It is their CPU. It was born for them ;-)
    --
    Baker's Law: Misery no longer loves company. Nowadays it insists on it
    http://www.sigsegv.cx/
    1. Re:As usually slashdot line noise is high by YakumoFuji · · Score: 2
      AMD managed to get rid of quite a bit of legacy for the 64 bit mode. Most of the utterly idiotic segmented switching is gone. There is a well defined supervisior mode and user mode. There is a SYSCALL instruction so the mess of "jump to that magic offset to get promoted to OS level" is gone and OSes will have a nice clean API.

      amd has had syscall since K6 days. and intel has its own version (both are incompatible.) and believe it or not, intel implemented it at the REQUEST of Microsoft!! (dont know if Win* actually uses it or not...)...

      unfortunatly the AMD implementation was seriously buggy. reports say intels version is ok tho.

      Write your Own Operating System [FAQ]!

      --

      no sig for you
    2. Re:As usually slashdot line noise is high by / · · Score: 1

      It is not without a cost but the cost is way less than Itanic.

      Hmmm. At least the Titanic didn't sink until after its commercial launch, which did sell lots of seats. At this rate, Itanium isn't going to get out of the dockyards.

      --
      "If one is really a superior person, the fact is likely to leak out without too much assistance" -- John Andrew Holmes
    3. Re:As usually slashdot line noise is high by Anonymous Coward · · Score: 1
      Also unless told to it will do all calculations in 32 bit. So that most of favourite x86 legacy issues will have less impact. Also it has a reasonable number of register. 8 more general purpose 64 bit ones and 8 more 128 bit SIMD ones.

      Is any compiler doing a good job of producing SIMD instructions, or is SSE only getting used in hand-coded assembly by driver-writers? I suspect increasing the number of floating point registers might have made a bigger difference (and doing something about the idiotic floating point register stack model!)

      For what it's worth, the "default to 32-bit" is old hat; the DEC Alpha C compiler does this as well--to avoid sizeof bugs, it defaults to ints and longs as 32 bit. The difference here is that the "default" is in the machine code (use of prefixes and not), although it seems to follow an identical pattern to Intel's original 16->32 upgrade (the use of bits marking code pages, etc).

    4. Re:As usually slashdot line noise is high by Ig0r · · Score: 1

      It almost sank in the harbor because it pulled another ship away from the dock in it's wake, they almost collided.

      --

      --
      Soma: because a gramme is better than a damn.
    5. Re:As usually slashdot line noise is high by waveman · · Score: 1

      As well as the fixes to the IA architecture mentioned, they have also fixed the floating point register stack. It is very hard to write fast floating point for IA32 and the new architecture makes it easy.

      Intel has had plenty of over-engineered disasters before (32432, 286) and Merced is another one IMO.

    6. Re:As usually slashdot line noise is high by QuoteMstr · · Score: 2

      Recent versions of the call are fine. The problem had to do with SYSCALL not allowing IRETs until a SYSRET, which meant that it couldn't be used for system calls that could sleep (and switch to another process).

    7. Re:As usually slashdot line noise is high by throx · · Score: 1

      Porting "the world of bypass backdoors" - NT on this will suck (even after AMD has broken their own rules and made exemptions for it).

      Just curious - what makes you think porting NT would be hard? It's been ported to 4 architectures so far and communicates between userland and kernel pretty much with INT 2E.

      Of course, if this was just the typical /. anti-M$ rhetoric ignore me.

      --

      Fear: When you see B8 00 4C CD 21 and know what it means

  16. Re:why PDF? by Octorian · · Score: 1

    Why PDF? I'll tell you! PDF is the STANDARD format for online technical datasheets. Go to the webside of ANY company that manufactures semiconductor products and try to get datasheets. They're all in PDF.

  17. It's all about compatibility by speek · · Score: 2

    People won't care about performance nearly as much as they do about compatibility. If all we wanted was a 64 bit architecture that was fast -it's already out there. It's called Alphas. So, this race between AMD and Intel is about which will Windows run on? It's too bad, though, since Linux has already proven that a good OS is capable of working anywhere. I would prefer to have more choices in the hardware world....

    --
    First, make it work, then make it right, then make it fast, then, make it bloated!
    1. Re:It's all about compatibility by Skapare · · Score: 2

      64-bit processors are overly expensive and will stay that way until market share provides enough economy of scale for the productions to be ramped up to make them cheap enough for the masses. It's all about acceptance. The Alpha isn't making it because it just lacks acceptance. While I'd agree it is better than IA-32, there are 2 reasons I'm not using Alpha. The first is Alpha is too expensive (but if it became accepted that might no longer be the case). The second is because it's not really all that great a CPU (as an example, some instructions, like divide, take way too long). If I had to do 64-bit today, it would more likely be UltraSparc. I look forward to Itanium, though I suspect Intel will try to rape the market with high prices on it for as long as they can.

      --
      now we need to go OSS in diesel cars
  18. AMD may win this in the short run by MobyDisk · · Score: 3

    Intel is behind behind behind in IA-64. MS is releasing their latests compiler soon MSVC 7. No IA-64 support. GCC has no IA-64 support. What about drivers, that need to be written in an assembly that noone knows? Normally, those things take time. With IA-64, it will take 5 times longer than usual due to the insane architecture difference. Intel will need to do much hand holding to prevent alienating x86 developers.

    AMD has managed to address some of the major issues without causing major issues. The architecture is a logical next step, not a crazy throw-it-out-the-window change. Many people would love a re-engineering, since it really is time. But 8 more registers, 64-bit support, and a few tidy-ups and we are in business. With technology, simplicity wins most of the time since it is cheaper and easier.

    The big question is "Can AMD release this before Intel steals the idea and make their own version?" :)

    VHS won out because "The cartridge was smaller" thus easier. IA-64 is a behemoth, and the timetable doesn't look good.

    1. Re:AMD may win this in the short run by Ben+Hutchings · · Score: 1

      If neither GCC nor VC++ has IA64 support, er, how exactly do you think Linux has been ported to IA64, and how is Microsoft porting Windows 2000? I think GCC and Linux for IA64 are available to the public already, though I could be wrong.

    2. Re:AMD may win this in the short run by Anonymous Coward · · Score: 1

      GCC has no IA-64 support.

      Darn, then what are those files in my egcs-20000717/gcc/config/ia64 directory?

      Don't get me wrong, I like AMD, but Intel's working seriously hard to make sure they have compiler support.

    3. Re:AMD may win this in the short run by heh2k · · Score: 1

      drivers are not written in asm. drivers for the vast majority of OSes are written in c, obj-c, or c++. the only asm they contain is in asm macros or calls to inlined functions written in asm, often only one instruction (such as a memory barrier op).

    4. Re:AMD may win this in the short run by The+Apocalyptic+Lawn · · Score: 1
      VHS won out because "The cartridge was smaller" thus easier.

      I thought VHS won because it had more, and especially, pr0nographic content. The good news is, the Sledgehammer is backwards compatible, so you can still enjoy all your old pr0n on it ;)

      - da Lawn

      --
      't used to be LawnMOWER, really...
    5. Re:AMD may win this in the short run by jovlinger · · Score: 1

      picking nits, cause I'm hungry and feeling cantankerous. also, I'm making this up, so add salt to taste.

      VHS was cheaper (licensing, consortium) I think, but the real reason it won out was... pr0n. Sony had a really tight grip on the betamax licence, and wouldn't allow questionable movie producers licence to use it. Or something like that.

      anyway, betamax carts are smaller, IIRC

    6. Re:AMD may win this in the short run by be-fan · · Score: 2

      There is a GCC-IA64. There is a IA64 Linux kernel. Where have you been? Though I agree, that Intel may have a problem. However, it isn't has hard as you make it out to be. The main problem's with the difference in architecture are supposed to be addressed by the compiler. Intel's idea is that the compiler should do a huge amount of optimization, and free up those resources on the chip. I doubt GCC is doing a very good job of optimizing IA64 code, so that's out as a viable IA64 compiler. Chances are that Intel will release it's own compiler (like they have with x86) which will cover most of the hardware differences. Also, this compiler will optimize binaries correctly to work well with EPIC and the whole VLIW thing. By using this compiler, most of the architectural differences should be hidden. Since the big OS on IA64 (Montery) is being custom written, that shouldn't have such a bad time getting out, and other software should be easily ported if they are in fact portable applications.

      --
      A deep unwavering belief is a sure sign you're missing something...
  19. Linux large file support by tjwhaynes · · Score: 2

    There are enough OSses on 32-bit CPU's that can handle large files. NT and FreeBSD to name two. It is unbelievable that Linux still hasn't fixed this.

    It would be unbelievable if it hadn't been fixed, as almost any reasonable size database would run into the end of the line fairly quickly. If you pay attention to the available patches for the kernels you'd know that quite a while ago there were patches to the kernel to support larger files - I think the name was the Large File Summit or LFS (not to be confused with Log-structured File Systems). Ah - the patches are available here.

    Cheers,

    Toby Haynes

    --
    Anything I post is strictly my own thoughts and doesn't necessarily have anything to do with the opinions of IBM.
    1. Re:Linux large file support by imroy · · Score: 1
      If you pay attention to the available patches for the kernels you'd know that quite a while ago there were patches to the kernel to support larger files - I think the name was the Large File Summit or LFS

      Summit?! Ah ha ha ha!
      Try Large File support.
      Besides, it (or something similar) is in 2.4. i.e > 2GB file support on 32-bit machines.

    2. Re:Linux large file support by PhilA · · Score: 1

      Summit?! Ah ha ha ha!
      Try Large File support.
      Oh contraire. You're wrong I'm afraid. The patches are named after the Large File Summit. See http://ftp.sas.com/standards/large.file/ and there's no need to be rude :)

      --
      nosig
  20. 64 bit processing is just a "check box" feature by BaronM · · Score: 2
    If 64 bit processing were actually important for most computing tasks, we'd see a much higher market penetration for current 64 bit platforms. UltraSPARC, Alpha, MIPS and POWER (not PowerPC) are all 64 bit processors backed by 64 bit operating systems, compilers and applications.

    For most tasks, 64 bit computing is not an obvious win.

    Sure databases and heavy duty scientific computing benefit from the vastly larger address space, but day to day gaming, office tasks, web surfing, mp3 listening and Natalie Portman porn viewing (I had to say it) won't benefit much at all.

    Now architectural improvements and (mainly) higher clock rates will mean serious improvements in peak performance, but I think Apple is on the right track with pervasive SMP, which should deliver higher SUSTAINED performance, so that I can do all of the tsaks above at the same time without worrying about spikes in demand for processing power will freeze my game at some crucial point. Of course, MacOS isnt's the ideal SMP platform, but the hardware is on the right track.

    1. Re:64 bit processing is just a "check box" feature by QuoteMstr · · Score: 2

      This same argument was made in favor of 16bit systems. See any modern 16bit systems?

    2. Re:64 bit processing is just a "check box" feature by freebe · · Score: 2

      Umm... there is a 64-bit PowerPC backed by a 64-bit AIX that IBM sells... you need to do more research!

      --

      Free BeOS, runs from a Linux partition

    3. Re:64 bit processing is just a "check box" feature by BaronM · · Score: 1
      Sure: the Palm Pilot (or whatever the correct name is now).

      I'm not trying to say tha 64 bit systems won't be popular, just that they're a solution to the wrong problem.

      32 bit systems solved the address space problems that gave us the hell of the x86 segmented memory model. It was a real problem for all sorts of common programs, and moving to 32 bit was a clean, useful solution. If we had an address space problem again, 64 bit would be a perfect solution. Too bad that for most users, address space just isn't a problem. Or are you actually pushing 4GB memory (real + virtual) on most of your desktops?

      The problems we are facing on the desktops now are mostly system-balance problems. Our graphics cards can't keep up with our CPUs. Our memory can't keep up with our CPUs. Even the fastest hard disk is a huge bottleneck, and any data-intensive program spends huge effort and clever cacheing algorithms trying to touch the disk as infrequently as possible. 64 bit doesn't help any of this.

      More processors instead of single, faster ones. More independent memory channels. Nonblocking peripheral access instead of busses. I/O controllers that mitigate the penatly for touching storage. These are the innovations that will mean improvements in real system performance.

      Sure, 64 bit will be included in the box, but it will be a check-off, not a real win.

    4. Re:64 bit processing is just a "check box" feature by / · · Score: 2

      Sure databases and heavy duty scientific computing benefit from the vastly larger address space, but day to day gaming, office tasks, web
      surfing, mp3 listening and Natalie Portman porn viewing (I had to say it) won't benefit much at all.


      That's only because you're letting yourself be shortsighted. When faster processors emerge, you'll start seeing a real market for interactive 3d virtual-reality Natalie Portman.

      --
      "If one is really a superior person, the fact is likely to leak out without too much assistance" -- John Andrew Holmes
    5. Re:64 bit processing is just a "check box" feature by SQL+Error · · Score: 3

      The Palm Pilot is 32-bit (Motorola 68328).

      People working with databases (my area), complex simulations and digital video already have problems with 32 bit limits. All can be worked around, but it's annoying to the developer, and often inefficent. My desktop machines both at work and home have 1GB of memory; 4GB of real memory is probably only two or three years away for me. 95% of my development is targeted at 64-bit systems (Sun, SGI and Alpha).

      Also, the SledgeHammer is expected to have dual cores, which addresses at least one of your other points. If I can get a dual slot/socket motherboard, and thus four processors, I'll be happy (for a while, at least).

      I do agree with your points on I/O - PCI has done well, but today a single GBit Ethernet or Ultra160 SCSI controller can swamp standard PCI, and 10GBit Ethernet and Ultra320 are waiting in the wings. PCI-64/66 will help, but it's only a short-term solution.

    6. Re:64 bit processing is just a "check box" feature by be-fan · · Score: 2

      Actually, the cool thing in Itanium is not the 64bit-ness (that is just kind of requisite for a next-gen proc) but the fact that the architecture scales to 8 pipelines. EPIC allows all 8 pipelines to stay filled (which BTW is probably the reason why the Itanium demos have been less than impressive, it is simply hard as hell to optimize for an 8-way proc.) AMD kind of misses that point. Of course, Sledgehammer also has a new-improved FPU, so that's the other big thing. But 64 bit is, as you said, a checkbox item. And it also isn't the main purpose of the new architectures. The media is taking it as such (because it is easier to understand 64 bit than parallel pipes) but the main purpose of 64 bit is so the developers don't feel stupid for introducing an 8-way 32bit proc.

      --
      A deep unwavering belief is a sure sign you're missing something...
    7. Re:64 bit processing is just a "check box" feature by be-fan · · Score: 2

      There is also a PCI-X planned that will push over 1GB/sec. (64bit, 133MHz)

      --
      A deep unwavering belief is a sure sign you're missing something...
    8. Re:64 bit processing is just a "check box" feature by Darby · · Score: 1

      Actually, I'm sure the market isn't a problem. The product isn't available yet though. So you have near infinite demand with zero supply. Whoever comes out with it first will end up so rich that he'll make BillyG mow his lawn.
      ---CONFLICT!!---

    9. Re:64 bit processing is just a "check box" feature by AntiSycophant · · Score: 1

      Texas Instruments TI-86, 85, 83+, 83, 82 are all 16 bit i believe... but they're just calculators....

      --
      Scatter the light to brighten a room, focus it to kill something.
  21. [OT] sandpile.org? more like shitpile.org by hoss10 · · Score: 1

    I know this is way-OT and I probably should post as AC but ...
    Why the hell does the sandpile site locked to width of 1024 pixels?
    Even if my monitor was at 1024x768 it's awful arrogant of them to think that i would maximise my browser just to read it.
    I'm getting close to patching junkbuster (http://junkbusters.com) to strip width= from the html!
    At least I have the zoom out option in Opera.

    1. Re:[OT] sandpile.org? more like shitpile.org by LinuxGeek · · Score: 1

      Because Christian Ludloff has always had an ego problem and singular vision (his own). But, he now works for Transmeta, so much of his previous ego-tude can now be forgiven and forgotten... His site is a great archive of cpu information that is still usefull.

      --

      Kindness is the language which the deaf can hear and the blind can see. - Mark Twain
  22. Re:Will it make a difference to me? REGISTERS!!! by thing12 · · Score: 2

    You get more and larger registers --- it will be faster because the less time spent moving data in memory to and from registers the faster the app will be. When you want to multiply 2 numbers they have to be pulled from memory and thrown into 2 registers and then operated on, then you get a result in one of those registers and you can do something else to it. Now scale that up to say an mp3 encoder which is doing millions of repetetive math operations and reusing results of previous calculations.... and you hopefully get the picture.
    Granted, this isn't as huge of an issue now that we have chips with a meg of cache on board and busses that can do 4 gigabits/sec.... but every little bit helps! even a 1st-level cache hit takes longer than just using what's already in a register.

  23. Re:why PDF? by QuoteMstr · · Score: 2

    There are many PDF-viewing (and creation!) programs available --- You can use xdvi or gv to view PDFs as well. No need to use Adobe's crufy Motif-based quivering mount of hacks.

    (Last four words stolen from elsewhere :)

  24. Re:Alpha uses VLIW since ye old times by heh2k · · Score: 1

    alpha is definetly NOT a VLIW cpu. also, VLIW is nothing new, intel had a VLIW chip out about ten years ago, which never caught on.

    btw, there's a reason no one else is making VLIW cpus. it's because it's an inherently flawed idea.

  25. Crusoe is VLIW by ghoul · · Score: 1

    When u say that VLIW has not been tried out yet u r speaking about the situation last yr when VLIW only existed in textbooks( where incidentally it has been for more than a decade). But with the successful launch of Transmeta's Crusoe which does software emulation of the x86 and uses a VLIW processor VLIW is here to stay Incidentally in my opinion if we HAVE to have backward compatibility why not have it in software and not on the die?

    --
    **Life is too short to be serious**
  26. DOS abandoned? by yerricde · · Score: 2

    Microsoft has already abandoned DOS totally

    But the embedded market hasn't. Neither have these guys. And the FreeDOS Project is even creating a GPL'd DOS clone.


    <O
    ( \
    XGNOME vs. KDE: the game!
    --
    Will I retire or break 10K?
  27. Little-endian byte order backwards? by yerricde · · Score: 2

    The only thing that really sucks about this is that the byte order is still backwards Intel legacy crap.

    But is little-endian (LSB first) really backwards? That's how bytes are sent over a serial port (low bit first). Little-endian is also the standard on the popular 6502 and Z80 CPUs in embedded systems and in the popular Game Boy handheld console (think Handspring Visor without the pen input). x86 asm coders seem to think the way 68000 and friends do it is bass-ackwards.


    <O
    ( \
    XGNOME vs. KDE: the game!
    --
    Will I retire or break 10K?
    1. Re:Little-endian byte order backwards? by SQL+Error · · Score: 1

      Ha! But the bytes sent over a network are big-endian! The 68000 (or at least its documentation) is somewhat schizophrenic - big-endian byte ordering, little-endian bit ordering (oops). Looks sensible until you stop and think about it.

      I just wish that 30 years ago everyone had settled on one or the other, so I hadn't (didn't? wouldn't? Past perfect subjunctive is very confusing) just spent the last two weeks dumping and loading 250GB of data just because the byte ordering was different between the two systems.

      One little, two little, three little endi - ow! Stop hitting me, I'll be good!

    2. Re:Little-endian byte order backwards? by tomk · · Score: 1

      Actually that would be "KCABDRAWS", unless the string is in unicode.. then it would be "ABKCAWDRS".

      -tk

    3. Re:Little-endian byte order backwards? by BeBoxer · · Score: 2

      I'm 100% positive the 6502 is an 8-bit processor, and I'm 99% positive that the Z-80 is too. Since endian refers to the order of bytes in a word, it doesn't make sense to refer to them as being big or little endian.

    4. Re:Little-endian byte order backwards? by SQL+Error · · Score: 1

      eHpl !'I mrtpaep dniiseda P PD1-!1

    5. Re:Little-endian byte order backwards? by Detritus · · Score: 2
      But is little-endian (LSB first) really backwards? That's how bytes are sent over a serial port (low bit first).

      Asynchronous serial interfaces send the data LSB first. All of the synchronous serial interfaces, that I have written software for, send the data MSB first.

      --
      Mea navis aericumbens anguillis abundat
    6. Re:Little-endian byte order backwards? by cyba · · Score: 1

      Instruction (6502) LDA ($80), Y refers to _word_ in memory to calculate address of operand. Processor interprets two bytes as word. Endiannes _does_ matter. RTS pops 16-bit address (two bytes) from stack. We have two bytes again. JMP kill_c64 uses _address_ (two bytes) placed after opcode... (read one of many 6502-asm books for more examples)
      BTW, Atari is the best :-)

    7. Re:Little-endian byte order backwards? by FigWig · · Score: 2

      My contribution:
      How to tell if your system is little or big endian

      int x = 1;
      if( *(*char)&x )
      printf( "little endian\n" );
      else
      printf( "big endian\n" );

      Or something

      --
      Scuttlemonkey is a troll
    8. Re:Little-endian byte order backwards? by SEE · · Score: 2

      The origin of the terms "big-endian" and "little-endian" are from Gulliver's Travels, where there were people who opened their eggs on the big end and people who opened their eggs on the little end. These two groups were each going to war to impose their opening method on the other group.

      The entire reason that the terms were derived from that part of Gulliver's Travels was to point out that the bit-order debate was as pointless as the egg debate.

      Steven E. Ehrbar

    9. Re:Little-endian byte order backwards? by Argon · · Score: 1

      Z-80 is little-endian. It could combine two 8-bit registsers as a 16 bit register. You need this for addressing memory (64K).

  28. At one time this would have seemed impressive by Junks+Jerzey · · Score: 2

    I know I'm supposed to be impressed by the bigness of the term "64 bit" and all, but this is striking me as another odd niche piece of hardware that most developers don't have time to exploit. Think MMX, Katmai, 3DNow.

    Processor speeds have gotten high enough and software bloated enough that much bigger wins can be obtained from cleaning up existing software than from CPU pissing contests. Corporate fanboys don't want to hear that, though.

    1. Re:At one time this would have seemed impressive by ERICmurphy · · Score: 1

      Just look at BeOS. It seems like it runs 3x the speed of Windows 2000 on my machine. --Eric

      --


      -- ERICmurphy -- www.jabber.org for open-source, XML-based IM
  29. Win2k??? by No-op · · Score: 1

    I find it hilarious that by the phrasing of your post you assume most companies have either moved to win2k already or are waiting to... There are many of us out here in various industries that would rather shoot ourselves in the head than move to win2k. Talk about insane overhead, non-compliant "standards based" features, and just general pain... maybe win2k would have been ok if they had axed the winNT compatibility so that lanman crap wasn't still hanging around. blah. I'll stick with our various commercial unix platforms for the time being, thank you :)

    --
    EOM
    1. Re:Win2k??? by No-op · · Score: 1

      thankfully it's not my job to run windoze networks. kiss off. :)

      --
      EOM
  30. Beta tapes were smaller. by JebOfTheForest · · Score: 1
    First of all, Beta tapes were smaller. Second of all, it "won" not because of anything remotely similar to technological issues. It won because of licensing. Sony owned betamax technology and wanted to license it (for a fee) to anyone who wanted to use it. A consortium of movie studios formed to quickly hack together a more open standard that they could use for free. It still sucks compared to beta, but that's why we have it.

    jeb.

    1. Re:Beta tapes were smaller. by kreyg · · Score: 1

      A consortium of movie studios formed to quickly hack together a more open standard that they could use for free.

      Is that the same consortium that gave us CSS on DVD and is having a hissy fit over DeCSS?

      --
      sig fault
    2. Re:Beta tapes were smaller. by JebOfTheForest · · Score: 1
      Effectively, yes. But I think the name is different.

      jeb.

  31. Strings are _not_ backwards. by yerricde · · Score: 2

    I've programmed in 6502 assembly on both Apple II and NES, and I've looked at a Game Boy ROM (Game Boy uses a Z80-compatible CPU, and only once have I ever seen a string written backwards. It was "DISK VOLUME BARSBAIT" in the old Apple II DOS 3.3. Try editing some legal NES ROMs with a hex editor.
    <O
    ( \
    XGNOME vs. KDE: the game!

    --
    Will I retire or break 10K?
  32. Re:VLIW = Very Long Instruction Word Demo by CBravo · · Score: 1

    For a shameless commercial:

    BOPS designs DSPs, and a demo of iVLIW (yet another taste of VLIW). here, and press start demos. Have phun.

    disclaimer: I work there.

    --
    nosig today
  33. I remember a TV show ... by LordNimon · · Score: 2

    ... called Sledge Hammer. I thought it was hilarious. I wish they had it on video.
    --

    --
    And the men who hold high places must be the ones who start
    To mold a new reality... closer to the heart
  34. OS support? AMD still seems to lag behind Merced. by orabidoo · · Score: 2
    It's fashionable to bash Intel on /., and claim that AMD will eat its lunch everywhere, but for the moment my impression is that X86-64 is at a much earlier stage of development than Merced (I can't bring myself to call it Itanium). Let's see, long before Merced's specs were public, Intel worked with MS to ensure there'd be a 64-bit Windows port for it, and formed the Trillian project with Linux vendors to make sure there'd be a 64-bit GCC and Linux port. Now that the specs have been out for a while, GCC-ia64 exists (does anyone know how good it is at optimizing? my guess is "not great", but i really don't know), linux-ia64 is merged into the official kernel, several Linux distros have alphas or betas for ia64, MS has showed a prototype of win64, and things appear to be moving, slowly but surely. Now, AMD just unveiled the X86-64 specs, but where is the software support? all we get is vague claims from Sun that they will port Solaris to the chip. Sure, AMD's processor will probably be compatible enough to run 32-bit Linux or Windows with no problem, but who wants a 64bit processor to run a 32-bit OS with 32-bit apps, when the 32-bit processor lines are cheaper and not anywhere near obsolescence? and where is the GCC port? it may be conceptually easy to move GCC over to this new beast, but it's still many hours of work; have they been done?

    If AMD wants to be shipping X86-86 boxes soon (like early next year), they really need a solid, working, 64-bit OS for it. Linux being what it is, it will get ported over no matter what, but *very early* availability of Linux may well be what makes or breaks the X86-64. I sure hope that AMD, or some partner, will soon make public an internal port of GCC and Linux. If they haven't done it, they'd better start one, like now.

  35. Executable size on x86 vs IA-64 by AndroSyn · · Score: 1

    One thing the x86 architecture has going for it is the fact that it probably ends up having some of the smallest executables out there. Have any of you ever compared the size of a sparc binary versus an x86 binary. Often times the x86 binary ends up being half the size. And I'm sure that the instruction set for IA-64 will result in similiar sized binaries to that of the sparc and the alpha. Say what you will about CISC instructions, but it does make for a bit smaller memory footprint as far as memory resident code goes...

    1. Re:Executable size on x86 vs IA-64 by shutdown+-h+now · · Score: 1

      Yes, but look at the VAX. VAX code was very small because of the insideous instruction set shoved upon us. VAX was designed for this, small compiled code, but look at how slow it is trying to run a windowed system. DECwindows took almost 5 minutes to fire up on my old VAXen.

      Sparcs were designed with the opposite ideology that disk and memory are cheap when compared to speed. Sparc ideology (RISC) emphasizes more instructions generated for compiled code over the VAX design ideology. VAX was designed when disk and memory were very expensive and so code footprint needed to be small. This sacrifices speed. There are always tradeoffs in any design. I personally feel we have definitely reached the stage where speed concerns outweigh code size, we've been there for quite some time.

      CISC gives you a smaller footprint for your code, but you sacrifice the one thing I love so much about RISC. Easy to read assembler code. I can't for the life of me learn to love x86 or VAX assembly programming, but I could write Sparc code all day and be happy. That's because Sparc assembler is so much easier to read and write than x86 or VAX. But that is MHO, YMMV.

      Dan
      root@foobar# shutdown -h now
      System will be halted.

    2. Re:Executable size on x86 vs IA-64 by Misagon · · Score: 1
      Yeah, but the ARM is a 32-bit RISC processor which is famous for having very small binaries - often smaller than for the x86. The ARM was designed to have a very compact instruction set which allowed it to do multiple things per instruction and do it fast. Later, the ARM has got an additional instruction set which is 16-bit and called "Thumb", which makes the code even more compact.

      I have looked at the IA-64 architecture, and it seems that the Intel designers have incorporated many of the features from ARM that made it's code fast and compact. Another thing that makes code fast and compact is the availability of fast memory registers. IA-64 has something like 40 general purpose registers available to applications, so hold your horses.

      --
      "We mustn't be caught by surprise by our own advancing technology" -- Aldous Huxley
    3. Re:Executable size on x86 vs IA-64 by be-fan · · Score: 2

      This ARM connection may be backed up by the fact that Intel owns ARM now.

      --
      A deep unwavering belief is a sure sign you're missing something...
    4. Re:Executable size on x86 vs IA-64 by T-Punkt · · Score: 1

      Intel has bought the StrongARM, but not ARM.

    5. Re:Executable size on x86 vs IA-64 by cburley · · Score: 1
      VAX code was very small because of the insideous instruction set shoved upon us. VAX was designed for this, small compiled code,...

      Funny, but I saw things differently back in the '80s, and still do.

      IMO, the VAX ISA was not designed for compact code as much as for CISC "elegance" -- stuff like orthagonality, consistent addressing modes, etc.

      From what I heard and saw, VAX code wasn't nearly as tight as similar code compiled for a Pr1me 400 series (roughly the same general architecture).

      Generally, I found the VAX to be more like a Motorola 68000 (M68K), whereas the P400 was more like an x86, with its prefix codes, "unbalanced" ISA, etc.

      (I'm not implying one design was based on another in a timeline or anything; the core of the P400 instruction set, which locked in the characteristics I'm referring to here, preceded basically everything else listed above by many years.)

      Personally I found writing VAX code to be easier than writing P400 (or x86) code, though my level of expertise was certainly highest on the P400. Too much stuff to remember, weird corner cases, etc.

      And I've found writing SPARC code quite easy and fun too, though IMO they got the SUBtract instruction wrong (shoulda been SUBtract Reverse, i.e. SUBR -- really, how often do you need to add exactly 2^N to a register, where N is 12 or 13 or something, I forget offhand, compared to wanting to subtract a register from a constant value, which I've often wanted to do in one instruction?).

      Actually the SPARC's probably the easiest processor for which I've written code that runs nearest maximum speed without lots of careful analysis. It is to the m68K/VAX what the HP PA-RISC is to x86/P400 -- something of a spiritual sibling, focusing on elegance and simplicity over code density (where the PA-RISC beats it out, I would think).

      But writing 128-bit VLIW code is my favorite for achieving bare-to-the-metal maximum performance via careful flow analysis, etc. ;-)

      --
      Practice random senselessness and act kind of beautiful.
    6. Re:Executable size on x86 vs IA-64 by be-fan · · Score: 2

      Ahh, I see. My mistake

      --
      A deep unwavering belief is a sure sign you're missing something...
  36. Re:Useless Features by grahamsz · · Score: 2

    In my local computer store (PC World for those in the UK) I read the following ad for some laptop.

    Sony Vaio XXXXXX laptop

    Key Features:
    * 10.4" TFT Screen
    * XXXMhz P3 CPU
    * No Modem

    Solved all my problems since it's so hard to get a laptop without a built in modem these days.

    Oddly the feature card failed to mention 1394 Firewire, Memory Stick Slot and the low weight!??

  37. New vs "Mature" what will win? by Sefirosu · · Score: 2

    Both architectures have their own strong points and weak points...

    What could play in favor of AMD now is that software for Itanium at it's launch might be far from mature and it might take a while before it gets any better. There will be not many other options considering that backwards compatibility with x86 for Itanium is, as it should be considering the new architecture, just a big joke. Not quite ideal for servers if you ask me...

    This could mean a wide headstart for AMD:

    - Backward compatible with a performance boost instead of a performance hit while 64bit software gets polished
    - Porting existing software will be easier and easier means pontentially more software available at launch
    - Probably much better availabilty of the chips; many websites have claimed that Itanium will only prepare the "road" for it's eventual successor..
    - Rumors have also claimed that Intel had no intention to drop the x86 line of chips for a while. That could also play in favor of AMD; they would have potentially the first widly available 64bit x86 chip in the market. Unless Intel adds a 64bit layer of it's own to it's x86 chips.. but then again.. AMD seems to be much more ready than they are on this front and it would be stupid even for Intel to release their potentially incompatible "extensions" after them.. Intel would be one that would be playing catch-up.. unless they can bribe as much software houses as they can..

    Now if AMD really manages to do it correctly, and considering their success with the Athlon it might happen.. they've seen bad days but it is getting much better IMHO, they really might become the new leader in, at least, desktop chips. Servers are another story but still it is possible considering again that software for Itanium won't be as much mature so easily. I don't think Microsoft will follow AMD in 64bit though unless their "marriage" with Intel comes to a divorce...

    And i'm not upset at all for linux... i'm sure it will be available for it...

  38. Dynamic by jovlinger · · Score: 2
    You know every so often, a technology comes along that just blows me away. I apply it everywhere, it becomes my favorite hammer (in that everything starts looking like a nail).

    Dynamic software translation is such a technology. Yes I know that it completely failed to do anything for the Alpha's NT penetration (remember the FX!32 dual mode chip?) but we'll put
    that down to poor marketing (did you ever see one system with it?).

    This is how the revolution will be telecast. Apple did it. win/tel will do it too. While I love AMD for giving intel credible competetion, I do have to admit that I think sacrifices to binary compatibility are looking like a worse and worse strategy.

    This is the optimal time to introduce a new architecture. When apple changed to PPC, they were switching to a much faster chip, so were able to claim significant speedups vs the old architecture. Win/tel doesn't really have that option (requiring longer lead times to see significant speed iumportovements over the current arch), but we finally have a plateau in speed requirements.
    1. Games are bottlenecking on 3d hardware,
    2. office suites are fast enough,
    3. our UI is fast enough and there are no computationally expensive metaphors on the horizon


    This plateau means that a new architecture can be introduced on obsolesence alone -- the first couple of generations don't need to compete on speed. As more and more applications get ported to native code, consumers will again see speedups.

    Of course, the new architecure would offer speedups to their big-money early adopters -- java backends are already architecture independent. Just introduce a native java VM along with the chip.

    So if there ever was a time to throw out cruft it is now, before the next wave of innovation starts. Go to a faster architecture now, get back-compat by emulation/translation.
    Everyone wins; server users dump money into native JVMs and get speedups soon. Consumers wait and by the time the next wave of power hungry apps comes along, everyone has "gone native".

    Notice that this entire argument is based on the assumtion that the plateau will last long enough to give most of the industry a chance to go native. So I ask you; what technologies are out
    there waiting to use the power? Natural language speech recognition? Good AI in games? Immersive 3d environments?
    1. Re:Dynamic by codealot · · Score: 1
      So if there ever was a time to throw out cruft it is now, before the next wave of innovation starts. Go to a faster architecture now, get back-compat by emulation/translation. Everyone wins; server users dump money into native JVMs and get speedups soon. Consumers wait and by the time the next wave of power hungry apps comes along, everyone has &quotgone native&quot.

      We have that faster architecture. It's called Alpha. It's already 64-bit. Is there really a sound technical reason to invent something totally new all over again?

      I get the impression users don't want Alpha precisely because it isn't x86-compatible. Throwing out the cruft sounds great, but I think it worked for Apple mainly because m68k was really a lot cruftier then than x86 is now.

  39. AMD at Linuxworld 2K by Majix · · Score: 1

    AMD will is announing that they will have a live webcast from Linuxworld 2000 on the 15th. Let's hope they announce some news about new optimized compilers for Linux or something at the show.

  40. Re:Alpha uses VLIW since ye old times by SimonK · · Score: 2

    As a matter of interest: why ?

    PS. Crusoe's native IS is VLIW.

  41. This is largely irrelevant by GauteL · · Score: 3

    Part of the advantage with AMD's offering, is
    that porting from the 32bit x86 to their 64bit x86
    is MUCH, MUCH easier than porting from x86 to IA64. This means that though Intel had to start
    more than a year in advance, AMD needs much less
    time to get support than Intel.
    Besides, the OSes are the most important, but not
    everything. The applications also have to be present. And Intel does not have that much of a head start here.
    Also.. AMD's offering can run 32bit x86 applications MUCH faster and better than IA64.
    That said. I think Intels architecture looks more
    interesting. I've just got the feeling that AMD is right about the industry wanting another x86.

    Everyone says they hate x86, and most of us do hate all the legacy, but starting all over with
    a HUGE presence of applications for x86 doesn't
    seem like that good an idea.

    A point against being better at compatibility,
    is that Intel is large enough to warrant porting,
    and with Sledgehammer being good at running 32bit,
    people may not bother to port applications to 64bit x86.
    Time will tell..

    1. Re:This is largely irrelevant by Sebastopol · · Score: 1

      Part of the advantage with AMD's offering, is that porting from the 32bit x86 to their 64bit x86 is MUCH, MUCH easier than porting from x86 to IA64.

      I completely disagree. You don't simply flip a switch in your compiler and suddenly all of your data types are 64 bit. I think porting to Sledgy would be more bug-prone that porting to 'Tinny because there would be more subtle errors.

      IMHO: Since IA64 is a complete rewrite, it is under more severe scrutiny, whereas more would pass under the radar while porting to x86-64. Result: compared to vanilla ia32 OS-"X", final build "Xy" would be more robust on IA64 and buggier x86-64.

      Me, I'd rather see IA48 as a transitionary vehicle. ;-)


      ---

      --
      https://www.accountkiller.com/removal-requested
    2. Re:This is largely irrelevant by GauteL · · Score: 2

      So you're basically saying that modifying a hut
      on a oil-platform is more prone to errors than
      creating the platform from scratch? :-)

      I know... I get your point, I just couldn't help
      it, and it is a very bad analogy...

      I still disagree however, and I'm perfectly aware
      about the fact that you have to change your code
      to do this.
      I do however feel that an untested in real applications IA-64 is much more prone to child-disease than an extension to the very
      well tested x86.
      Everyone that ports to 64bit x86 will probably
      KNOW what it takes.. but people porting to IA-64
      is more or less exploring the unknown and facing
      totally new advantages and limitations.

  42. you're exaggerating a big by raistlinne · · Score: 1

    The compaq C compilers were advertised to get about a 20%-30% speed increase over gcc, and that was about a year ago. All sorts of nifty optimizations were scheduled to be merged into gcc since then.

    I've moved to an Athlon because alphas are just too damn expensive, but gcc was not so far behind digital's C compiler.

    If you want to talk about fortran, that is a different story. I think that on average the digital fortran compiler would produce code about double the speed of g77.

    Anyhow, the tremendous speed increase in the digital compiler was mostly in inefficient code. There is a very interesting (but old now) paper linked to off of alphalinux.org about how to write optimized C code. While unoptimized code would usually run a slower on gcc, the difference prettymuch disappeared when you optimized your C (things like manually unrolling loops, transposing matrices before multiplications, etc.).

    So it depends. The digital C compiler would result in unoptimized code running faster on an Alpha, and the data that I have for this was from a long time ago. What the state of compilers is now, I don't know. However, I would be extremely suprised if gcc hasn't gone a long way to catching up.

    --
    They laughed at Einstein. They laughed at the Wright Brothers. But they also laughed at Bozo the Clown. -- C. Sagan
  43. Extended IP called RIP by bored · · Score: 1

    I got a good chuckle out of the fact that AMD is calling the 64-bit IP RIP. Every time RIP gets touched it signals the end of non x86 processors. 'RISC' processors will be pushed into even narrower markets than they already are. The extra R&D money AMD has because of the volumes of x86 processors will allow them to continue to gain ground on existing RISC processors until companies simply cannot afford to make a general purpose non x86 processor for desktop/workstation/server use that competes with x86. The only place you will find non x86 processors is in embedded systems where the extra decode logic for x86 costs to much power.

    BTW: The next step for AMD after this is to build a SMT x86-64.

    1. Re:Extended IP called RIP by bored · · Score: 1

      I don't know its not SMT, but I suspect it isn't for three reasons.

      1. If their x86-64 was SMT i'm sure they would be yelling it for the world to hear.

      2. SMT usually requires some software support (unless AMD has figured out how to make it look like a real SMP) much like SMP does. The system programming sections don't describe how to turn it on.

      3. AMD doesn't have a SMP chipset for the K7 on the market yet. The only companies talking about SMT are companies which have been making SMP systems for years.

  44. Points by maraist · · Score: 3

    I didn't see any mention of 3DNow. It's been a while since I've seen talk of it.

    I _think_ that 3DNow was completely compatible with MMX, and so the reuse of the floating-point registers is all that was needed (If I could remember the name of a 3DNow op, I'd look in their table).

    What I thought was interesting, however, was that Intel's SSE instructions were incorporated. I wonder if this was an admission of failure on the part of 3Dnow (since to my knowledge SSE was superior), or if they're just trying to capture that compatibility (while at the same time, upping it's potential performance by doubling the number of registers).

    My favorite addition however was the new addressing scheme. The reduction of segment selector-dependency, plus the addition of IP-relative addressing just rocks; Finally, dynamically relocate able code.

    As a hobby, I've followed the growth of x86 hardware since the 808[68], so it's really cool to see it finally catch up to the RISC big-boys in most arenas.

    Now if they could only have provided 32 GPR and 32 FP-esk registers instead of the paltry 16 (including SSE).

    Another interesting point is that the new "xHammer" design is truly an improvement over legacy design instead of scrapping then emulating (a la Italium). Basically, by using prefix op-codes, they maintain a tremendous amount of compatibility and CPU-reuse. In fact, the CPU should hardly even notice which mode it's in (minus how it deals with the upper 32-bits). Any future advancements in scheduling design, n-way execution, etc, should benefit both "long" and "legacy" modes.

    Though I find much distaste for variable-length instructions, this is a beautiful case of human ingenuity solving a problem in an intelligent way (various NASA solutions come to mind).

    AMD is sure to best Intel at overall value at this stage (Intel may still have a few 32bit tricks up it's sleeve). My real question, however, is how well AMD will fair against finely tuned 64bit solutions. Now that x86 is infiltrating more and more of the server market, does AMD really stand a chance of competing against raw FPU or multi-processing on say Sparc / Alpha / Power / HP / etc? They seem to be fairing well in the fabrication process micron and MHZ wise. Post-RISC chips still have an edge over x86 in that little translation of op-codes is required, and the over-all die-size can be smaller to perform the same functions. This facilitates less power-consumption and theoretically higher clock-speeds. Also, to my knowledge, many op-codes in these post-RISC chips are well suited for multi-CPU design (Off hand, I remember the Alpha's version of test-and-set).

    How much life does x86 really have left in it? Can we just keep adding layers and layers of compatibility modes? And if Intel maintains a predominant market share, are they going to be able to purposefully produce incompatibilities to stifle innovation? We've already seen how they can gum up the works with RAMBUS / DDR-SDRAM and their biased chipsets.

    -Michael

    --
    -Michael
  45. Hmmm by jfern · · Score: 1
    When you do a 32-bit register add in the new "long mode", the high 32-bits are zero extended. What a pain in the ass.

  46. 52-bit physical addressing by jfern · · Score: 1

    It supports 2^52 bytes (4 petabytes=4.50E15 bytes) of physical memory, that should be enough for the next several years, but why not plan ahead at have it support the full 2^64 bytes (16 exabytes=1.84E19 bytes)?

    1. Re:52-bit physical addressing by codealot · · Score: 1

      Because the first chips will be obsolete before the need comes. More bits can be added later without changing the ISA.

  47. Excellent reference! by Alanzilla · · Score: 1

    Sadly, the other guy didn't get it.

  48. Re:64bit- oh, YEAH? by be-fan · · Score: 2

    As far as I recall, the Saturn chips don't hold a candle to the Dragonball procs in the TI8x (and the Gameboy. Interesting tidbit, the TI8x has a processor that is 6 MHz while the one in the GB is only 4 MHz, both are speced to run higher)

    --
    A deep unwavering belief is a sure sign you're missing something...
  49. When will GCC support AMD? by codealot · · Score: 1

    GCC has targets for just about all well known processor families (and some lesser known) but AMD is conspicuously absent. They are supported as x86 clones only. We have code generation options for i386, i486, pentium and pentiumpro, but no k6 or k7.

    Surely the k7 has unique scheduling and timing characterstics that GCC could benefit from. Apparently nobody has bothered to include these in GCC, and AMD isn't doing it.

    Maybe the 64-bit sledgehammer will be enough of an innovation to warrant a new backend target for GCC.

  50. Here's what AMD are doing! by Halster · · Score: 1

    IMHO

    AMD have spend many years following Intel. They've made a living, by making Intel compatible architecture.
    Even though the apprentice may have now grown up to challenge the master, AMD still feel it's not yet time to go out on a limb.

    X86 is old, and it is time for it to die the death it should've died long ago. However, what AMD are offering, as far as I can see, is a chance to go to 64bit architecture sooner, without having to create a whole new processor. Even given the increased support for AMD these days, I don't think many would be prepared to follow them that far.
    So, what we've got is a happy medium from AMD, while they and we wait for Intel to define the new standard.

    AMD may well be playing catch-up again in a million years time when Itanium actually becomes a reality. But on the other hand, if support for Sledgehammer is good, we might see some new architecture from AMD soon!

    Oh, BTW. Itanium == Crap Name. Sledgehammer == Very Cool Name!


    "How much truth can advertising buy?" - iNsuRge - AK47

    --

    "How much truth can advertising buy?" - iNsuRge - AK47
    1. Re:Here's what AMD are doing! by ackthpt · · Score: 1

      So, what we've got is a happy medium from AMD, while they and we wait for Intel to define the new standard.

      It's my sincere belief that the market drives the new standard, not the manufacturer. Before thinking AMD plays it too safe by going this route, what do you make of 8088, 8086, 80286, 80386, 80486 and pentium, seems like Intel followed a trend, why expect it to be bucked?

      What AMD is doing is establishing a standard for 64 bit in a common PC. Before anyone scoffs, consider all the 700+ Mhz Quake machines people are buying. Yeah, like hell that's for homework or office work at home, sure...I believe you, you don't have to lie anymore.

      Vote Naked 2000

      --

      A feeling of having made the same mistake before: Deja Foobar
  51. Because AMD are Peter Gabriel fans? by leonbrooks · · Score: 1

    Why do you think it's called SledgeHammer in the first place???

    Because someone, somewhere in AMD got thoroughly stoked on Peter Gabriel songs? Might I even go so far as to say "stoked, big time?"

    Alternatively, it may be because the crackers would ordinarily go nuts when they have that much horsepower on tap for DDoS attacks, so AMD are pre-empting them: everyone knows you don't drive crackers nuts with a sledge hammer.

    All right, so the pun was stretched. It's morning here, OK? (-:

    --
    Got time? Spend some of it coding or testing
  52. Pathetic! by Poligraf · · Score: 1

    Does the name Larry Ellison ring a bell to you ???

    --
    Tigers respect lions, elephants and hippos. Maggots respect no one. (C) S. Dovlatov
  53. Why not emulate the x86? by ash5g · · Score: 1

    What I want to know is why don't someone like intel or AMD sponsor something like bochs? Then there would be no need for backwards compatability. Need to run your old apps? Use an emulator. It would probably be much cheaper than designing a chip to run around the x86 architechure.