That would make a Pentium a 64bit processor, which it is not. The 17 bytes you speak of includes data, correct? (ie opcode data data data data data) The opcode itself is much shorter than that.
Re:Are they patenting bus-snooping L1 caches???
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New Transmeta Patent
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I also got the impression they patented every conceivable caching method on their code-morphing system by simply being vague.
Just to give an example to those that don't know, their method could easily be a write-through or write-back caching policy, depending on how you interpet the speed of keeping the data consistent. Write-through caching updates data in memory immediately, while write-back updates periodicly, with the changes being stored in a buffer. These are two simple (and popular) methodoligies which can be found in many if not all computer engineering texts.
If it were not limited to their reconfigurable instruction set computer, I'd think they would have some serious issues with prior art (IMO).
Slashdot Mirror
AIM Filter being the program that, if not a trojan, at least has various remote access abilities.
See the bugtraq archive for more information.
Amusing that its use is recommended in the security advisory.
You might want to take a look at OpenCMS. http://www.opencms.com
That would make a Pentium a 64bit processor, which it is not. The 17 bytes you speak of includes data, correct? (ie opcode data data data data data) The opcode itself is much shorter than that.
36 bytes per register?? I think bits. And processors are usually categorized by bits per instruction.
As for google not coming up with anything, bah.
By the way, the cat is also being distributed to all subscribers of Forbes magazine; the FAQ is here..
The 'official' site is www.getcat.com.
I also got the impression they patented every conceivable caching method on their code-morphing system by simply being vague.
Just to give an example to those that don't know, their method could easily be a write-through or write-back caching policy, depending on how you interpet the speed of keeping the data consistent. Write-through caching updates data in memory immediately, while write-back updates periodicly, with the changes being stored in a buffer. These are two simple (and popular) methodoligies which can be found in many if not all computer engineering texts.
If it were not limited to their reconfigurable instruction set computer, I'd think they would have some serious issues with prior art (IMO).