The numbers sound pretty reasonable to me. Bear in mind that the the Emotion Engine is capable of 6GFlops, and that clocks at 300MHz - it does it by using 2 4-wide multiply-add units which can both issue every cycle (and for purposes of Flop-count you get to count both the multiply and the add), plus some dividers and other stuff.
I know zilch about chip design, but I guess if they lengthen the instruction pipeline and have good processes there's nothing stopping them ramping up the clockspeed in 2004 to what's achievable for the P4 today (say 2.4GHz), giving an 8x speedup, and a lot of graphics and physics code can be written with a relatively low branch density so doesn't suffer too badly from pipeline length (e.g. the DX8 vertex-shader). Or they could just put more (or wider) SIMD multiply-adders on each CPU and increase the instructions per clock.
16 chips * 8x speedup * 6GFlops = 750+ GFlops
In fact, I'd be surprised if that was so far ahead of the PC graphics cores of that time. Massive parallelism and deep pipelines are the key in both cases, NVIDIA are currently claiming 1.23 trillion ops/second for the GeForce4 Ti4600, and floating point pixel shaders are on the way...
The interesting questions are how they're going to get the memory bandwidth to feed this monster, and what they'll do with all the heat.
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The numbers sound pretty reasonable to me. Bear in mind that the the Emotion Engine is capable of 6GFlops, and that clocks at 300MHz - it does it by using 2 4-wide multiply-add units which can both issue every cycle (and for purposes of Flop-count you get to count both the multiply and the add), plus some dividers and other stuff. I know zilch about chip design, but I guess if they lengthen the instruction pipeline and have good processes there's nothing stopping them ramping up the clockspeed in 2004 to what's achievable for the P4 today (say 2.4GHz), giving an 8x speedup, and a lot of graphics and physics code can be written with a relatively low branch density so doesn't suffer too badly from pipeline length (e.g. the DX8 vertex-shader). Or they could just put more (or wider) SIMD multiply-adders on each CPU and increase the instructions per clock. 16 chips * 8x speedup * 6GFlops = 750+ GFlops In fact, I'd be surprised if that was so far ahead of the PC graphics cores of that time. Massive parallelism and deep pipelines are the key in both cases, NVIDIA are currently claiming 1.23 trillion ops/second for the GeForce4 Ti4600, and floating point pixel shaders are on the way... The interesting questions are how they're going to get the memory bandwidth to feed this monster, and what they'll do with all the heat.