The principal benefits are related to the manufacturing process (it's cheaper to manufacture a dual core than it is to manufacture 2 single core chips) and to the integration between the 2 cores for access to I/O and leveraging cache at certain levels. The bus between the 2 CPU's in a dual core can be faster because of the 90 nano manufacturing.
It's not about gaming, AMD themselves indicated that gamers should stay on the single core. It's about business processing where, for example, Oracle might benefit from a faster cache-coherent environment.
I am not an engineer, but in my business, we are always looking for the dual (and beyond ) cores because they are faster, cooler, and consume less resources (power, space, etc.) than their single core counterparts.
Actually,
It really doesn't matter what they put on the air on Friday night, it's ratings will suck. Prime-time Saturday may be worse, but not by much.
It would be interesting to put it into a slot that had potential to perform OK, but ratings are kind of like credit: you have to have some to get some.
The Star Trek series probably needs some infusion, beyond the current level, of the additive that has been used throughout all ST series, more titillating scenes with sexy crew/aliens. They started on that path last year with a particular Klingon, but for some reason, moved off the dime and started to make melodrama out of something that should have been simple.
I don't intend to be shallow about this, but basically, that's what has been used in all of these series, from Uhura to 7of9, to get them over the ratings hump.
I suspect it would be one or more of these: # U.S. Patent No. 4,860,192 entitled "Quadword Boundary Cache System" Issued: 8/22/1989 # U.S. Patent No. 4,884,197 entitled "Method And Apparatus For Addressing A Cache Memory" Issued: 11/28/1989 # U.S. Patent No. 4,899,275 entitled "Cache-MMU System" Issued: 2/6/1990 # U.S. Patent No. 4,933,835 entitled "Apparatus For Maintaining Consistency Of A Cache Memory With A Primary Memory" Issued: 6/12/1990 # U.S. Patent No. 5,091,846 entitled "Cache Providing Caching/Non-Caching Write-Through and Copyback Modes For Virtual Addresses And Including Bus Snooping To Maintain Coherency" Issued: 2/25/1992
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The principal benefits are related to the manufacturing process (it's cheaper to manufacture a dual core than it is to manufacture 2 single core chips) and to the integration between the 2 cores for access to I/O and leveraging cache at certain levels. The bus between the 2 CPU's in a dual core can be faster because of the 90 nano manufacturing. It's not about gaming, AMD themselves indicated that gamers should stay on the single core. It's about business processing where, for example, Oracle might benefit from a faster cache-coherent environment. I am not an engineer, but in my business, we are always looking for the dual (and beyond ) cores because they are faster, cooler, and consume less resources (power, space, etc.) than their single core counterparts.
Actually, It really doesn't matter what they put on the air on Friday night, it's ratings will suck. Prime-time Saturday may be worse, but not by much. It would be interesting to put it into a slot that had potential to perform OK, but ratings are kind of like credit: you have to have some to get some. The Star Trek series probably needs some infusion, beyond the current level, of the additive that has been used throughout all ST series, more titillating scenes with sexy crew/aliens. They started on that path last year with a particular Klingon, but for some reason, moved off the dime and started to make melodrama out of something that should have been simple. I don't intend to be shallow about this, but basically, that's what has been used in all of these series, from Uhura to 7of9, to get them over the ratings hump.
vi KDE no! pirate, of course, arrr
I suspect it would be one or more of these:
# U.S. Patent No. 4,860,192 entitled "Quadword Boundary Cache System"
Issued: 8/22/1989
# U.S. Patent No. 4,884,197 entitled "Method And Apparatus For Addressing A Cache Memory"
Issued: 11/28/1989
# U.S. Patent No. 4,899,275 entitled "Cache-MMU System"
Issued: 2/6/1990
# U.S. Patent No. 4,933,835 entitled "Apparatus For Maintaining Consistency Of A Cache Memory With A Primary Memory"
Issued: 6/12/1990
# U.S. Patent No. 5,091,846 entitled "Cache Providing Caching/Non-Caching Write-Through and Copyback Modes For Virtual Addresses And Including Bus Snooping To Maintain Coherency"
Issued: 2/25/1992