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It'll be interesting to see how it compares to the SiByte SB1, which a MIPS64 instruction set SOC with two cores.

really I dont know why SGI dont use this chip
RM9000x2 [pmc-sierra.com] its got HYPERTRANSPORT like the AMD chips and the ol SysAD bus and Supports DDR SDRAM

Well the first reason would be that it's not actually realeased yet. PMC-Sierra has been talking about this chip for a long time, but they're still not in production on the 1Ghz model. Plus the cost is expected to be pretty substantial.

And if anybody's thinking of Sibyte's Mecurian, this chip has only been released at the first few speed grades, not 1Ghz, and because of its architecture it will severely lag behind the RM9000x2 even when it is ramped up.

Regardless, even if the RM9000x2 were available in quantity today, there's a lot more to a computer system than just the processor. SGIs new line is designed well for its intended purpose.

- j

HyperTransport and RapidIO are mostly designed for the telecom market right now, as is that bridge from API Networks. The MIPS processor is the major driving force behind HyperTransport in this area right now, and they've been making some serious inroads on what has mostly been PowerPC territory in the past (PPC being the driving force behind RapidIO).

Some other interesting parts with HyperTransport include PMC-Sierra's new 9000x2 processor with two 1GHz MIPS cores, and Sibyte's similar Mercurian processor.

It's processors like these that require the serious speed and low-latency of HyperTransport. It will be interesting to see how these technologies filter down to the PC market after a few years.

- j

HyperTransport and RapidIO are mostly designed for the telecom market right now, as is that bridge from API Networks. The MIPS processor is the major driving force behind HyperTransport in this area right now, and they've been making some serious inroads on what has mostly been PowerPC territory in the past (PPC being the driving force behind RapidIO).

Some other interesting parts with HyperTransport include PMC-Sierra's new 9000x2 processor with two 1GHz MIPS cores, and Sibyte's similar Mercurian processor.

It's processors like these that require the serious speed and low-latency of HyperTransport. It will be interesting to see how these technologies filter down to the PC market after a few years.

- j

There's potential for MIPS too: there are lots of vendors bring out some very impressive 64-bit MIPS processors. PMC-Sierra has their new RM9000x2, SiByte has something similar and NEC has some 64-bit offerings as well. Granted all of these chips are targeted at the telecom/datacom market but the technology could be adapted for use in servers if necessary. Still, it is sad to see the Alpha go.

- j

x86 makes for losy controller cause Intel and AMD microprocessors don't handle low-latency I/O very well. If you are building something that really needs to crank, you need a real I/O controller. Something like Sibytes mercurian probably will do the trick. You can run a MIPS linux on it and its low power (approximately 10 Watts). Its a MIPS64 instruction set. The thing has an interprocessor bus that can crank out like 128Gb/s.

I can say from experience that a line-rate OC-12 ACL list is quite feasable, and in fact OC-48 (2.4Gbps) is quite feasable with today's technology.

Some of the new Network Processors are absolutely astounding in terms of what they can accomplish. Take for example the Agere network processor. It has no problems doing ACL at OC-48. Or the Sibyte network processor, with dual 1GHz MIPS cores running Linux, which should be more than fast enough to handle OC-12.

The Mercurian processor SB-1250 mentioned yesterday has a peak rate of 16 GFLOPs (with only two processors on the chip) vs 12.8 Gig Fixed point operations. This 128 way fixed point stuff is much less impressive/useful in comparison.