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Cyrix's 'Joshua' announcement

Posted by Hemos on from the trying-to-redeem-themselves dept.

h0rus writes, "One of the guys from Ars went to Cyrix's unveiling of their new x86 chip, the Cyrix III (codenamed "Joshua"), and wrote up a summary of what was announced. The chip looks like a pretty sweet budget/mobile x86 option: 64K L1, 256K L2, dual-pipelined FPU, Socket 370 compatible, and not clock-locked. Maybe Cyrix can redeem their name with this one. "

11 of 213 comments (clear)

  1. About Cyrix. . . by WD · · Score: 5

    Don't get me wrong here. . . I'm very glad Cyrix is here. As we've learned from AMD, more competition = better products at better prices!

    BUT, Cyrix has a habit of over-hyping products that seem to fall flat in the end. I was a 6x86 owner, since it was all I could afford at the time. The Cyrix name has been tarnished by chips with incompatibility and performance issues from the beginning.

  2. FPU performance by MinaInerz · · Score: 3

    Cyrix's typical problem, just like AMD had until the Athlon, was its dismal floating point unit. Intel's fully pipelined FPU made the AMD/Cyrix/Winchips, etc, look really bad, and as such, since the Pentium, they've always been "value" CPUs, and not "performance" CPUs. Now I've yet to see official benchmarks on the VIA Joshua processor, but from people who have seen some of the pre-production chips, it doesn't look too promising.

    I'm guessing that this chip will be a decent competitor to the K6 series of CPUs, but maybe that's just wishful thinking - Cyrix CPUs have traditionally had some unusual defects in them, that even later steppings didn't fix.

    "Human beings were created by water to transport it uphill."

    1. Re:FPU performance by dan+the+person · · Score: 3

      http://www.viatech.com/products/cyr3faq.htm
      . Will the VIA Cyrix® III work in a multi-processor motherboard?
      A. The VIA Cyrix® III will not work in a multi-processor motherbaord unless it is the only
      processor installed. If the motherboard supports the 2.2V core voltage and FSB, then it will
      work in a stand alone configuration.

  3. Cyrix user by Pike · · Score: 3

    My current computer is a "PR" 166 Cyrix chip. This (non-mediaGX) system is very trusty and reliable, but not incredibly fast. I did build a mediaGX system once, and man that thing was not only slow and ugly, it gave me all kinds of stupid problems besides the fact that the first motherboard they sent was defective.

    My next machine, after I have worn this one out plenty, will be a Crusoe-powered laptop. I have seen the light: the days of big, ugly tower cases for workstation users are numbered. Traditional cases make sense for servers, but hey! who needs expansion slots or serial ports anymore? Most of the technology has plateued and doesn't need to be upgraded often anymore (cpu speed, sound cards, video cards, ethernet, etc.) So why not by a small, fast mobile laptop??

    This chip is mildly interesting but it doesn't look like it will be able to compete anywhere. It's main use will probably be as an upgrade to old PGA machines at some point. Quite a narrow market.

    JD

  4. A rant and a wierd idea by cybergremlin · · Score: 5
    First of all the PR raiting scam is just that, a scam. When I sold PCs customers would look at a cyrix233 and think that it ran at 233MHz. They would then see sub par proformance on a game that wanted a high MHz rated pentum and think that they got a lemon. What they did not understand (often even after a lengthy expanation) was that the chip did NOT actualy run at 233MHz. These cyrix emachines were embarasing to have on the sales floor. The constantly crashed and blew chunks when it came to game play. End of rant

    Second Item
    Here is an interesting idea (altho I doubt that it will ever happen): Motorola could buy cyrix (or better yet Transmeta) and gain access to the x86 market. They already make the chips for Macs, Palms, and many wireless devices. Transmeta looks like it may present a threat to Motorola's handhend dominance. This is especialy true if the Transmeta's chip can be set up to emulate a 68000, the chip that Motorola makes for the PalmPilot. Right now everytime someone buys a Palm Pilot it is money in Motorola's pocket. There are plenty of reasons not to do this of course (like cyrix's rep stinks to high heaven and no one has made it profitable) and I dont think the Motorola is in the mood for a radical change to their product line.

  5. Cyrix? Oh... I remember them by Chemical · · Score: 5
    I remember when I went to Fry's to get some new components. The salesman (ever talk to a sales person at Fry's BTW) told me to go with the Cyrix 6x86 166 instead of a genuine Intel Pentium. He said that they cost less, offer full compatability, and offer better performance than Intel.

    It turned out only one of these things were true. It did indeed cost less. But then again you get what you pay for. I remember I had such a hard time with a lot of software, only to call up tech support and find out that the product isn't Cyrix compatable or it needed a patch or something. One peice of hardware I bought (soundcard or something) turned out to be incompatable with Cyrix processors. Not only that, but performance was terrible. Sure it was a nice upgrade from my 486, but compared to actual Intel machines I used, it was pretty bad. Not only that, I found out later that their 6x86 '166' wasn't actually 166Mhz. It ran at 133 and had "special features that make it run as fast as if it were 166Mhz". What a clever marketing scheme. Intel should do that too: Come out with the Pentium 1.2Ghz that only runs at 800Mhz but has "special features" so it runs as fast as if it were 1.2Ghz.

    In conclusion, I vowed to never buy another Cyrix processor as long as I may live. I advise others to do the same, and not to believe their hype. Remember what they delivered in the past, and that history often repeats itself.

  6. Re:Go Cyrix! by Manaz · · Score: 5

    On the contrary - I think it's time the old monopoly was closed down, and we were introduced to something we haven't had in a LONG time in the consumer PC processor market - choice.

    Cyrix/Via (with Joshua), AMD (with the K6-3/K6-2+) and Intel (with the Celeron) it would appear now ALL have Celeron-class (for want of a better term)processors in the marketplace - for the first time - all aimed at consumers.

    While AMD and Intel are battling it out in the medium-high end market (P3 & Athlon) and AMD are soon to release top end processors to compete with Intel's Xeons, we now have a 3 way (and possibly 4 way if you include Transmeta) battle for the low end market.

    We should be getting better products for less money as a result of this, as each manufacturer attempts to gain market share - and this can only be a good thing.

    Well done Cyrix/Via.

  7. Here are some *BETA* benchmarks by Lethal_Geek · · Score: 3
    FiringSquad has a benchmark of q3.

    FiringSquad's Article

    Too bad this cyrix chip looks as bad as the others, even though the silicon is still beta. I doubt this thing will be on the same level as a Celeron. Unless it is alot cheaper to get ahold of, I'd say screw Cyrix as always. :( Lethal Geek

  8. For what it's worth by Bryan+Ischo · · Score: 4

    I have built two systems with Cyrix chips:

    1) A PR-200 in July of 1997 for my sister as a wedding present. It is still running strong and they use it almost every day. When I ask them if they want to upgrade, they ask why. Seems that the Cyrix 200 is still fast enough for them. Even Tomb Raider III runs well on it (with the original VooDoo card that I put in it).

    2) An MII-300 last year for my neighbor, in a system that I gave them as a gift. They think it's plenty fast also.

    Neither have had any problems whatsoever, except for the MII-300 which started crashing a few months after I foolishly overclocked it to 333. I clocked it back down to 300 and it was fine.

    Also, my friend built a system with a PR-166 years ago that still works great (although it seems slow as molasses now).

    Cyrix have great integer performance and a phenomenal price/performance ratio. Sure their floating point is lousy (or at least was), but who cares? So what if my Quake III can't draw frames faster than my monitor refresh? Even a Cyrix 200 is a decent gaming platform for most people.

    BTW I am an AMD guy myself, have a K6-233, K6-2 300, and K6-III 400. Next upgrade will be an Athlon, of course.

    1. Re:For what it's worth by maraist · · Score: 3

      There are so many factors to performance it's not funny. You have the classical memory BUS speed, the periferal bus speed ( if you're overclocking, or have a strange multiplier ), you have your MB chipset buffering scheme ( how many delinquent requests can it keep going ). You have the performance of the chipset itself. Of course you have the huge variable of different periferals strenths and weaknesses which pull you every which way but sunday. Then of course you have hardware drivers which tend to be optimized for specific processors ( the norm being intel, but in some circumstances, like AMD's 3DNow for Voodoo's Glide ).

      Then inside / around the CPU you have cache, which is a HUGE variable. You have the raw MHZ speed, you have the pipeline depth, and the latency, both of which are negatively affected by larger caches ( due to address resolution logic ). Then you have the port deth ( how many parallel accesses can the cache access ). And finally the size and bandwidth of the cache. AMD / Cyrix have gone with bigger but lower performance caches, while Intel has gone with more complex but smaller caches. Hypothetically, a larger, simpler cache will be cheaper to design, but will take up more surface area, and thus provide lower yield. To make matters worse, some programs require high speed access to a very small data-set ( and thus benifit Intel ), while other applications just use a lot of data, and anything that minimizes main memory access boosts speed. I believe Quake qualifies for the former, while Office apps ( and scripting languages in general ) benifit the latter.

      AMD and Cyrix also, for a while there, worked at enhancing the internal instruction flow algorithms. Making huge branch prediction buffers, and in the case of Cyrix, producing all sorts of algorithmic optimizations that Intel strangely didn't implement.

      I believe the main reason AMD and Cyrix didn't work as hard at their FPU was because it's a _really_ ugly design project. It's more fun to work on general purpose flow design and playing and tweaking a simplistic cache design, than to get dirty with all the possible combinations of floating point logic ( especially one as ugly as the 8087 family. I believe Intel owns several patents on some highly optimized implementations, so the others would have to devote some big bucks to tweak theirs without violating any laws. Not to mention, making it faster often times means taking up more silicon. Thus you have a larger die ( thus lowering yields ) and the logic is expensive to design / debug / implement to boot.

      The next issue was latency. Intel, with the 80686 line ( I hate their non-informative naming conventions ), went super-pipelined, which worked great for sequential operations, but performed horribly in random branching contexts. AMD and Cyrix both opted for a narrow pipe-depth, with an emphasis on branch prediction. Thus even failed predictions had minimal penalty.

      The fastest possible processor will be non-pipelined and have n-wide execution components. The reason being that each pipeline stage introduces a store and forward delay. Some stages may perform minimal operations, thus wasting 75% of a clock tick. This really hurts data-dependancy delays, since a pipelined FPU might take 15-150% longer to complete a Divide which the very next instruction requires. If all other data-dependacy paths are blocked, all the pipelining in the world won't do you any good. In the integer world, this is very common. I'm about to perform a cache missed memory fetch, but first I must calculate the address. If every other instruction is based on the contents of that memory cell, then pipelining can only hurt this particular case.

      The biggest opponent to complex and optimized operations was that they would slow down the rest of the processor ( by requiring slower clock ticks ). But the device manufacturers are learning how to make different parts of the CPU run at different frequencies. ( They've long since learned how to run the BUS at a fraction of the Core ). Intel's next 80686 processor varient will have a clock doubled integer core, for example.

      Still, the main reason we don't see a return to complex optimizations is that having 32 ADD components is extremly more expensive than having 2 16 deep add components. Even though you'll get a significant performance boost ( assuming you can manage that huge bus, and a potentially large number of register ports ), you probably won't make up for the added expense in shere complexity and yeild loss ( due to extra size ).

      Thus, Intel went for a partially pipelined FPU which had heavy latency penalties, but improved overall operations ( especially for non data-dependant operations ).

      AMD Finally headed this off by making multiple independant and fully pipelined FPU's in their Athalon. ( they spent the extra bucks to remove many of the stalling conditions caused by sharing of resources by seperate components ).

      Personally I like SUN's java-multi-threaded CPU concept ( even if it never succeeds ). Basically, you have 4 parallel fully functional, non-related, non-pipelined, fully optimized functional units. There are no resource contention issues, no scheduling problems, a simplified logic design. And it's cheaper because you take away pipelining. The best part is that each of these extrememly simple components are just cookie cuts. You spend all your time tweaking the hell out of one tiny unit, then make 32 copies. Almost as easy as cache design.

      I believe the Crusoe could learn from this. They already have their simplified design, they could take it a step further. Say, keep a single CPU implementation for power-critical devices. Then replicate that core 8, 16 or 32 times for a desk-top varient. Since you can control your wrapper code, you can determine what is the optimal CPU-width. I'm sure there are many cases that would allow you to submit 32 parallel instructions ( at least for the compiler ).

      --
      -Michael
  9. Re:SMP? by florin · · Score: 3

    You can probably forget SMP. Neither Cyrix nor any of the other X86 clone makers has ever made any chips that included the local APIC (Advanced Programmable Interrupt Controller) component that is necessary for Intel style multiprocessing. You need this to be able to allow more than one CPU to handle interupts. Since Intel reserved all rights to that technology strictly, AMD and Cyrix agreed on a competing standard instead and called it OpenPIC. But unfortunately so far no chips or motherboards ever materialised that adhered to that specification. If this chip has any sort of multiprocessing ability, which I seriously doubt, it likely won't be compatible with the Abit's I/O APIC.

    There's a small chance that the combined sum of the various technology exchanges that VIA, Cyrix and in particular National Semiconductors have had with Intel over the years might have changed this, though. Look at how Cyrix is assuming that those crosslicenses are transfered onto them now that they were first bought by NS and then VIA. That's why they're using Intel's GTL+ bus, for instance, which AMD never dared. Maybe NS owned rights to the APIC too. But still that's all too late for Joshua's design anyway, and actually someone asked a Cyrix support person about this a while back and she said pretty sure no SMP.