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Anandtech Looks At 'Celeron 2'

Oscarfish writes, "Anandtech has the scoop on the new batch of Celeron chips hitting the market. They're more or less Coppermine chips with half the L2 cache removed, so you basically have a Coppermine core with 128K L2, a 66MHz front side bus, and FC-PGA packaging. A decent choice for the "Value PC" segment, he says, but not for performance machines. "

3 of 82 comments (clear)

  1. More on the Celeron 2 by Oscarfish · · Score: 5

    Here's a HardwareCentral review of the Celeron 2 (today must be the day NDAs were lifted; look for other butt-kicking sites like Thresh's and Sharky's to maybe have something on it later today.

    Here's BP6.com, an excellent reference for those of you with that funky Abit board. Check out the video preview of the Powerleap FC-PGA adapters - basically they plug into Coppermines and allow two of them (new stepping ONLY) to run in SMP mode. Of course, your BP6 would be running at 100MHz FSB by default - and overclocking well past 100MHz (which is what is required to unlock the true potential of Coppermines) is flaky on any BX board.

    Coppermines seem, for me, an excellent buy. I have a 500E running at 733Mhz (147MHz FSB) on an MSI MS-6309 Apollo Pro 133A board. Excellent performance, and super stable.

    The 66MHz FSB for these new Celerons is a double-edged sword. It's good that the 66MHz+ gap is open, which is really what made the original Celerons such good overclockers; but besides the performance hit (naturally), the lower FSB means a higher multiplier. The internal multiplier (locked by Intel) for the 600MHZ Celeron 2 is 9.0x. That's ass-high, people. I don't think many motherboards currently support that. At the very least I think a BIOS upgrade is in order, unless you're absoluely sure the board can handle that high a multiplier - but getting back to the performance hit, not only is your memory, etc. running at only 66MHz, but with the high multiplier your chip is running 9 times faster than your system. That's a low of waiting on its part.

    My advice? Get a 500E or 550E (both can be had for around $200, if you know where to look) and overclock them beyond insanity. 150MHz FSB is not out of the question for these chips, especially the ones with the new core stepping. I'll be going for a 600E (FC-PGA) as soon as school lets out for me for the Summer.

    For a truly bent journalistic look at the Coppermines, check out this piece I wrote for the fantastic Overclockers.com over Winter Break.

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    Oscarfish.com: tropical fish with attitude. Way t

  2. The problem with different amounts of cache... by alexhmit01 · · Score: 5

    The trick to caching is that it speeds up repeated access to the same data or accessing data in nearby segments of memory.

    When you are optimizing memory locations in your code (the OS or the applications), you optimize for vitual memory page sizes for memory usage, and for cache sizes to make sure that your application gets the most use of the cache as it can.

    In a world where we get precompiled binaries (ideally you could teach the compiler to optimize for the different levels and compile it for different amounts, additionally programmers could put flags in their code for the different optimizations), how to we optimize our applications?

    If the Celeron2 becomes really popular, then we optimize for 128K and 256K machines or 512K machines get little to know benefit from their larger caches. If we optimize on 256K or 512K, our smaller caches may get unacceptable cache miss rates and suffer poor performance.

    The idea behind this is that 128K is aleady ~95% cache hit rate, and doubling the cache only gives small improvements. However, when Pentium Classic machines used to ship with 512K on the good boards and K6s and K6-2s were shipping on mobo with 1MB cache, why are we now switching down the amount for higher speed? I understand why it is faster (90% of L1 no slow down, 95% of L2 1 missed cycle; faster than 90% of L1 no slow down, 98% or 99% L2 of 3 or 4 missed cycles and memory access is 6-8 missed cycles)? Are our programs out there optimized for the older "larger" caches or the newer, "smaller" caches. It seems like we are going to see less and less advantage to the expensive systems with lots of cache when we are optimizing for the workstations with much less cache.

    Alex

  3. Intel has a problem... by tjwhaynes · · Score: 5

    From where I'm sitting, Intel currently has an interesting problem. Their flagship processor line, the Pentium III Coppermine, tops out at 1GHz . But there aren't that many around, and the current crop of PIIICu's seem to top out at 800MHz. Overclockers can squeeze this up a bit, but it seems that the PIIICu's in the shop are close to their limits anyway. Celeron's have always proved to be seriously overclockable - most 500MHz will go to 600MHz plus, which leads me to believe that Intel is not being anything like as strict in the CPU speeds it's binning its processors into.

    In other words, the Celeron processors are not being tested hard as they come off the production line as there is an adequate supply of the speeds that Intel wishes to see. Why doesn't Intel want it's Celerons to be sold as close to the limiting speeds as possible? In my opinion, it's because they don't want to eclipse their PIIICu flagship chips with Celeron chips running at the same clockspeed as this would dilute their market with their own product.

    So what you cry? None of this would matter so much if AMD wasn't quietly pulling ahead in the high-speed chip fabrication stakes. With the Athlon coming off the production lines at clock speeds 850, 900, 950 and 1GHz, there is considerable pressure on the PIIICu's to remain visible in the marketplace, since they are the direct competitor to the Athlon. The Celeron 2 looks to be throttled by it's bus speed (66MHz?) in comparison to the Athlon at 200MHz, and won't compete in heavy memory fetching tasks, such as games, art programs, complex DTP etc. Until Intel can successfully ramp up the speeds on it's headline brand, the increasing speeds of the Celerons and Celeron 2's present an interesting dilemma.

    Cheers,

    Toby Haynes

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    Anything I post is strictly my own thoughts and doesn't necessarily have anything to do with the opinions of IBM.