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What Will Be The Next Generation Of RAM?
Wister285 asks: "I've been hearing a lot about new RAM technologies. Two of the main new forms seem to be RDRAM and DDRAM. Little known to a lot of people currently though is MRAM (magnetic RAM that works more like a hard drive than an electric memory saver, which means that RAM memory is never erased until the computer says so, even through power offs). MRAM seems to be the best form of RAM, but it might not be out for another 1 or 2 years. With these three choices, what is the next generation RAM?"
One of the ways you can avoid having a problem like this is to use a log-structured filesystem, which simply writes the data in one long loop around the device, rather than always starting at the beginning of the device. The exact details escape me, but the general idea is correct.
One of the new Linux filesystems, JFFS (journalling flash filesystem) does this, I believe. It was accidentally added to the 2.4 development kernel recently when one of the developers working on a flash driver submitted a patch to Linus, and forgot to remove the JFFS code from his patch... (Please, no flamewar about reiserfs here, there was enough on lkml already).
Yes, we do.
Look at it this way: you could program the BIOS to always erase the memory on POST, *unless* there was a power faillure (modern ATX supplies can already detect this I believe)
So when you reboot on purpose, everything will be erased, but when power fails, you'll lose nothing!
This also makes creating a hibernation function much, much easier - no more need for a large image file on your harddisk, just let the BIOS know it should *not* erase memory contents after next reboot.
Every expression is true, for a given value of 'true'
MRAM has the disadvantage that it can be erased by a strong magnetic field.
Amorphous silicon RAM works by melting the switch element and refreezing it, either so it crystalizes and is very conductive (but still resistive enough that you can remelt it) or becomes glassy and very resistive (but with a "breakover" voltage that lets you drive current into it to remelt it). Selection is by the length of time the write current is on, and thus the amount of heat deposited in the meltable bit.
Magnetic fields won't touch it. EMP strong enough to affect it will fry the whole box anyhow. Ditto heat.
Write time is in single-digit nanoseconds. Read is as fast as ROM.
(But will it ever come to market? Same question for MRAM.)
Bantam Dominique roosters crow a four-note song. Once you've heard it as "Happy BIRTHday" you can't NOT hear it that way
Just a clarification: when referring to RDRAM, RAMBUS decided that PC800 means 800MB/sec, not 800MHz, so it isn't really running that fast.
Just a clarification: you are completely wrong. The various types of RDRAM do in fact refer to their clock speed, not their bandwidth. PC800 does indeed refer to 800MHz; as RDRAM is 16-bits wide per channel, this means PC800 has a theoretical maximum bandwidth of 1.6 GB/s. By way of comparison, PC133 SDRAM is 64-bits wide and 133 MHz, and so it has a max bandwidth of 1.1 GB/s.
So, to reiterate, you're wrong. Now, however, it begins to get confusing. First off, PC800 RDRAM isn't really running at 800 MHz; it's running double data rate--transmitting twice per clock--at 400 MHz. As far as the PC industry goes, it's an acceptable fudge, and not nearly so bad as Intel saying the double-wide double data rate 100 MHz FSB on the P4 is "400 MHz".
Then it gets even more confusing. See, it turns out that PC 700 RDRAM actually runs at 2x356=712 MHz most of the time (good!) whereas PC 600 RDRAM actually runs at 2x266=533 MHz most of the time (bad!). This has to do with the vagaries of timing these cobbled together brands of RDRAM (only marketed because the yields on PC 800 were so awful) to run with 133 MHz FSB chipsets. If run on a 100 MHz FSB chipset--which they never are--they will run at their advertised 600 and 700 MHz rates.
So...in order to get rid of all this confusion but keep the handy-dandy "PC___" designation (and to one-up Rambus in the "my number's higher than yours" game), JEDEC has decided that from now on all its DRAM standards will be numbered based on their maximum bandwidth rather than their clock speed, actual or DDR or otherwise. Thus, the DDR we will see in DDR motherboards in a couple months will either be branded PC1600 (2 x 100 MHz x 64-bits) or PC2100 (2 x 133 MHz x 64-bits).
All done? Not hardly. It turns out that the first generation of PC2100 will have higher latency timings for the various stages of a random access than will PC1600, thus making it slower in certain situations while faster in others. Of course, within a couple months, lower latency PC2100 will be around, which may or may not be designated PC2100A. See how this all helps the customer and makes things easier???
Of course, the DDR for graphics cards is categorized neither by its maximum bandwidth nor its clock rate but rather by its clock period: i.e. 2x166 MHz DDR is called "6ns DDR" when its on a video card (because 1 second / 6 nanoseconds = 166 million); 2x183 is 5.5ns, and the new GeForce2 Ultra's are shipping with incredible 2x250 MHz 4ns DDR SDRAM.
And, of course, any and all of the above DRAM is overclockable to any speeds and latency timings you want; it's just only guaranteed to work at the marketed speed. Oh, and how fast any of this all is depends just as much on your chipset and, in the case of RDRAM, your power consumption settings. (Even if you're plugged into the wall, don't be too profligate with those power settings or the whole thing will overheat!)
And I forgot to mention VC SDRAM, which is available now, and FCSDRAM, eDRAM, DDR-II and DDR-IIe, any of which might/will make the jump to PC main memory in the coming years (at least before MRAM). Isn't it all so simple now?? Good.
Apologies for the uber-post, but man this discussion needed an injection of information.
:)
Myth #1: It's Rambus vs. DDR vs. MRAM. It's been mentioned before, but bears repeating: MRAM will not be the next generation memory technology. It will at best be the next-next-next generation memory technology, as it's at least 5 years from commercial viability. However, I'd guess that even in MRAM's wildest dreams it will take longer than that before it ever makes it to PC main memory; first, it will be used as a replacement for what it is actually most like--not DRAM, but flash memory. While it has the potential to maybe one day be faster, smaller, and cheaper than DRAM, until then it will only be used in those places where its most important attribute--nonvolatility--is actually necessary.
Furthermore, there are any number of exotic competing technologies which are a) going to make it to market first and b) actually aimed at the PC main memory market. These include:
VC SDRAM: like SDRAM with a small SRAM cache--already available, but with disappointing performance, due to a bad implementation of a good idea; don't count it out in a future incarnation
FCSDRAM: which allows a more efficient ordering of access requests to cut down latency
DDR-II: the packet-based successor to DDR SDRAM, and the probable next standard
DDR-IIe: DDR-II with caching technology similar but superior to VC SDRAM's
and eDRAM: an exotic technique for putting DRAM directly on a microprocessor, which allows for extraordinary bandwidth and tiny latencies but requires an entirely new manufacturing process.
In any case, the above are not mutually exclusive (indeed, RDRAM is a DDR type of SDRAM), and I wouldn't be at all surprised to see some VC/e FCDDR-II be the PC main memory of choice in a couple years. (It'll have a better name, though
Myth #2: DRAM bandwidth is holding back the performance of today's PC's. Actually, the problem is not in the DRAM chips but rather in the bus that connects them to the CPU--that is, the Front Side Bus (FSB). The FSB on all current Intel chips is only 64-bits wide, single pumped. That means you only have 1.1 GB/s of bandwidth to the CPU with a new 133 MHz FSB P3, 800 MB/s with a 100 MHz FSB P3 or P2, and a measely 533 MB/s with a lowly Celeron. Not so coincidentally, the maximum bandwidth of the various standard types of SDRAM, PC133, PC100 and PC66 are...1.1 GB/s, 800 MB/s, and 533 MB/s respectively.
Ever wonder why 1.6 GB/s RDRAM wasn't any faster than 1.1 GB/s PC133 on all those P3 benchmarks earlier this year? At the time you probably either heard from someone else (or decided yourself) that it was just because "Rambus sucks," which, while true, isn't the whole story. Instead, the reason that the faster RDRAM didn't perform any faster is because its extra 533 MB/s of bandwidth is all dressed up with no place to go--it certainly can't go to the CPU, because the FSB is in the way, and it only lets through 1.1 GB/s. Now, there are couple edge conditions where that extra bandwidth can be utilized by sending some over the AGP bus and keeping some in buffers on the chipset to send later, but by and large the P3 is completely saturated by plain old PC133. This is the same reason why, when DDR chipsets finally come out for the P3 in a couple months, their performance is going to be a mite disappointing--all this extra bandwidth, no place for it to go. As for why the RDRAM system is actually slower most of the time...well, that's because Rambus sucks. (RDRAM has higher latencies than SDRAM, plus Intel's i820 RDRAM chipset is nowhere near as good as its BX or i815 SDRAM chipsets.)
Luckily, this is a bottleneck that is finally getting removed. AMD's Athlon and Duron CPU's both have double-pumped FSB's, meaning they'll be quite happy slurping up the extra bandwidth they get from their DDR chipsets, due out hopefully by October. Their FSB's can currently be set at either 2x100 MHz (1.6 GB/s) or 2x133 MHz (2.1 GB/s). And Intel's upcoming P4 goes a step further--it has a double-wide double-pumped FSB, allowing 3.2 GB/s @ 100 MHz core clock, and 4.3 GB/s @ 133 MHz.
These steps are, to put it mildly, vastly overdue, as the ratio of CPU-clock to FSB-clock has gone from 1:1 in the pre-486 days, to 2:1 with the 486DX2, to, for example, 3.5:1 on the two year-old P2-350 I'm typing on now, to a ridiculous 8.5:1 on the latest greatest (nonexistant) P3-1133 to a miraculously exorbitant 10.5:1 on a Celeron-700. What this means is that that CPU is spending a whole lot more of its time waiting every time it needs to access memory--10.5 clock cycles for every 1 cycle of memory access, to be exact. While the impact of this can and has been minimized through all sorts of tricks like bigger caches, out-of-order execution, and prefetching compilers, the overall performance impact is "damn."
So thankfully these ridiculous ratios will finally be brought down as the next generation of CPU's with decent FSB's ships.
Having read this, you're probably now lulled into believing our third myth. Unfortunately, you're wrong.
Myth #3: DRAM performance will hold back the performance of tomorrow's PC's. As it turns out, that's not true either. For proof, just take a look at the latest generation of PC graphics cards. The latest and greatest offerings from ATi and nvidia both include 64 MB of double-wide DDR SDRAM at speeds up to 2x183=366 MHz. That's 5.9 GB/s of bandwidth, way more than enough to saturate the FSB of top-of-the-line CPU's for at least the next 18 months. All this is available, plus a very complicated GPU, fast RAMDAC, and some other components, on a card selling for about $400--thus we can guess that that 64 MB of 5.9 GB/s RAM costs around $250--or, humorously enough, about the cost of 64 MB of 1.6 GB/s PC800 RDRAM! Furthermore, nvidia just announced the GeForce2 Ultra, with 64 MB of 2x250=500 MHz DDR. That's 8 GB/s!! The cost? Another $100.
But all of this is disregarding that little something called supply-and-demand. There are several legitimate reasons why such high-speed DDR costs more to make than normal-speed DDR (which costs a negligable amount more than plain-old SDRAM), but the main reason for its (not even so) high price is its scarcity and the incredible demand for it by graphics card makers. On the other hand, the main reason RDRAM has come down in price so much (6 months ago it cost around 3 times as much) is because there is a glut of it on the market. Everyone in the industry (except Dell) has realized that the i820 chipset is a dud, a bomb, already shuffled off to obsolescence. RDRAM on the PC is a no-go, at least until the P4 comes out. Thus, excess RDRAM is being sold-off at fire-sale prices. Once the P4 is out in enough volume to actually impact prices (i.e. January or February if Intel is lucky), expect another surge in RDRAM prices. Back on the other hand, in a year or so that 8 GB/s (!) 500 MHz DDR SDRAM in the new GeForce2 Ultra will be pretty mainstream stuff, going for but a modest premium over even bottom-of-the-line SDR SDRAM (which will still be around for some time).
"So great!" you might say. "Let's make chipsets with 8 GB/s FSB's, and all our problems will be solved!" Well...there's the rub.
See, the point of this story is, the problem in getting a high-speed memory subsystem in your PC is not the DRAM--they can get that damn fast already. (8 Gb/s!! Ok I'll stop now.) The problem is the stuff in between: the motherboard and the chipset. That is, the bus.
It turns out that it's easy to get a super-high-speed bus onto a graphics card, but an electrical engineer's nightmare to get one on a PC motherboard. Let's count the reasons why:
1) The traces (wires) on a motherboard are a whole lot longer than on a graphics card. The higher the capacity of a trace, the higher quality (read: more expensive) it has to be. The longer it is, the higher quality it has to be to have the same capacity. Eventually, it's just beyond the capabilities of our current manufacturing to make traces that are long enough and high enough capacity to work with high-speed DRAM on a big motherboard.
2) There's lots of other components on a motherboard. This means more interference ("crosstalk"). This means--you guessed it--the traces need to be even higher quality.
3) A motherboard has to be designed to work with almost any amount of DRAM--one DIMM, two DIMM's, three DIMM's, of varying amounts, made by anyone from Micron to Uncle Noname. Graphics cards are fixed configurations which can be validated once and forgotten about.
4) The DRAM in a graphics card is soldered to the board. The DRAM in a motherboard has to be removable and communicate through a socket, which adds to the electrical engineering complexity.
Plus there's probably a couple more I can't think of at the moment. The point is, the weak link in the memory subsystem is not the DRAM. Today it's the chip's FSB, next year it will be the motherboard and the chipset, but it's not the DRAM.
However, there are ways the DRAM might be changed to get around this limitation. (Disclaimer: I don't know as much about this part of the equation as I do about the rest.) Apparently the packet-based protocol used in RDRAM is one way to do this--for some reason, communicating in packets minimizes the danger of data loss due to crosstalk. Probably for the same reason it works for networks, the Internet, etc.
Great! The problem is, RDRAM isn't designed to maximize bandwidth, but rather to maximize bandwidth/pin. While this is real neat for itty-bitty embedded devices where you need to keep pin count to a minimum, the problem is that each pin is connected to its own trace...and thus RDRAM ends up requiring the motherboard to carry much more bandwidth/trace than DDR SDRAM. See above (#1) for why this is a bad idea.
So, the packet-based, but-otherwise-more-or-less-normal-DDR DDR-II, due out in 1.5-2 years, looks like a good candidate to solve this problem, at least for the time being.
In my opinion, though, even that is only a temporary solution. I'd say eventually the industry is going to have to give up the idea of expandable RAM, and change the entire architecture of the motherboard so that the CPU and main memory are moved off it, onto a daughter card, like the graphics card is now. That would mean you would have to buy your CPU and your RAM together--no more adding more RAM as a quick performance booster, which would be a considerable loss. However, it seems as if it would get rid of the tremendous memory bandwidth problem PC's are facing today in one fell swoop. In comparison to the performance gains realized, it would be an easy tradeoff for the vast majority of consumers, who never upgrade their RAM anyways.
The other possible solution is similar-but-different: a switch to eDRAM, which I discussed lo these long paragraphs ago (up near the top). This, however, would require an even bigger infrastructure change, although the benefits might be even greater.
The Ars Technica RAM Guide is a good place to start for the technologies that are around now (SRAM, SDRAM, DRAM, etc.). Ars also has a story about MRAM, which links to this Wired article describing IBM's work in the field.
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Hope this helps.
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First of all, RDRAM, SDRAM, and DDR SDRAM are all forms of DRAM, the only difference is in the interface between the memory array itself and the outside world. SDRAM and DDR SDRAM both accept an address from the address bus and output the data on (or write the data from) the data lines. RDRAM uses a packetized interface which can be more efficient for linearly accessing memory, however, it is extremely slow for randomly accessing data. However, all of these types of memory are forms of DRAM that have single transistor/capacitor cells which can each store a bit. One interesting thing to note about DRAM is that it may not be able to scale down much more: As processes get smaller, capacitances get smaller and transistors no longer completely turn off (meaning charges can leak off). This means that the cells need to be refreshed (recharged) more frequently, limiting the usefulness of the device.
MRAM is a new technology that stores data magnetically. I don't know too much about this, but I would be guessing it would be quite a while until we see this in every computer. It will probably be available in portable devices in 2 to 5 years, however, low production quantites (and high prices that go along with this) will almost certainly keep this memory technolgy from entering the desktop market for ten years or so. Then again, I could be wrong.
I have seen flash memory mentioned as a possibility. Flash works by storing (or not storing) a charge on a floating polysilicon gate. The charge is stored or removed by using a high voltage to tunnel through the silicon dioxide insulator. While flash can be read about as fast as any other memory technology, writing flash typically takes a long time (from 100's of microseconds to milliseconds). Also, the tunneling action erodes the silicon dioxide and can wear out flash cells after 1,000 to 1,000,000 rewrites (depending on the process).
So what is the next big memory technology? For now, I would say it is DDR SDRAM. However, DRAM technology will eventually fizzle out and I am sure that either SRAM (Static RAM), MRAM (if it is available), or some other new memory technology will take its place.
Just goes to show how much things have changed...
The difference between SRAM and DRAM is that SRAM stores bits in a circuit of two inverters in a loop (four transistors not including sense amp). DRAM bits are actually stored on capacitors which through leakage eventually will discharge. Because of the leakage, DRAM requires a refresh which means the value stored on the capacitor is rewritten every so often (measured in tens of milliseconds). This writing and rewriting of every single bit is why DRAM ends up being quite power hungry when compared with SRAM.
Flash memory is really not like SRAM or DRAM. It actually reminds me more of ROM because bits are actually defined by a single transistor being on or off. The way that flash memory makes a transistor stay on or off is the cool part. Each transistor (one per bit) has two gates. One gate is used when you write to the bit, the other gate is not actually connected to anything. The second gate (called the floating gate) is given a voltage (charge) when you wrote the bit through some interesting electrical effects (remember it is not connected to anything, you have to get the charge on there somehow). After writing the bit, the charge from then on actually stays on the floating gate because it is insulated from everything. The charge ends up making the transistor be on or off. Flash memory does have limited number of write/erase cycles but it is usually measured in hundreds of thousands so I'm not worrying about my Rio failing anytime soon.
Slashdot questions RAM
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MRAM is probably five or possibly more years away, so it's not going to be anywhere near the "next generation" of RAM tech. Check out the front page of ArsTechnica for some linkage.
The next generation of RAM is clearly going to be DDR-SDRAM, and will be for some time. Cheap modules will be PC-200, but PC-266 DDR will be out at the same time, with very little use of the "mere" 200MHz (effective) variety. The tech is there right now, it's just that there's no demand yet since there aren't any chipsets out (VIA to the rescue, in a few months); so, regular SDRAM is tying up production right now, but the switch to DDR will probably be fairly smooth.
Face it, RAMBUS RDRAM is a terrible idea in the first place. When you have to make a new technology like RDRAM run at 800MHz to get similar performance to existing PC-133 SDRAM, that should be a sign that the new technology is worthless--do you really think it will be as easy to make RDRAM at 1.6GHz as it will be to make DDR SDRAM at 266MHz DDR? Hell no. I predict a quick demise for RDRAM within a few months of the release of VIA's forst DDR-SDRAM chipset.
"The more corrupt the state, the more numerous the laws."--Tacitus, *The Annals*
Oh no! Then what will the Linux advantage be? ;)
the smart money is on the new Dodge RAM.
with a supercab and a more powerful engine, you just can't beat the deals that most places are offering on it.
FluX
After 16 years, MTV has finally completed its deevolution into the shiny things network
"It is seldom that liberty of any kind is lost all at once." -David Hume
This isn't as much "normalization" as it is "don't take so many drugs when you're designing tables."
I've always been of the opinion that RAM that is erased when the computer is turned off is a good thing. The ability to erase all your RAM to me is like "starting fresh", similar to rebooting Windows to regain some temporary stability.
What would happen if a virus was loaded into your memory and you wanted to shutdown and wipe the virus from memory, but your memory was permanent? I don't see that as a good thing at all.
There are probably many arguments for why static memory is a good thing, but right now I am definitely leaning toward memory that can be erased by powering down.
I'm not sure if this has been mentioned yet or not, but Kentron Technologies is developing a technology known as QBM, which, to put it in a nutshell, is basically Quad Bandwidth Memory, which means that it transmits twice each cycle, with overlapping cycles, effectively doubling the DDR effect. Their page on it says that memory running at 100Mhz clock could get memory bandwidth of approximately 3.2 Gigabytes/second.
Heh, that's the stuff I want when I build my Ultimate Gaming Machine (TM).
Friends don't let friends use multiple inheritance.
" ...Maybe we should optimize what we've got more...."
You know, this principle holds for software development too... The potential for a LOT of what we do with computers today was present in the humble old 486. Maybe this mad dash for better faster hardware spells our own doom. already people are buckling under the complexities of things like the psx2, x86 extensions, massive ram on video cards, etc. the stuff is going to waste just as fast as it can be invented.
it's simply too much to work with or take advantage of with the tools we have nowadays (in the time alotted us). I wish software could advance at the same rate as hardware, but it takes years of tinkering and developing new techniques to get anywhere near taking advantage of ALL of a given piece of hardware's potential.
Just look at an example like 3DStudio: version 3.0 is dramatically more sophisticated and powerful than version 1.0, and v3 runs better (is capable of more, easier to use, faster for certain tasks like modelling low poly stuff?)on p200 than 1.0 would on a pIII. all the hardware upgrades in the world don't help a bad app very much.
As hardware continues to advance by leaps and bounds, will the gap between it and software be growing much? what are the repercussions of this? lazy and imcomplete coding do seem to be becoming the standard rather than the exception...
maybe there'll be an 'Einstein' that springs up to turn the software engineering world on its ear. until then, the over-all essence of computer use will grow at a fraction of what the state of the art hardware is capable of.
:)Fudboy
:)Fudboy
I guess I'm only a Fudboy, looking for that real Transmeta