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Mamba: Athlon And DRAM Get Together

Posted by ryuzaki0 on from the fact-or-fiction-or-just-plain-cool dept.

scottnews writes: "Tom's Hardware has posted this story about a new chipset for the AMD Athlon processor with 8MB of embedded DRAM in the chipset for 9.6 GB/s of sustainable bandwidth." Thatsa spicy meatball.

10 of 76 comments (clear)

  1. This all sounds cool on paper, but.... by Mr.+Neutron · · Score: 4
    Has Micron made a PC chipset before? While they may be great at designing DRAM, and even logic, it is very difficult to produce a stable chipset. Look at the history of VIA and SiS. Lack of chipset stability is one of the main drawbacks to the Athlon. If Micron goes forth with this venture, expect it to be a while before they can get the chipset to an acceptable level of reliability.

    I hope they do well, and I hope this come to realization. I also hope that VIA and AMD can produce better chipsets (like the AMD760), so that there are no more drawbacks to using a great CPU.

    --
    "How many six year olds does it take to design software?"

    --
    dinner: it's what's for beer
  2. Re:Dang, someone was using their noodle! by stripes · · Score: 3
    What happens if there's a fault in that "new" 8 meg that's being used? Do they just do a regular chipset version, like intel's 486sx with the disabled co-proc?

    It is pretty common for large regular structures like cache's to have a little extra that can be used if some of the memory is bad. I don't know if that is the case here, but it may be. It is also possiable that they can just map out part of it (so there might be a 7M version).

    If not, then faults in this 8 meg space, is going to cost them more money because of the added complexity.

    Even if so it will cost extra. There is extra time on the tester, and tester time isn't cheap. Also if it is better (or though to be better) there will be more buyers which can result in a higher price...or in research and devlopment intensave products lower prices, so who knows :-)

    I'm sure it took longer to design as well. So the 8M of RAM isn't free, but it should be a lot cheaper then it normally would be, or at least more profitable to them.

  3. Re:Oops. by svirre · · Score: 3

    With the high pad count on what's essentially a dataswitch, your core will easily be pad-limited (Note however that modern bonding techniques can get considerably more pads in on a die than before)

    That said; it isn't free to utilize extra 'filler' silicon on the die, as this will lower yield as defects that prevously didn't drigger a fault since it was on whitespace, now causes a defective unit.

  4. Re:Why so much Bandwidth? by Keeper · · Score: 3

    Why do we have so much bandwidth in the L1 and L2 cache? Because if you have data in it, hitting it, things are much MUCH faster than hitting main memory.

    Just because the memory talks to the chipset at 100 or 133mhz doesn't mean that the chipset talks to the cpu at that speed. In fact, that's one of the things that makes the EV6 bus design so flippin cool. The chipset on the K7 talks to the CPU at an effective 200 or 266mhz. Lots of bandwidth.

  5. Re:always liked them by Keeper · · Score: 3

    Erm, this isn't an AMD design.

    This is a chipset created by Micron. You know, the guys who are really good at making embedded SDRAM. There was a big noise about it about a year or two ago before it fell off the charts. Looks like they did something usefull with it this time ;).

    So when you get right down to it, AMD can only gain from this. They can't loose, because they're not the ones making it.

  6. Re:Great idea, but.. by Keeper · · Score: 3

    Oh I guarantee you that they notice it's not being used. The question they probably ask themselves is

    "can we make this any smaller or rearrange it to use space better?"
    "Nope, sucks don't it."
    "Yeah."

    The Micron guys didn't try to do that. They thought "what else can we fit in there" *evil grin*

  7. Slashdotted by eeeuh · · Score: 3

    This is the link to the main server and this wan DOES work #)

  8. Oops. by plastickiwi · · Score: 5
    The article reads in part:
    In designing the Samurai, Micron noticed that 40% of its die was unused white space.

    Heh. They "noticed" that 40% of the die space was unused?

    ENGINEER BOB: Hey Steve, I just noticed that we're only using 60% of the die space on the Samurai.
    ENGINEER STEVE: Hmm.... Damned if you're not right! How did that slip past us in the months we spent designing it? Good thing you're on the job, Bob!

    --
    -- He's fantastic, made of plastic....
  9. What the hell is Intel doing? by Limecron · · Score: 3

    All I can think right now is that I'm glad that I don't own stock in Intel.

    What is Intel going to come out with to top an Athlon at 1.5ghz (and that's with AMD's current core)...

    A P4 with a whopping one pound heatsink and that requires a new power supply?

    You know, I won't buy one, if I can buy an Athlon that I may even be able to keep my A7V for. (And for a few hundred dollars less, as well.)

  10. Re:Good For AMD by evanbd · · Score: 4
    Ummm.... read the article...

    This isn't about that at all. This is Micron's new chipset, Mamba. It is the successor to Samaurai, their DDR reference chipset. When they built Samaurai, they found they had not used 40% of the die space, so they added an 8MB DRAM cache to it. The cache is 50% lower latency, with a 9.6GB/s bandwidth; it is completely different from the 760MP buffer, which is strictly a BUFFER not a cache, and only allows some reordering to improve performance.