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Intel Creates 30-Nanometer Transistors

SirFlakey writes: "It appears Moore's law has been proven right yet again. According to a report in Fairfax's IT section, Intel has managed to create the world's smallest transistor(s). This, according to the article would allow them to create CPU's with 10 times (420 million) the P4's transistor count. The transistors are only 3 Atoms thick(!). They say they have come close to the limit of modern technology but also still have plenty of innovation left for the future. This annoucement comes only a few days after it released an earnings warning for this quarter."

3 of 190 comments (clear)

  1. It doesn't add up by Anonymous Coward · · Score: 5

    The lattice constant (distance between the center of adjacent atoms) in silicon is 5.43 angstroms. Thus one would assuem that 30nm (300 angstroms) is actually about 55 atoms thick.
    Most likely the 30nm refers to the gate length and the 3 atom reference was a 'misguided' measure of the gate dielectric thickness. The reason I say misguided is because dielectrics tend to be molecules not atoms. Although 3 molecules is thin, such thicknesses have already been reported before.
    So much spin. But I guess it makes sense since IEDM (International Electron Device Meeting) is occurring soon and everyone loves to get excited about the newest small transistors.

  2. Fluctuations! by BlowCat · · Score: 5

    Customer: Your program crashes randomly. It must be a bug.
    Support: It's not a bug. It's a quantum fluctuation.

  3. How will they manufacture them? by taniwha · · Score: 5
    traditional etch/deposition system works by leaving putting on a layer (in this case 3 atoms thick) then etching off the stuff you don't want.

    What I can't see is how one can lay down anything 3 atoms thick (or wide) reliably (in the sense of real-world mass manufacture, not one of a time in-the-lab productions) using scaled versions of existing Fab tachnologies and without some nano-assembler type technology. Worst case you'll get 3 atoms somewhere in the middle of the wafer and maybe 5 or 0 at the edges ....

    This sort of tech will come one day - but I beleive it's going have to be by revolution, not evolution ....