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Stretched Silicon Speeds Semiconductors
byrd77 writes: "IBM is touting new 'strained' silicon as being up to 35 percent faster while reducing power requirements. Let's hope this is more than just an exercise in straining credulity..." See also their press release.
1. It'll never work - thats right, if the Ph.ds at the IBM lab had consulted me and my RPG-playing zit-studded freshmen pals, they would have understood how idiotic they were to pursue this work, and to claim that it was a success.
2. Those greedy bastards - how dare they hold this innovation closely and not share it with openwhatever.org?
3. What does this have to do with linux? Philip Greenspun is cool! Craig Mundie sucks dick! RMS and Linus rule too! Steve Case also sucks dick!
Thank you, this is /. bitch, signing off.
My first question is that researchers at IBM's Research Lab have been working on this for IBM for literally years. I remember reading papers from IBM on this exact same subject back six or seven years ago. They've been fabricating devices back in strained Si/SiGe interfaces and has been presenting papers documenting the mobility improvement for some time now. So the thing that I find truly puzzling is what is the breakthrough? It's not that I don't think this is great, but I fail to see what they are doing now that they weren't doing before.
So what is strained silicon - essentially it's a way of using the lattice mismatch of silicon and SiGe (silicon germanium) to create tensile strain near the material interfaces. This strain reduces carrier scattering and thus improves mobility for both electrons and holes in the inversion layer of the transistor channel. So, in less engineering speak, the charge carriers in the transistor move around easier and thus faster which improves transistor performance. This mobility improvement can be as high as 70% faster than 'normal' silicon channels.
It's worth mentioning the downsides of this technique - which I notice have been ignored in all the articles that I have read. Thermal conductivity of strained SiGe is substantially lower than 'normal' silicon - like an order of magnitude less. So the devices will be much hotter. This 'self-heating' of the devices results in reduced mobility of the charge carriers due to increased carrier scattering - so essentially the devices are so much hotter than they greatly reduce the effect that was created in the first place. Another issue is the fact that junction leakage is much higher. And another is that the higher dielectic constant and lower band-gap of SiGe result in higher junction capacitances in the transistors.
The technology is interesting, but I don't see how they managed to address the issues that have held back the technology so far. It's a shame that they didn't mention potential issues and how they worked around them in the press release, but I guess we'll have to wait for the technical papers at this year's conferences.
* Not Speaking for Intel Corp. *
So, you need to build the silicon on top of a substrate, with a similar crystal surface, but a larger lattice parameter(s). Then grow the silicon on top of it by some technique that maintains atomic level consitancy between the layers.
This is difficult to do - your basically talking something along the lines of silicon deposited by some for of epitaxial growth - and for thick layers that's a timeconsuming process. And thus expensive.
One thing that was not mentioned was the cost of this trick - how does it compare with germanium or gallium arsnide? (Ok, projected to compare?).
I think that, baring some lucky find, this is going to be more expensive than the befefits, for general use.
Not only that, but the interdiffusion coefficents of a strained material are, in general, faster than for the an unstrained material, so this will decrease the lifetime of the devices.
Interesting idea, though.
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