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Architectural Difference Between The P4 And G4
homerJAYsimpson writes: "This article is a great refernce of the differences in the architecture of the P4 and the G4. What is nice is that it is not a holy war of who is better but an explaination of why Intel made its choices and uses the G4 as a point of reference. It has just tons of info on uPs, useful for everyone." Not for the techie novice, but its a well written piece if you're reasonably technical and want to understand more about two of the most important chips on the market.
is about 70 degrees F.
One thing that I got from this article is why we shouldn't be depending too much on clock-speeds for comparison, and thus the fact that PPCs aren't yet available at clock speeds of x86 shouldn't really matter. The wide and shallow approach of the PPC certainly means that less clock cycles are needed than the narrow and deep approach of the x86.
Now I know that they only tests that really matter are the real world tests, simply because at a user level that's the only real place that I'll notice the difference.
Of course another issue is going to be motherboard differences and how much I/O depends on the processor, but this is another story.
Jumpstart the tartan drive.
for different uses!
The G4 is meant to be usable in embedded systems, while the P4 is meant to be usable as a space heater
=P
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"I would say that 99 per cent of what my father has written about his own life is false." - L. Ron Hubbard Jr.
If you remember then the Pentium Pro came out, people (including me) dissed it because it was years behind schedule, huge, expensive and hot. Actually, its architecture was just ahead of the process technology curve. With a few tweaks, the same CPU core came to dominate the world with the P-II and the P-III.
Looking at the radical changes in the P4, including storing only uOPs in the instruction cache and reserving (currently useless) pipeline stages for speed-of-light cross chip delays, they are planning ahead for future realities. We can think of the current P4 as being like the Pentium Pro, just a short-lived beta release.
The more interesting question is which approach to driving uOPs will win out: P4, Transmeta or Itanium. P4 and Transmeta convert legacy x86 opcodes to internal wide architecture on-the-fly (P4 in hardware, transmeta in software); Itanium makes the compiler generate wide architecture directly. Note that the original pre-translated instruction format (CISC, RISC, Java bytecodes, whatever) is now largely irrelevant.
My view is that in the abstract, Transmeta has the best approach, followed by P4 and Itanium last. This is because the software approach is the most flexible and can even be upgraded in the field. In theory, it could detect and store the individual performance characteristics of each program on a user's machine. Granted, they currently focus on low-power, but if they retargeted their technology at high speed, it could be interesting.
The P4 approach is hardwired, but at least it can adapt to local code characteristics and translate them to the current internal architecture version.
The Itanium exposes low-level chip details to the compiler, and the decisions are cast in concrete from there on out. It doesn't seem very future-proof to me; if the IA64 architecture changes in the future, today's compiled code will suffer.