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PCI 3.0 Coming; Intel gets the Green Light.

Posted by ryuzaki0 on from the faster-faster-and-faster dept.

pjbass writes "This story on ZDnet discusses the next I/O subsystem planned for PC's. It will be PCI 3.0 once making it to the consumers, but it is now known as Arapahoe, or 3GIO. Intel Corp. is responsible for making the technology, and boast its performance will be about 6 times that of PCI2.x, getting up to speeds of 6.6 gigabytes per second of bandwidth initially, with promises to scale more once the technology is mainstream."

2 of 172 comments (clear)

  1. Lowered MB Costs by nate1138 · · Score: 5, Interesting

    One Good Thing that the article failed to mention is that fewer wires also means it is easier to design a motherboard, and expansion cards, thus lowering the overall prices of both items (once the required chipsets get into mass-production, of course). You should also be able to get more spacing between the circuit paths, which should lead to a lower possiblity of cross-talk, and better reliability.

    --
    Where's my lobbyist? Right here.
  2. No they are not the same thing. by hattig · · Score: 5, Interesting
    EV6 is a 64-bit wide point-to-point processor bus used to connect Athlons and Durons to compatible Northbridges. It was developed by Alpha, and it can scale up to 200MHz DDR (400MHz effective). It can currently transfer either 1600MB/s or 2100MB/s.

    Hypertransport is a variable width, bi-directional bus. It can transfer up to 12GB/s. It can be used for many things - CPU - Northbridge (as it will be used for the upcoming Hammer CPUs), Northbridge - SOuthbridge, Northbridge - RAM, GPU - RAM, Southbridge - RAID controller, etc.

    Hypertransport is packeted. EV6 isn't. AMD license EV6 from Alpha, AMD designed Hypertransport.

    Is this enough to convince you that EV6 and Hypertransport are different?