PCI 3.0 Coming; Intel gets the Green Light.
pjbass writes "This story on ZDnet discusses the next I/O subsystem planned for PC's. It will be PCI 3.0 once making it to the consumers, but it is now known as Arapahoe, or 3GIO. Intel Corp. is responsible for making the technology, and boast its performance will be about 6 times that of PCI2.x, getting up to speeds of 6.6 gigabytes per second of bandwidth initially, with promises to scale more once the technology is mainstream."
Don't confuse Hypertransport functionality with PCI 3.0, as an eetimes article explains AMD's logic for voting to support the new intel standard, http://www.eetimes.com/story/OEG20010803S0080
Reading it closely makes me feel as if AMD is trying to curry favor with Intel for some odd reason while at the same time promoting their own technology.... They do overlap in a few areas, but I am curious if their support for the new PCI 3.0 standard will make it harder for them to sell HT as they will have to work to differentiate it.
* Winners compare their achievements to their goals, losers compare theirs to that of others.
Call it "New PCI" or "Super-Duper PCI" or "Extra Whizzy PCI (not compatible with any computers made before 2001)". Please!
And don't even get me started on the trouble I've had explaining why people's "innovative" cheap storage solutions are flawed (Zip disks don't work in regular floppy drives, you can't overwrite normal music CDs now matter how good your burner is etc.).
Obviously it IS the legality of the standard they are interested in. They will all want to go over the spec with a fine tooth comb to make sure they don't wind up with another RAMBUS fiasco.
Yes, I realize RAMBUS's patents werent actually published at time of the memory standards meeting, they were still pending, but that whole incident has definately raised the amount of due diligence companies are putting into the legal end of standards committees. It makes no sense for AMD to endorse the standard going forward if, for example, it wound up that they would have to pay Intel a bunch of royalties on every chip they sold because they needed to use some patented method for the CPU to talk to add-in cards over this bus.
One Good Thing that the article failed to mention is that fewer wires also means it is easier to design a motherboard, and expansion cards, thus lowering the overall prices of both items (once the required chipsets get into mass-production, of course). You should also be able to get more spacing between the circuit paths, which should lead to a lower possiblity of cross-talk, and better reliability.
Where's my lobbyist? Right here.
Here's a little suggestion...
Read the article.....
It at least answers your first question....
And I really doubt that Intell will prevent VIA from using it.....it would sort of defeat the purpose, it's intended to REPLACE PCI....and the only way it'll do that, is if it can be used in every PC....
Currently PCI is used not just in Intel machines, but Macs, Sparc workstations and others....
Advanced users are users too!
Hypertransport is a variable width, bi-directional bus. It can transfer up to 12GB/s. It can be used for many things - CPU - Northbridge (as it will be used for the upcoming Hammer CPUs), Northbridge - SOuthbridge, Northbridge - RAM, GPU - RAM, Southbridge - RAID controller, etc.
Hypertransport is packeted. EV6 isn't. AMD license EV6 from Alpha, AMD designed Hypertransport.
Is this enough to convince you that EV6 and Hypertransport are different?
One thing the ZDnet story doesn't mention is that unlike PCI 2.x, 3GIO will use point to point connections instead of a shared bus.