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Ternary Computing
eviltwinimposter writes: "This month's American Scientist has an article about base-3 or ternary number systems, and their possible advantages for computing and other applications. Base-3 hardware could be smaller because of decreased number of components and use ternary logic to return less than, greater than, or equal, rather than just the binary true or false, although as the article says, '...you're not going to find a ternary minitower in stock at CompUSA.' Ternary also comes the closest of any integer base to e, the ideal base in terms of efficiency, and has some interesting properties such as unbounded square-free sequences. Also in other formats."
Ternary numbers are an interesting sidetrack and some similar techniques are used in fast chip-based systems to speed up adding (each bit also caries it's own overflow and sign bits, turning the classic serial add-with-carry into a more parallel operation).
It must be remembered that, for floating point numbers, base 2 is *the* most efficient representation, as argued in the classic paper "What Every computer Scientist Should Know About Floating Point Arithmetic" by David Goldberg. The deep understanding behind IEEE754 is a masterpiece of numerical engineering that is often overlooked, IMO.
As far as I know radio astronomers user 3-level data recording for their VLBI (Very Long Baseline Interferometry) data. One of the equipment was from JPL at Caltech lab. Their problem is to detect a weak signal in presence of strong noise. In this case, it doesn't make sense to do 8-bit digitization. Instead people do 1-bit, 2-bit digitization and average out many sample of data. They found that the recording efficiency was highest when they used 3-level digitization.
I myself worked on VLBI in the same lab but our machines were using 1-bit digitization (BTW, we used regular video cassette and somewhat modified VCR to record 7 GBytes on single 2-hour tape).
Think about applying it to D/A and A/D conversion for AC signals. It could simplify a flash converter,a nd conversion to convention twos-complement signed integers can be performed by a hard-wired lookup table.
-jcr
The only title of honor that a tyrant can grant is "Enemy of the State."
I agree that a practical ternary computer is unlikely. Rather, the value of the theory might lie in helping us to realize the shortcomings of the binary approach, and the way our familiarity with it molds our thinking. How many of us would have come up with the ternary solution to the coin balance problem?
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A really cool number system that is rarely mentioned is factorial base notation. What makes factorial base interesting is that all rational number are represented by finite factorial base numbers, and transcendental numbers like e and pi are represented by infinite but nonrandom factorial numbers. So, somehow factorial notation "captures" and "tames" the complexity of the real number continuum in a way that decimal notation can't.
--- even the safest course is fraught with peril
I am shocked, shocked to discover that a fundamental computer architecture explored in the 1950's, rejected as unworkable, and forgotten is in fact unworkable.
The feeling that this induces has no word in English, but in Japanese it's called yappari.
As long as we're turning the world on its ear, lets go all the way, and use triacs. We implement it (the tri-state gate, that is) like an inverter, more-or-less. These have two (non-linear ) on states plus off, and are just right for implementing an inverter. They'd probably be great for trinary logic, too.
I just dug out my old physical electronis book (Micro Electronics, by Jacob Millman, First edition), and can't find them in there, so here's a slightly less academic reference.
There might be some problems with trying to get the clock speed high enough to compete with the Intel/AMD marketing, though; it says that they can be triggered into conduction by high dV/dt.
See what I've been reading.
You really couldn't be more wrong! Ternary logic is at the basis of some of the hottest research in asynchronous logic design right now.
For instance, if you had a group of transistors that computed multiplication and stored the output in a register you might see the value of that register change several times until the computation was completed. Right now, the only way that you know a computation is complete is that logic is designed to complete an action in X cycles; as long as you feed in the data and wait X cycles you will get the proper result. Clock cycles can be waisted here, because a simple multiplication might be completed in a single clock while harder multiplications might take the full amount of time the logic area is spec'ed for.
Using async logic, this can be done much more effciently. The multiplication happens just as soon as input data is given and the next stage of the logic knows when the operation is complete because its wires has three states: 0, 1, and not-yet-done. As soon as all the wires are 0 or 1, the computation is finished (consequently, this is how input works to). There are no "wasted" clock cycles, stuff moves through the logic as quickly as it is completed.
Of course, there has been some debate whether three states are needed on each wire, or an just additional acknowledgement wire is needed (say 8 wires + 1 for an 8-bit computation block). But, believe it or not there are already patents for both methods!
I guess, by having true ternary logic on each wire, you could have logic that will grab a result just as soon as X% of the wires report they are done with the computation to get "good enough" answer if the logic is iteratively improving a problem.
-AP