Low-cost Reconfigurable Computing (FPGA's)

Anonymous Coward writes: "People at the at Chinese University of Hong Kong have developed a reconfigurable computing card which uses the SDRAM memory slot instead of the PCI bus. Measurements in the paper show greatly improved bandwidth and latency - why aren't more people using this idea?"

Comments

Why aren't more people...

[fudboy]

I have also wondered why more people aren't using the memory bus for peripherals. For instance, the VGA adaptor would greatly benefit from that interface (3d work, video games), also, using that bus as a network connection in a renderfarm would probably be nice too. Seriously, the PCI buss can only offer so much (132 MB/S) which is certainly going to be a problem with anything faster than gigabit ethernet... Meanwhile, modern memory busses are upwards of 4.8Gb/s. Imagine multiple machines strung together with that kind of bandwidth between them!

Another question I've had bouncing around in the back of my head is why no one uses MPEG decoder circuitry for MP3 playback? All the players I've tried, windows or linux, take 10-30% of the CPU for noraml playback operation. This is unacceptable when working in big apps like 3DStudio Max, make-ing a big app or running big scripts. I have an old MPEG decoder card from a Creative DVD, also I believe my G-Force has MPEG decoder acceleration... How much trouble would it be to write a driver for Winamp that uses preferred devices like that?

FPGA CPUs at fpgacpu.org

[Space cowboy]

There are several FPGA cpu's available already. For loadsadetails, go to http://www.fpgacpu.org/ and see just how easy it is to create a CPU. I've even managed to (starting with Jan's work) build my own without any prior knowledge of verilog.

The main drawback is always going to be speed though - it's simply far and away more complex to have reconfigurable hardware than static h/w. The current "hot" CPU of any generation will almost certainly never be reconfigurable!

Simon.

Re:Using memory slots for devices is a bad idea

[billstewart]

Depends on what you're trying to do with the FPGA. Are you modeling a new chip, and you want the ability to poke around anywhere in the insides? Or are you modeling an I/O device ASIC that needs to have lots of inputs and outputs? For the latter, probably a memory interface is bad. For the former, maybe it's better. Are you planning to use if for a processor adjunct, like an MPEG encoder? Maybe a memory bus connection is just about right. How much do you need to interface with the outside world? Is your primary application "A Grad-Student Project That Enables Other Grad-Student Projects"? In that case, a memory-bus interface would be cool, and if nobody's done it for the last 3-5 generation s of processor/bus architecture, that makes it even cooler :-)

If you're trying to explore new coprocessor architectures, it's an interesting thing to try - certainly better than hanging coprocessors out on a PCI bus somewhere. Of course, these days, CPUs are fast enough that it's difficult to find applications that really need enough more horsepower than general-purpose processors can provide, but there are still enough edgy things to try that it could be worthwhile.