Low-cost Reconfigurable Computing (FPGA's)

Anonymous Coward writes: "People at the at Chinese University of Hong Kong have developed a reconfigurable computing card which uses the SDRAM memory slot instead of the PCI bus. Measurements in the paper show greatly improved bandwidth and latency - why aren't more people using this idea?"

Comments

RAM-slot FPGAs

[Frothy Walrus]

the idea of FPGA computing has been around for a little while at least (look here for examples). i think Scientific American even wrote about "configurable computers" in 1997 or so. why aren't they more popular, then?

modern processors are well-adapted to general computing tasks.

FPGAs (read: custom iron) might be good for a few specialized tasks (breaking 3DES, for instance), but most of us will be a lot happier on our UltraSparcs and Athlons and G4s.

Re:RAM-slot FPGAs

[jbuhler]

> modern processors are well-adapted to general computing tasks.

Rather, "modern processors are well-adapted to general *serial* computing tasks." If you have a computation with an embarrassing amount of low-level parallelism (e.g. applying a filter to an image), you can either hope that streaming SIMD will come to your rescue, or you can burn an FPGA with an embarrassing number of parallel computation paths that implements the desired function. The FPGA would already win in many real-world computations, were it not for the fact that it's limited by the cost of getting the data on and off the chip over a slow data bus.

Re:RAM-slot FPGAs

[Nindalf]

modern processors are well-adapted to general computing tasks.

This is a completely meaningless statement, because there's no such thing as a general computing task. Today's popular uses for computers developed as a result of the hardware's capabilities (which influenced the hardware's design, in an evolutionary feedback loop). We are only beginning to explore the uses of digital microcircuitry.

Modern processors and modern programming methods are well adapted to each other, so one should expect that unorthodox hardware would be difficult to program and give poor results. We just don't have the experience for it.

However, it becomes increasingly harder to get a consistent return on larger and larger surface-element counts with serial execution programming. Random memory accesses and conditional branching are discouraged in favor of "predictable" memory accesses and instruction execution, and greater and greater sacrifices of the illusion of serial execution are made in favor of efficiency. The advantages of parallelism grow as the chips grow, and reconfigurability at the level of the gate logic is the natural extreme we will likely tend toward as we figure out how to handle trillions of transistors in one device.

Can you really imagine current design trends extrapolated to instruction pipelines millions deep? Serial execution does not scale infinitely.

Re:Linked directly to Postscript?

[daniel_isaacs]

http://danisaacs.com/temp/fccm01_pilchard.pdf

Be gentle. And mirror and post mirrors, please. Bandwith costs, and I'm poor.

Why aren't more people...

[fudboy]

I have also wondered why more people aren't using the memory bus for peripherals. For instance, the VGA adaptor would greatly benefit from that interface (3d work, video games), also, using that bus as a network connection in a renderfarm would probably be nice too. Seriously, the PCI buss can only offer so much (132 MB/S) which is certainly going to be a problem with anything faster than gigabit ethernet... Meanwhile, modern memory busses are upwards of 4.8Gb/s. Imagine multiple machines strung together with that kind of bandwidth between them!

Another question I've had bouncing around in the back of my head is why no one uses MPEG decoder circuitry for MP3 playback? All the players I've tried, windows or linux, take 10-30% of the CPU for noraml playback operation. This is unacceptable when working in big apps like 3DStudio Max, make-ing a big app or running big scripts. I have an old MPEG decoder card from a Creative DVD, also I believe my G-Force has MPEG decoder acceleration... How much trouble would it be to write a driver for Winamp that uses preferred devices like that?

Re:Why aren't more people...

[Christian Smith]

I have also wondered why more people aren't using the memory bus for peripherals....Seriously, the PCI buss can only offer so much (132 MB/S) which is certainly going to be a problem with anything faster than gigabit ethernet


Because the memory bus is a memory bus, and NOT a peripheral bus! Peripheral busses have things like interrupts, address space configuration, buffering, bridging, hot-plugging, and long-term stability that memory busses are simply not designed for.

How would you like it if you couldn't use the latest whizz bang 8.4GB/s memory technology because some peripheral you bought a year earlier needs to be on a 4.8GB/s memory interface?

Anyway, PCI v2.2 (?) offers 512MB/s in 64 bit 66MHz mode. And then there's PCI-X...

And show me a game that is PCI/AGP bandwidth limited once textures are uploaded to the GXF card anyway. Memory is cheap, use it...


Meanwhile, modern memory busses are upwards of 4.8Gb/s. Imagine multiple machines strung together with that kind of bandwidth between them!

Unfortunately, those pesky laws of physics (like the speed of light) come in and put paid to schemes like this. While it may be possible to get that bandwidth between machines, the latency becomes a problem. Certainly not feasable as a memory bus.

Re:Why aren't more people...

[Waffle Iron]

I have also wondered why more people aren't using the memory bus for peripherals.

Been there, done that. Most PCs prior to the 386 models used the ISA bus for both peripherals and memory. The buses where separated out in modern PCs for a reason: the laws of physics. At today's speeds, a memory bus can't be more than an inch or two in length. If you use your one free memory slot for I/O, you have no more memory expansion capability.

too much hassle, unfortunately

[mj6798]

This may help a little, but in general, people haven't figured out how to make FPGA-based computing sufficiently useful, cheap, and easy in order for it to catch on. Programming an FPGA is still rather hard and the architecture limits severely what you can do. And there is the chicken-and-egg problem with the boards: if you write software for them, few people can run it, and few people are motivated to buy a board because there is no software that uses it. Right now, you are probably a lot better off buying a dual processor board or a cluster than an FPGA add-on.

Karma Whoring (PDF version)

[baptiste]

Here is a PDF version

Re:Linked directly to Postscript?

[baptiste]

Here is a PDF version Download all you want - I'm not metered (but its also only 384kbps :) )

Speed and gates...

[tcc]

FPGA technology to replace (or more like having a "flashable") Current processors could/would be a great leap in computing, it would mean having a "soft-hardware upgrade", microcode or "sillicon" bugs could be addressed, but there would probably be the downside of everything else in the computing industry: companies would released bugged stuff, beta would go around like current drivers :), etc etc.

All this said, unless some big breakthrough happens, we won't see out Athlon or Pentium IV system replaced by these, the 2 main limitation of FPGA are the number of available gates, and the speed at which they operate.

While they've managed to increase the number of gates to something quite big (last time I read about this I think it was in the low million? 1 or 2, but I can't be sure), this is enough to "emulate" microcontrollers or lower end processors, but not enough for higher end microprocessors. While eventually they will catch up and maybe someone will do his thesis on emulating an Athlon off FPGA stuff, by that time we'll be at the 2nd or 3rd rev of Post-hammer processors, so it will look like today being able to emulate a 486 (granted, there could be some use in that, but none come to mind right now.. parrallel processing? 1 athlon can replace zillion of 486s...) Also the developpement of microprocessor is going at a faster pace than FPGA technology. I am not saying this couldn't happen, but it would need a serious bump in the fab process and technology to be able to reach Ghz speed, and probably few 100M's of gates.

Still, it's a very interresting technology.

Using memory slots for devices is a bad idea

[Skapare]

Using memory slots for devices is a bad idea. The interface is not designed for devices. There are no IRQ lines. The address space can be configured by the chipset to fall anywhere in the address space of the whole machine (your device may end up starting at 0). The address space may even be interleaved with other memory devices in other slots. And the next generation of memory will use a whole different interface, and most new motherboards will soon migrate to it with little concern for backward compatibility.

Re:Using memory slots for devices is a bad idea

[billstewart]

Depends on what you're trying to do with the FPGA. Are you modeling a new chip, and you want the ability to poke around anywhere in the insides? Or are you modeling an I/O device ASIC that needs to have lots of inputs and outputs? For the latter, probably a memory interface is bad. For the former, maybe it's better. Are you planning to use if for a processor adjunct, like an MPEG encoder? Maybe a memory bus connection is just about right. How much do you need to interface with the outside world? Is your primary application "A Grad-Student Project That Enables Other Grad-Student Projects"? In that case, a memory-bus interface would be cool, and if nobody's done it for the last 3-5 generation s of processor/bus architecture, that makes it even cooler :-)

If you're trying to explore new coprocessor architectures, it's an interesting thing to try - certainly better than hanging coprocessors out on a PCI bus somewhere. Of course, these days, CPUs are fast enough that it's difficult to find applications that really need enough more horsepower than general-purpose processors can provide, but there are still enough edgy things to try that it could be worthwhile.

FPGA CPUs at fpgacpu.org

[Space cowboy]

There are several FPGA cpu's available already. For loadsadetails, go to http://www.fpgacpu.org/ and see just how easy it is to create a CPU. I've even managed to (starting with Jan's work) build my own without any prior knowledge of verilog.

The main drawback is always going to be speed though - it's simply far and away more complex to have reconfigurable hardware than static h/w. The current "hot" CPU of any generation will almost certainly never be reconfigurable!

Simon.

Cache memory bus...

[C0vardeAn0nim0]

as expansion slots were used by a few companies that sold G3 expansion cards for older PowerMacs.

IIRC, they had an expansion card that you'd attach to the cache slot near the original PowerPC CPU.

This way the new CPU would have all the memory bandwith it needed to run at 400 Mhz. 400 Mhz in a performa 6200... wow!

If Gates Were Reprogrammable..

[Bowie J. Poag]

If Gates were reprogrammable, then we wouldn't be in this mess in the first place.

Re:Reconfigurable chips vs DSPs - MPEG encoding

[svirre]

A DSP is just a very specialized CPU, primarily focusing on math intesive stuff, but less on branching and conditionals.

As any CPU they are sequential devices. The load a instruction, decode it and execute it and repeat. Though modern DSP can paralellize many intructions it's resources are still statically allocated at the time of design. A DSP with two multipliers may at most perform two multiplications at any one time.

Using a fpga on the other hand allows you to design the circuit from the ground up. now if your algorithm needs to do 20 multiplications at a time, you can do so simply by building them on the device.

Using a fpga is fundamentally different from using a DSP or microcontroller/processor. The latter is a finished circuit with an assorment of operators selectable by an instruction opcode. The former can be configured into any circuit.