Intel Cites Breakthrough In Transistor Design

n3hat was one of many who wrote in to tell us about the following: "Saw this report in Siliconvalley.com, 'Intel has devised a new structure for transistors that could lead to microprocessors that run faster and consume less power than conventional ones. The technology solves two of the more intractable problems: power consumption and heat.' It goes on to say that Intel plans to present two major elements of the new "TeraHertz" transistor structure at the International Electron Device Meeting in Washington on Dec. 3.

Comments

God I hate fucking idiots.

[Anonymous Coward]

Hey, dipshit...

Tera = a trillion

Hertz = cycles per second

Terahertz = Tera + Hertz = a trillion cycles per second.

Since the article talks about this wonderful new transistor cycling on and off "a trillion times per second".... It ain't marketing-speak, buttfuck! It's a legitimate technical word.

IBM and AMD First

[sabinm]

NPR had a report on this eariler today regarding this
"Terahertz" chip. It seems both IBM and AMD had developed this technology and Intel snubbed it, citing that it was to expensive to implement. There is nothing breakthrough about "fast switching" electrons, just the fact that INTEL released a press story about it makes it interesting. Ho hum

Re:IBM and AMD First

[Cougar1]

"Terahertz" chip. It seems both IBM and AMD had developed this technology and Intel snubbed it, citing that it was to expensive to implement. There is nothing breakthrough about "fast switching" electrons, just the fact that INTEL released a press story about it makes it interesting. Ho hum.

Just a small correction. The technology was developed by IBM and Motorola. AMD licensed the technology from Motorola.

Re:IBM and AMD First

[router]

Also, those of us who remember when IBM announced its desire to use SOI and Low-k dielectrics and Intel snubbed them are now giggling like schoolgirls....

Check EETimes for the whole unabridged story.

http://www.eet.com/story/OEG20011126S0031

Re:Dielectrics

[Erich]

One of the reasons you want a high-k layer is for making micro-capacitors to minimize ground bounce.

One of the big problems with current chips is that voltages are getting so low and current is getting so high, and with clock gating to turn off things that don't need power you get the inductance of wires causing a lot of ground bounce, which can be really bad. So you want to add capacitance to offset the inductance, but there isn't really a high-k layer in most processes to make capacitors out of.

Okay, now what about gate delay?

[Erich]

We expect that transistors keep getting smaller, and faster about the same rate as they get smaller. Gate delays are (looking out 5 to 10 years) not a big worry.

The big worry is wire speed. Wires aren't getting much faster, even though dies are getting larger and clock frequencies are getting faster. It used to be that getting from point A to point B on a chip was no problem to do at the end of a clock cycle. Current processors are getting to be so fast that you can't get from one place to another in a whole clock cycle in some cases. Unlike transistors, wire delay gets worse as size gets smaller, because resistance goes up fast (scales with cross-sectional area), and wire delay is proportional to R*C. You can do some tricks to keep wire speed the same, but relative to switching speed and transistor size it still gets bad quickly.

Routing information around is the problem of the future. You get free computation on the way, but getting from point A to B is the hard part.

That being said, fast-switching, low-power transistors are nice. :-)

And, for all you patent-ballyhooers, Intel will patent this (probably). As they should. Other companies will license this patent from Intel in the same way that Intel licenses patents on other aspects of their processes from other companies. That's the way things work.

I agree

[Anonymous Coward]

Too much hype, too little substance.

I'm not sure what Intel is trying to do here but from what I hear it certainly doesn't sound revolutionary. In fact, in some areas they seem to be playing catchup - they're finally adopting SOI which has been around for a while now. So they are talking about terahertz transistors now? Did they actually built it and characterize it? If yes they should give us concrete information instead of hype. Anyway even if they did built it I don't think they're the first. I heard about NMOSs with sub picosecond gate delays some time ago (SOI, 40 nm gate, novel doping profile...)

Because of stupid articles like this people are gonna start saying "Cool, we'll have 1000 GHz Pentium 7 in a year or two". Ugh.

Here's a related article in EE
Times:http://www.eetimes.com/story/OEG20011126S0 03 1

Re:You're using the wrong computer.

[markmoss]

Do you have any idea what it takes to get the surfadces flat enough? How long it takes to design a coating, and what sort of processes it takes to apply it?

It's not easy -- but it is a bulk process, and once you get a smooth layer it's done. Modern chipmaking requires first an almost perfect silicon crystal something like 12" across, sliced and polished into wafers flatter than a magnetic platter. Then you add an even more precise and even coating of etch resist, expose it to UV light through a mask, then precisely etch it at submicron line widths. Repeat coating and etching several times, interspersed with other difficult to control processes like planting dopants. Chipmaking is bound to be more expensive...

Of course, magnetic disk drives also have a high fixed cost (motor, bearings, head positioners, etc.), so the ability to make higher-capacity drives without raising the price doesn't translate very well into making the same capacity drives for less. So the price will probably never drop below $50, and you should be able to get at least 64MB of solid-state disk for less. That's so big that under DOS 3.3 you have to partition it into two logical drives. 8-) Get rid of the bloatware, don't use inherently large data files (audio, video, or many still pictures), and maybe solid-state disks would be cost-effective.

TWO of the more intractible problems?

[jd]

Since heat is a product of power consumption (energy in = sum(energy out)), then solving one is solving the other. In other words, there is only one problem, not two.

The basics, though, are simple enough. Both reduce to the problem of moving electrons through a medium, with minimal impedence, whilst still having a semiconductor. (ie: You can't just stick the whole thing in liquid helium, and hope that you can have a superconducting chip.)

The ability to use gallium-arsonide with very fast VLSI chips, as described a while back, is a good step in the right direction. Using copper, rather than alumin(i)um is another, although silver would be superior.

Another option might be to use non-flat architectures. A hemsphere would offer a greater radiating surface and offer much shorter connecting distances than a planar chip, although it would be a royal pain to actually build something like that. Since power consumption is a function of distance travelled, you would thereby reduce the power requirements.

Another consideration is the differences between states. If you need to switch from +1 volt to -1 volt, then you've got a 2 volt potential difference. (Duh!) The smaller that gap can be made, the smaller that PD is, and the less power you consume in the process. The drawback is that outside sources can cause serious problems. You would need some decent shielding, and a reasonably clean power supply to get away with very small changes.

Last, but by no means least, one of the worst culprits for power loss are connections. And modern CPUs have LOTS of them! Every single pin has three points in which you have the potential for high resistance - the connection between the socket & the pins on the chip, the pins & the gold wires connecting to the chip itself, and finally between the gold wires and the chip.

Of these, by far the most likely source of a poor connection is between the socket and the pins. That connection will often be by simple soldering, so you've got the double blow of going from the alumin(i)um pins to a lead/tin mixture, and then from the mix to the alumin(i)um connection on the socket.

Overall, it's a wonder modern CPUs ever work at all!

(Actually, it's slightly worse than I'm describing, as chip manufacturers frequently split things between multiple chips, thereby doubling all the above problems, for each chip in the set. ie: 4 chips give you 16 times the headache.)

Larger dies, fewer pins (how many do you need, for chrissakes! One per instruction?!), uniformity of materials (as far as possible), fewer chips per set, better screening, better PSUs, purer wafers, and less corner-cutting, would all lead to superior performance, in every respect.

The main reason Moore's Law will last well into the 22nd Century is that, although ALL of these refinements could be implemented tomorrow, the cost/profit ratio isn't great, and one press announcement is pathetic compared to the free publicity of "ever more exciting discoveries" (which aren't).

In short, why the hell SHOULD Intel, AMD, et al, make the best chips the can? What possible motive could they have for killing off a great revenue source at little effort, when the alternative would be a one-off mediocre improvement in sales for gigantic effort, followed by a massive slump? The rate of R&D is much too slow to keep supplying people with new toys. It's much more profitable to slow the rate of marketing, and keep people tagging along.

(If a chip manufacturer wanted to destroy the technology industry, all they'd need to do is make the best product they possibly could, using the best tools, and never mind the rejection rate. You'd get a few days of massive buying, followed by a decade of stagnation.)