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Intel Cites Breakthrough In Transistor Design
n3hat was one of many who wrote in to tell us about the following: "Saw this report in Siliconvalley.com, 'Intel has devised a new structure for transistors that could lead to microprocessors that run faster and consume less power than conventional ones.
The technology solves two of the more intractable problems: power consumption and heat.' It goes on to say that Intel plans to present two major elements of the new "TeraHertz" transistor structure at the International Electron Device Meeting in Washington on Dec. 3.
Every other month someone comes out with a "breakthrough" in microprocessor design that could "someday lead to smaller and faster chips" that "use less power."
I am not blaming only Slashdot for presenting this kind of fluff, I blame the major news organizations as well. Until these companies are getting ready to ship a product, I don't want to hear about it, because so much if it becomes vaporware. What little is left ends up being only slight improvements wrapped in marketing buzzwords.
Give me more content and less fluff please.
Natural != (nontoxic || beneficial)
OH WELL.
I was impressed by the idea of Transmeta's Crusoe processor because it greatly reduces the increasingly complicated problems of heat and energy efficiency. However, I've heard rumors that their product isn't getting widespread acceptance for some reason. Perhaps speed or reliability. Who knows.
The point is that we desperately need processors that produce less heat and use less energy. If you take a moment to think about it, it's totally ridiculous that we need so many noisy fans inside a computer that someone's using to compose an email. It's even more ridiculous when you consider that some graphics processors require a fan as well, and so does the power supply.
If successful, Intel's breakthrough in transistors could solve or greatly reduce these and other problems. These solutions aren't limited to the processor! All the chips in your computer contain transistors. Reducing the size, heat and energy usage by tiny amounts in each transistor will yield enormous benefits. Suddenly, a fan won't be required on the main processor or the graphics processor. Look at how much energy you save, not only in the transistors themselves, but in removing the fans, which themselves need energy to remove the unnecessary heat! It may be possible to remove the fan altogether from the power supply, resulting in less noise and even less wasted energy.
Now if only they'd come up with a breakthrough that will make fast, long lasting, solid-state hard drives a reality. Then the computer will be silent and use much less energy yet. We're getting there. It's only a matter of time and money.
OH WELL.
In looking at the story, one gains the amazing insight that Intel is quite worried about consumer reluctance to buy faster chips, as the faster MHz chip matters little beyond a certain point.
One also can extrapolate they are quite worried about Transmeta competition for lower-power chips.
So to me this really is a reflection of a PR piece in their attempt to stop going down the blind alley of chip speed, and try to figure out a way to fight Transmeta, without giving up the shop to AMD (cheaper materials aspect).
[caveat - I own both TMTA and AMD]
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--- Will in Seattle - What are you doing to fight the War?
Yes, that's right, he was pulled aside at an airport and they not only knew exactly who he was, but his nick and specific posts he'd made.
Did it ever occur to you that it's just one guy telling a story on some obscure web site? Do you really really believe everything you read on the web?
That story smells to me, and it probably smelled to the Slashdot editors (as amazing as that seems). Submit something from a reputable source, and maybe it will have a better chance. The Slashdot editors are gullible enough already, we don't need unsubstantiated bullshit like that.
There is a mroe technical article over at EETimes.Com here:
:) Gate leakage is a function of oxide thickness, and I discuss this in another post of mine in this thread. The thicker the oxide, the less likely it is that electrons can tunnel through the gate. But if you increase the oxide thickness while leaving everything else the same, you lose performance since the capacitance of the gate is reduced. So what you want is a way to maintain a value of gate capacitance while increasing the thickness of the gate. The easiest way to do this is to switch to a material in the gate that has a higher dielectric constant. So, the high-K dielectric tackles the other part of leakage by allowing higher thicknesses of dielectric while maintaining a given level of performance.
http://www.eetimes.com/story/OEG20011126S0031
The following is based on my prior research into SOI and the EETimes.Com article that I cited, and not on any knowledge of what Intel is actually planning on doing. I have not read the IEDM presentation and have no inside knowledge of the details of Intel's SOI plans. I am not speaking for Intel (despite working there) and I may be wrong on the details. My purpose in posting is to give some details on the background of SOI.
There are three parts to this: this uses fully depleted SOI vs. the current partially depleted insulators, this uses a high-K dielectric (zirconium oxide, according to the EETimes) vs. traditional dielectrics, and this uses thicker source and drain terminals to offset the increased resistance from fully depleted SOI.
Conventional silicon wafers use essentially a large, somewhat thick circular chunk of silicon as the starting platform that transistors are then created on top of. SOI is "Silicon On Insulator" and refers to a type of silicon wafer in which there is a somewhat thick chunk of silicon that forms the bulk of the wafer, on top of this there's a relatively thin insulator (referred to as the bulk oxide) and then on top of this a new layer of silicon is deposited (referred to as an epitaxial silicon layer, or epi layer). The transistors are created on top of this epi layer.
The only physical difference between fully depleted and partially depleted SOI is the thickness of the layers. Partially depleted uses a relatively thick layer of insulator followed by a relatively thick silicon layer. Fully depleted uses much thinner layers. The names come from the fact that the depletion region on fully depleted SOI reaches down all the way to the bulk oxide whereas in the partially depleted SOI, the depletion region ends and there is still some non-depleted silicon between the bottom of the transistor and the bulk oxide. To explain exactly what depleted silicon is would take some diagrams and some time. Suffice to say (and this is not debated in the industry, it is a fact): fully depeted SOI is better than partially depleted.
So why do people use partially depleted? It's a matter of complexity. Fully depleted SOI requires extremely tight manufacturing margins. You need to have very precise thicknesses to achieve the advantages that fully depleted can offer over partially, and this precision results in much higher cost. People (like myself) say that SOI is expensive, but this is in reference to partially depleted SOI which is the most common in use nowadays, fully depleted is quite a bit more expensive than even this. There is also concern that wafer manufacturers may have problems supplying high-quality, fully-depleted, completely planar (flat) SOI wafers in high volumes.
Switching to SOI reduces a form of leakage called subthreshold current (or Ioff) that occurs when a transistor is supposedly turned off. Fully depleted reduces this leakage even more than partially depleted. If you think of transistor current as being water that flows out of a water faucet depending on a signal (in this case the tap/handle of the faucet), subthreshold leakage is the equivalent of a leaky faucet that runs even when it's supposed to be off. It also has other benefits (it's faster, packing density is improved, etc.).
The other primary form of leakage is something called gate oxide leakage that is current that tunnels through the increasingly thin region that separates the gate from the channel of the transistor. If we go back to the faucet metaphor, it would be like the faucet sucking water out of your hand while your hand is on the tap.
The third "new thing" offsets a disadvantage of fully depleted SOI - higher channel resistance. By increasing the thickness of the contacts of the source and drain you can reduce the resistance going into the transistor and can partially offset the increased channel resistance.
IBM Develops Transistor Capable of 210GHz, June 25 2001
Intel Claims Smallest, Fastest Transistor, June 6 2001
Single-Atom Transistor, Mar 8 2001
Intel Claims 10Ghz Transistor, Mar 4 2001
Intel Creates 30-Nanometer Transistors, Dec 10 2000
I predict in the next couple weeks IBM, or someone else, will announce a smaller, faster transistor which slices, dices and scrambles eggs in the shell, leap through flaming hoops and balance your checkbook.
A feeling of having made the same mistake before: Deja Foobar
microprocessors that run faster and consume less power than conventional ones. The technology solves two of the more intractable problems: power consumption and heat.
This does sound familiar. Remember the two advantages of clockless chips discussed a few weeks ago on Slashdot?
less power consumption
less heat
faster processors
The article, on the other hand, says it's (only ?) because of a substitute for the silicium wafer. Well we'll have to wait and see what AMD has got in it's pocket waiting to be shown.