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Scientific American on 3-D Chips
m5shiv writes: "Scientific American is running a feature on 3-D Memory Chips. These devices look like they will significantly reduce the cost of PDA's and other handheld devices as well as replacing analog film.
By stacking devices vertically, density goes up considerably. The company,
Matrix Semiconductor, appears to have some very interesting investors such as Kodak, Sony
and Microsoft."
The article talked about how heat dissipation will be impaired by the 3-D structure (obviously, when you increase volume relative to surface area.) Maybe in years to come we'll see some sort of chip/heatsink integration to channel heat directly from the interior of the 3d structure to the outside by the heatsink rather than the normal dissipation through the chip.
Not a flame. Just an observation. Is it me or does it seem like Microsoft has got an "investment finger" in the pies of a huge number of new technologies coming out?Is this a diversification strategy or a way to say, "Hey, we own part of this company and we'd like you to make so changes suitable to our software?".
Just curious.
"We're sorry, but the website you're trying to reach has been disconnected."
And why is this so revolutionary? I came up with silicon stacking at Sperry-Univac in early 1980, complete with heat pipes to channel away excess heat. I offered it to Sperry, but they weren't interested. Too bad - my design was for CPU as well as memory chips.
-- Ed Carp, N7EKG erc@pobox.com PGP KeyID: 0x0BD32C9B What I'm up to: http://intuitives.mine.nu
At first reading this technology seems like it has a future, in that, sure it's early in its infancy, but somebody will come along and make it work.
But what we're really talking about is not 3-D, it's just stacked 2-D. In fact technically, all computer chips are 1-D.
Because of the limitation of the fact that the Silicon crystal needs to be monolithic, that is, a lattice of atoms completely ordered throughout the chip we've got to think outside the box, this guy's inside the box, but realistically, this is to save money, and he wants to see something before his great grand kids are born.
The heart of the problem is the crystal flat surface. What we need is a crystal that grows out and up in such as manner as to be a monolithic latice but also compartmentalized. A cube, with little windows and rooms and holes so that the dope can get in.
Completely revolutionized fabrication thinking. We'll see it in less than 50 years.
You get the impression that 3D memory might be new from all this.... look back 15 years to Toshiba's trench technology for DRAMS... not to mention the V groove approach... if it makes it to mass production... then it'll be real...
1. Designing 3d chips must be hell. No wonder they stick to memorychips where you mostly just have to copy/paste chip structure.
Seeing xxx layered cpu's seems unlikly untill designtools can handle 3d strucures efficiently. This will certainly take a long time.
2. Moores law is dependet on shrinking the transistors so more can be fittet on the same amount of space, 2d -> n^2
If the transitors are shrinked in height as well, the possible amount of transitors in a cube would be increased by n^3.
(This won't work in practise yet, they've got it working with 12 layers, but would be cool)
The guy does not understand Moore's law.
Moore's law is shaped by economic forces. Silicon chips don't "wear out" like metals and plastics. If the industry fails to obsolete the previous generation, what do they have to sell?
At any stage along the way, there are dozens of potential avenues for reaching the next cost/performance milestone. They simply "do what it takes" to get there.
3D could have been pursued long ago, but there was no real need. The advantage of making transistors smaller is that the speed increases while the voltage and heat decreases. If you can make a transistor smaller, you aren't going to pursue any other course.
Moore's law has not "drooped". There has always been something right around the corner to rescue Moore's law, and this article just adds to the evidence that nothing much has changed.
The significant event at the present time is that leakage current has become sizeable relative to peak operating current. Shrinking transistors is no longer a free lunch.
I think 3D will succeed in applications where wire latency is a bigger problem than heat dissipation. The biggest advantage of 3D is that it lets you cram more stuff closer together.
There is now research being published which manages to produce grains potentially much greater than transistors at precise locations, although this was being done with excimer lasers for quite some time they are now even managing it with deposited seed chemicals ... so it can be done with just another process step.
... personally Id much rather see the thin-film memory from companies like thinfilm.se and Ovonyx commercialized. Memory through the use of anti-fuses in a 3D semiconductor is nice, at least thats what I assume they are doing, but write once memory just doesnt do it for me.
If you are able to form grains larger than the transistor and at precise locations boundaries are not a problem even in thin film deposited silicon. Apart from that for the memory cell's the grain boundaries never were much of a problem anyway, as long as you can keep all the high speed logic at the bottom there isnt any problem anyway.
I think Matrix is only interesting because they are promising product soon