Transmeta Meets Blades
The Griller writes "Gordon Bell, one of the creators of VAX, and Linus Torvalds were at the launch of a new supercomputing platform at the Los Alamos National Laboratory. Based on Crusoe processors from Transmeta and running a version of linux, it is aimed at being cheaper than conventional supercomputers by requiring no cooling and lower maintenance.
" Basically, it's blade clustering, using Beowulf.
I've got to wonder why they are using Crusoes. It's a good chip for the application, don't get me wrong... but the last I heard the main advantage it has over StrongARM is x86 compatibility, which shouldn't be an issue here.
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The only trick would be getting the things to work properly in a headless configuration -- Apple won't ship them without a graphics card, but I'm relatively certain that you could get a LinuxPPC installation to work even without the card installed.
I can't imagine how a choice between Chip A or Chip B influences 'ease of administration'. Linux is Linux. I didn't know one has have people maddly flipping jumpers on lesser chips to do a calculation.
Also, silicon is silicon. Pick your chip and reliability is all pretty much the same. Failures are almost 99.9% power supplies, support items like Caps, resistors, and edge connectors. When a chip fries, the root is almost always static or support electronics. (Well, there is overclocking).
Low power/small size is a good thing. I guess the right choice boils down to balancing watts and bucks for FLOPS per node.
Anyway, I like the point about "stop using more transisters to make it go faster" bit. What a hoot. That't exactly the point of building a cluster. More chips, more transistors, more FLOPS.
Why limit yourself to the x86 instruction set when the transmeta processor just needs a new instruction set decoder to emulate pretty much ANY processor? It seems like while they'll be able to use lots of existing software out there, they could get even more performance, efficiency, or maybe just easier programming by using whatever instruction set makes sense for the project.
It's all in the pre-processing with the crusoe, x86 is just there for slideways compatibility and doesn't need to be a limiting factor. When you're using a custom computer, whether it's one or a thousand crusoe processors, wouldn't it make sense to try for some compiler efficiency based on the actual hardware instead of the 8086 legacy?
Get a clue. The Crusoe consumes about 2 watts. Very nice compared to Pentium-class room heaters, yes, but I asked why they choice Crusoe over StrongARM, not Crusoe over IA-32. A 600mhz SA uses 450mW, so you can run roughly 4 of them for the same power and heat as one Crusoe.
The advantages that Crusoe has are two - first, as I mentioned originally - x86 compatibility. This is not a help for a supercomputer - you're going to be compiling everything from source anyway. The other advantage, that I forgot, is that the SA doesn't have an FPU. That, at least, is a legitimate reason to consider the Crusoe, but I'm still not sure the decision actually makes sense - the SA is a very nice chip and if programmed right it should have no problem keeping up with the Crusoe even on FP, figuring that you can use 4 times as many SAs for the same heat and power requirements.
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