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Asynchronous Logic: Ready For It?
prostoalex writes "For a while academia and R&D labs explored the possibilities of asynchronous logic. Now Bernard Cole from Embedded.com tells us that asynchronous logic might receive more acceptance than expected in modern designs. The main advantages, as article states, are 'reduced power consumption, reduced current peaks, and reduced electromagnetic emission', to quote a prominent researcher from Philips Semiconductors. Earlier Bernard Cole wrote a column on self-timed asynchronous logic."
Brains use async logic elements. Maybe the only way to achieve good artificial intelligence with practical speeds is with async logic. With a cluster of async nodes you can build a physical simulation of neural nets. Consider having a small array of async nodes simulating parts of a neural net at a time. That would be a lot faster than what would be possible with ordinary sequential processing. Async logic might very well bring large neural net research into practicality.
The problem with asynchronous logic is that even though it might seem faster in theory you have to deal with the introduction of many new race conditions. Thus to prevent to the race conditions you need to implement many handshacking methods. In the end it really becomes no faster than sychronous logic due to the handshacking. This is especially true these days with 2.5 GHz CPUs.
... where are the designn tools?
We all know about the advantages async logic has in many respects to clocked one. The problems is, the async logic *design* tools are nowhere as good or as many as the tools available for designing clocked logic.
Chicken and egg problem? Maybe, or maybe just another untapped opportunity for those crazy software people...
From what I've understood, in most aspects of computing, synchronous data communication is preferable. IE, network cards, sound-cards, printers, etc. Don't better models support bi-directional synchronous communication?
You're just talking about I/O. Of course I/O has to be synchronous, because it involves handshaking.
I think there are some general misconceptions about what "asynchronous" means. Seriously, all I'm seeing are comments from people without a clue about chip design, other than what they read about at arstechnica.com or aceshardware.com. And if you don't know anything about the *real* internals of synchronous chips, then how can you blast asynchronous designs?
So-called asynchronous processors have already been designed and prototyped. Chuck Moore's recent (as in "ten years old") stack processors are mostly asynchronous, for example. Most people are only familiar with the x86 line, and to a lesser extent the PowerPC, and a much, much lesser extent the Alpha and UltraSPARC. Unless you've done some research into a *variety* of processor architectures, please refrain from commenting. Otherwise you come across like some kind of "Linux rules!" weenie who doesn't have a clue what else is out there besides (Windows, MacOS, and UNIX-variants).
I'm sure that many /. readers, like me, are wondering if asynchronous chips get faster if you pour liquid nitrogen on them.
Seriously though, does the temperature affect the switching time? Or does the liquid nitrogen trick just prevent meltdown of an overclocked chip?
BTW, he goes by different names, usually those with the word "Physics" in it.
Here's another example of his copy and pasting:
This post: http://developers.slashdot.org/comments.pl?sid=42
is copied from this web page:
http://www.intuitor.com/moviephysics/mpmain.html
Take a look for yourself at his post history, the wide range of topics, and supposed knowledge.
Dave
FPGA, Wireless, ASIC, Verilog, VHDL, HW, 10yr exp, Team Lead, Ottawa (More? Email above. slashdotusername=dgmartin98 )
Those of us that have been around the block more than twice know that asynchronous design has been the technology of the future for a long, long time. My personal experience goes back to the mid-seventies, but I'm sure there were asynch he-men doing their thing with vacuum tubes and RTL. :-)
The catch, then as now, is that asynch logic is just plain more difficult for our tiny little human brains to grok. This was true back in the days when humans designed their own logic, and it is even more true now when 99%+ of all logic is designed not by humans, but by logic synthesis software (Synopsys DC and Cadence PKS).
That said, there are always folks out there doing Cool Stuff w/asynch circuits. Hope that Ivan Sutherlands's group at Sun Labs survives Sun's recent massive layoffs.
But there is a huge leap from single cycle circuits to the external interface. All synchronous CPU's are asynchronous between clocks (looks like we were both saying this), but there's a lot of room for asynchronous circuits that have a threshold >1 CPU clock, but small enough for the task. It's very unlikely that we'll get fully asynchronous chips in the near future, simply because the vast majority of the tools, methodologies, etc. are for synchronous designs. But having asynchronous circuits doing some work on a synchronous chip is much more likely. (And I think is a better path anyway.)